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Remove some leftover remnants that once tried to create 64-bit MMX PALIGNR instructions.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145804 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Craig Topper 2011-12-05 07:27:14 +00:00
parent beabc6cc6d
commit 1dc0fbc168
1 changed files with 2 additions and 2 deletions
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4
lib/Target/X86/X86ISelLowering.cpp
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@ -3217,7 +3217,7 @@ bool X86::isPSHUFLWMask(ShuffleVectorSDNode *N) {
static bool isPALIGNRMask(const SmallVectorImpl<int> &Mask, EVT VT,
bool hasSSSE3OrAVX) {
int i, e = VT.getVectorNumElements();
if (VT.getSizeInBits() != 128 && VT.getSizeInBits() != 64)
if (VT.getSizeInBits() != 128)
return false;
// Do not handle v2i64 / v2f64 shuffles with palignr.
@ -11244,7 +11244,7 @@ X86TargetLowering::isShuffleMaskLegal(const SmallVectorImpl<int> &M,
EVT VT) const {
// Very little shuffling can be done for 64-bit vectors right now.
if (VT.getSizeInBits() == 64)
return isPALIGNRMask(M, VT, Subtarget->hasSSSE3orAVX());
return false;
// FIXME: pshufb, blends, shifts.
return (VT.getVectorNumElements() == 2 ||