From 1e48871118a81a68c4d7b51a131fa73540159631 Mon Sep 17 00:00:00 2001 From: Igor Breger Date: Wed, 8 Jun 2016 07:48:23 +0000 Subject: [PATCH] [AVX512] Fix cvtusi2sd instruction Opcode, it should be 0x7B instead of 0x2A. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@272122 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/X86/X86InstrAVX512.td | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/lib/Target/X86/X86InstrAVX512.td b/lib/Target/X86/X86InstrAVX512.td index 47891910d64..0ab57db9403 100644 --- a/lib/Target/X86/X86InstrAVX512.td +++ b/lib/Target/X86/X86InstrAVX512.td @@ -5097,7 +5097,7 @@ let isCodeGenOnly = 1 , Predicates = [HasAVX512] in { int_x86_sse2_cvtsi642sd, i64mem, loadi64, "cvtsi2sd{q}", SSE_CVT_Scalar, 0>, XD, EVEX_4V, VEX_W; - defm Int_VCVTUSI2SDZ : sse12_cvt_sint_3addr<0x2A, GR32, VR128X, + defm Int_VCVTUSI2SDZ : sse12_cvt_sint_3addr<0x7B, GR32, VR128X, int_x86_avx512_cvtusi2sd, i32mem, loadi32, "cvtusi2sd{l}", SSE_CVT_Scalar, 0>, XD, EVEX_4V; } // isCodeGenOnly = 1, Predicates = [HasAVX512]