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Turn on register scavenger for Mips 16

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We use an unused Mips 32 register for the emergency slot
instead of using the stack.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170665 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Reed Kotler 2012-12-20 04:44:58 +00:00
parent 9bf571fe2c
commit 1f23239c5b
2 changed files with 39 additions and 0 deletions
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26
lib/Target/Mips/Mips16RegisterInfo.cpp
View File

@ -43,6 +43,32 @@ Mips16RegisterInfo::Mips16RegisterInfo(const MipsSubtarget &ST,
const Mips16InstrInfo &I)
: MipsRegisterInfo(ST), TII(I) {}
bool Mips16RegisterInfo::requiresRegisterScavenging
(const MachineFunction &MF) const {
return true;
}
bool Mips16RegisterInfo::requiresFrameIndexScavenging
(const MachineFunction &MF) const {
return true;
}
bool Mips16RegisterInfo::useFPForScavengingIndex
(const MachineFunction &MF) const {
return false;
}
bool Mips16RegisterInfo::saveScavengerRegister
(MachineBasicBlock &MBB,
MachineBasicBlock::iterator I,
MachineBasicBlock::iterator &UseMI,
const TargetRegisterClass *RC,
unsigned Reg) const {
DebugLoc DL;
TII.copyPhysReg(MBB, I, DL, Mips::T0, Reg, true);
TII.copyPhysReg(MBB, UseMI, DL, Reg, Mips::T0, true);
return true;
}
// This function eliminate ADJCALLSTACKDOWN,
// ADJCALLSTACKUP pseudo instructions
void Mips16RegisterInfo::

13
lib/Target/Mips/Mips16RegisterInfo.h
View File

@ -27,6 +27,19 @@ public:
void eliminateCallFramePseudoInstr(MachineFunction &MF,
MachineBasicBlock &MBB,
MachineBasicBlock::iterator I) const;
bool requiresRegisterScavenging(const MachineFunction &MF) const;
bool requiresFrameIndexScavenging(const MachineFunction &MF) const;
bool useFPForScavengingIndex(const MachineFunction &MF) const;
bool saveScavengerRegister(MachineBasicBlock &MBB,
MachineBasicBlock::iterator I,
MachineBasicBlock::iterator &UseMI,
const TargetRegisterClass *RC,
unsigned Reg) const;
private:
virtual void eliminateFI(MachineBasicBlock::iterator II, unsigned OpNo,
int FrameIndex, uint64_t StackSize,