mirror of
https://github.com/RPCS3/llvm.git
synced 2024-12-02 00:37:09 +00:00
Preserve more memory operands in ARMExpandPseudo.
I don't think this affects anything but verbose assembly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146787 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
parent
ce16339930
commit
2027379985
@ -631,6 +631,8 @@ void ARMExpandPseudo::ExpandLaneOp(MachineBasicBlock::iterator &MBBI) {
|
||||
// Add an implicit def for the super-register.
|
||||
MIB.addReg(DstReg, RegState::ImplicitDefine | getDeadRegState(DstIsDead));
|
||||
TransferImpOps(MI, MIB, MIB);
|
||||
// Transfer memoperands.
|
||||
MIB->setMemRefs(MI.memoperands_begin(), MI.memoperands_end());
|
||||
MI.eraseFromParent();
|
||||
}
|
||||
|
||||
@ -1024,6 +1026,7 @@ bool ARMExpandPseudo::ExpandMI(MachineBasicBlock &MBB,
|
||||
// Add an implicit def for the super-register.
|
||||
MIB.addReg(DstReg, RegState::ImplicitDefine | getDeadRegState(DstIsDead));
|
||||
TransferImpOps(MI, MIB, MIB);
|
||||
MIB.setMemRefs(MI.memoperands_begin(), MI.memoperands_end());
|
||||
MI.eraseFromParent();
|
||||
return true;
|
||||
}
|
||||
@ -1054,6 +1057,7 @@ bool ARMExpandPseudo::ExpandMI(MachineBasicBlock &MBB,
|
||||
MIB->addRegisterKilled(SrcReg, TRI, true);
|
||||
|
||||
TransferImpOps(MI, MIB, MIB);
|
||||
MIB.setMemRefs(MI.memoperands_begin(), MI.memoperands_end());
|
||||
MI.eraseFromParent();
|
||||
return true;
|
||||
}
|
||||
|
Loading…
Reference in New Issue
Block a user