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AMDGPU: Fix missing br_cc i1 test coverage
Also un xfail a test. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270739 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1,9 +1,23 @@
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; XFAIL: *
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; RUN: llc -O0 -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck %s
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; RUN: llc -O0 -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck %s
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; RUN: llc -O0 -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=GCNNOOPT -check-prefix=GCN %s
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; RUN: llc -O0 -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=GCNNOOPT -check-prefix=GCN %s
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; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=GCNOPT -check-prefix=GCN %s
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; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=GCNOPT -check-prefix=GCN %s
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; CHECK-LABEL: {{^}}test_branch(
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define void @test_branch(i32 addrspace(1)* noalias %out, i32 addrspace(1)* noalias %in, i32 %val) nounwind {
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; GCN-LABEL: {{^}}test_branch:
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; GCNNOOPT: v_writelane_b32
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; GCNNOOPT: v_writelane_b32
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; GCNNOOPT: v_writelane_b32
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; GCN: s_cbranch_scc1 [[END:BB[0-9]+_[0-9]+]]
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; GCN: ; BB#1
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; GCNNOOPT: v_readlane_b32
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; GCNNOOPT: v_readlane_b32
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; GCN: buffer_store_dword
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; GCN: s_endpgm
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; GCN: {{^}}[[END]]
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; GCN: s_endpgm
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define void @test_branch(i32 addrspace(1)* noalias %out, i32 addrspace(1)* noalias %in, i32 %val) #0 {
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%cmp = icmp ne i32 %val, 0
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br i1 %cmp, label %store, label %end
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@ -14,3 +28,28 @@ store:
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end:
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ret void
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}
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; GCN-LABEL: {{^}}test_brcc_i1:
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; GCN: buffer_load_ubyte
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; GCN: v_and_b32_e32 v{{[0-9]+}}, 1,
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; GCN: v_cmp_eq_i32_e32 vcc,
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; GCN: s_cbranch_vccnz [[END:BB[0-9]+_[0-9]+]]
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; GCN: buffer_store_dword
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; GCN: s_endpgm
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; GCN: {{^}}[[END]]
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; GCN: s_endpgm
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define void @test_brcc_i1(i32 addrspace(1)* noalias %out, i32 addrspace(1)* noalias %in, i1 %val) #0 {
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%cmp0 = icmp ne i1 %val, 0
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br i1 %cmp0, label %store, label %end
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store:
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store i32 222, i32 addrspace(1)* %out
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ret void
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end:
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ret void
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}
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attributes #0 = { nounwind }
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