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[X86][SSE] Rename truncateVectorCompareWithPACKSS to truncateVectorWithPACKSS. NFC.
We no longer rely on the vector source being a comparison result, just have sufficient sign bits. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316834 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -15990,14 +15990,13 @@ static SDValue LowerZERO_EXTEND(SDValue Op, const X86Subtarget &Subtarget,
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}
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/// Helper to recursively truncate vector elements in half with PACKSS.
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/// It makes use of the fact that vector comparison results will be all-zeros
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/// or all-ones to prevent the PACKSS from saturating the results.
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/// It makes use of the fact that vectors with enough leading sign bits
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/// prevent the PACKSS from saturating the results.
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/// AVX2 (Int256) sub-targets require extra shuffling as the PACKSS operates
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/// within each 128-bit lane.
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static SDValue truncateVectorCompareWithPACKSS(EVT DstVT, SDValue In,
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const SDLoc &DL,
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SelectionDAG &DAG,
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const X86Subtarget &Subtarget) {
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static SDValue truncateVectorWithPACKSS(EVT DstVT, SDValue In, const SDLoc &DL,
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SelectionDAG &DAG,
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const X86Subtarget &Subtarget) {
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// Requires SSE2 but AVX512 has fast truncate.
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if (!Subtarget.hasSSE2() || Subtarget.hasAVX512())
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return SDValue();
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@ -16065,18 +16064,18 @@ static SDValue truncateVectorCompareWithPACKSS(EVT DstVT, SDValue In,
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// If 512bit -> 128bit truncate another stage.
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EVT PackedVT = EVT::getVectorVT(Ctx, PackedSVT, NumElems);
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Res = DAG.getBitcast(PackedVT, Res);
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return truncateVectorCompareWithPACKSS(DstVT, Res, DL, DAG, Subtarget);
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return truncateVectorWithPACKSS(DstVT, Res, DL, DAG, Subtarget);
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}
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// Recursively pack lower/upper subvectors, concat result and pack again.
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assert(SrcSizeInBits >= 512 && "Expected 512-bit vector or greater");
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EVT PackedVT = EVT::getVectorVT(Ctx, PackedSVT, NumSubElts);
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Lo = truncateVectorCompareWithPACKSS(PackedVT, Lo, DL, DAG, Subtarget);
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Hi = truncateVectorCompareWithPACKSS(PackedVT, Hi, DL, DAG, Subtarget);
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Lo = truncateVectorWithPACKSS(PackedVT, Lo, DL, DAG, Subtarget);
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Hi = truncateVectorWithPACKSS(PackedVT, Hi, DL, DAG, Subtarget);
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PackedVT = EVT::getVectorVT(Ctx, PackedSVT, NumElems);
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SDValue Res = DAG.getNode(ISD::CONCAT_VECTORS, DL, PackedVT, Lo, Hi);
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return truncateVectorCompareWithPACKSS(DstVT, Res, DL, DAG, Subtarget);
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return truncateVectorWithPACKSS(DstVT, Res, DL, DAG, Subtarget);
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}
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static SDValue LowerTruncateVecI1(SDValue Op, SelectionDAG &DAG,
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@ -16140,7 +16139,7 @@ SDValue X86TargetLowering::LowerTRUNCATE(SDValue Op, SelectionDAG &DAG) const {
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// Truncate with PACKSS if we are truncating a vector zero/all-bits result.
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if (InVT.getScalarSizeInBits() == DAG.ComputeNumSignBits(In))
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if (SDValue V = truncateVectorCompareWithPACKSS(VT, In, DL, DAG, Subtarget))
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if (SDValue V = truncateVectorWithPACKSS(VT, In, DL, DAG, Subtarget))
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return V;
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if ((VT == MVT::v4i32) && (InVT == MVT::v4i64)) {
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@ -34328,7 +34327,7 @@ static SDValue combineVectorSignBitsTruncation(SDNode *N, SDLoc &DL,
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if (InSVT != MVT::i16 && InSVT != MVT::i32 && InSVT != MVT::i64)
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return SDValue();
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return truncateVectorCompareWithPACKSS(VT, In, DL, DAG, Subtarget);
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return truncateVectorWithPACKSS(VT, In, DL, DAG, Subtarget);
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}
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static SDValue combineTruncate(SDNode *N, SelectionDAG &DAG,
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