From 23f2ff74b1b44bec7e5a95199973fc978c8351c2 Mon Sep 17 00:00:00 2001 From: Scott Michel Date: Thu, 4 Dec 2008 17:16:59 +0000 Subject: [PATCH] Missing closing brace and reverse conditional condition on NDEBUG git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60541 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/CellSPU/SPUISelLowering.cpp | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/lib/Target/CellSPU/SPUISelLowering.cpp b/lib/Target/CellSPU/SPUISelLowering.cpp index a08ee876f87..17d88a937ad 100644 --- a/lib/Target/CellSPU/SPUISelLowering.cpp +++ b/lib/Target/CellSPU/SPUISelLowering.cpp @@ -766,7 +766,7 @@ LowerSTORE(SDValue Op, SelectionDAG &DAG, const SPUSubtarget *ST) { LN->getSrcValue(), LN->getSrcValueOffset(), LN->isVolatile(), LN->getAlignment()); -#if 0 && defined(NDEBUG) +#if 0 && !defined(NDEBUG) if (DebugFlag && isCurrentDebugType(DEBUG_TYPE)) { const SDValue ¤tRoot = DAG.getRoot(); @@ -3021,7 +3021,7 @@ SPUTargetLowering::PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const SDValue combinedConst = DAG.getConstant(CN0->getZExtValue() + CN1->getZExtValue(), Op0VT); -#if defined(NDEBUG) +#if !defined(NDEBUG) if (DebugFlag && isCurrentDebugType(DEBUG_TYPE)) { cerr << "\n" << "Replace: (add " << CN0->getZExtValue() << ", " @@ -3064,14 +3064,14 @@ SPUTargetLowering::PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const // (any_extend (SPUextract_elt0 )) -> // (SPUextract_elt0 ) // Types must match, however... -#if defined(NDEBUG) - // if (DebugFlag && isCurrentDebugType(DEBUG_TYPE)) { +#if !defined(NDEBUG) + if (DebugFlag && isCurrentDebugType(DEBUG_TYPE)) { cerr << "\nReplace: "; N->dump(&DAG); cerr << "\nWith: "; Op0.getNode()->dump(&DAG); cerr << "\n"; - + } #endif return Op0;