mirror of
https://github.com/RPCS3/llvm.git
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Convert a CodeGen test into a MC test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207971 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Rafael Espindola
parent
1c87e2a3a8
commit
260b6b05b9
@ -1,161 +0,0 @@
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; Use the -disable-cfi flag so that we get the compact unwind info in the
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; emitted assembly. Compact unwind info is omitted when CFI directives
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; are emitted.
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;
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; RUN: llc -march=arm64 -mtriple=arm64-apple-ios -disable-cfi < %s | FileCheck %s
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;
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; rdar://13070556
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@bar = common global i32 0, align 4
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; Leaf function with no stack allocation and no saving/restoring
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; of non-volatile registers.
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define i32 @foo1(i32 %a) #0 {
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entry:
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%add = add nsw i32 %a, 42
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ret i32 %add
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}
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; Leaf function with stack allocation but no saving/restoring
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; of non-volatile registers.
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define i32 @foo2(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f, i32 %g, i32 %h) #0 {
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entry:
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%stack = alloca [36 x i32], align 4
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br label %for.body
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for.body: ; preds = %for.body, %entry
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%indvars.iv19 = phi i64 [ 0, %entry ], [ %indvars.iv.next20, %for.body ]
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%arrayidx = getelementptr inbounds [36 x i32]* %stack, i64 0, i64 %indvars.iv19
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%0 = trunc i64 %indvars.iv19 to i32
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store i32 %0, i32* %arrayidx, align 4, !tbaa !0
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%indvars.iv.next20 = add i64 %indvars.iv19, 1
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%lftr.wideiv21 = trunc i64 %indvars.iv.next20 to i32
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%exitcond22 = icmp eq i32 %lftr.wideiv21, 36
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br i1 %exitcond22, label %for.body4, label %for.body
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for.body4: ; preds = %for.body, %for.body4
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%indvars.iv = phi i64 [ %indvars.iv.next, %for.body4 ], [ 0, %for.body ]
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%z1.016 = phi i32 [ %add, %for.body4 ], [ 0, %for.body ]
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%arrayidx6 = getelementptr inbounds [36 x i32]* %stack, i64 0, i64 %indvars.iv
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%1 = load i32* %arrayidx6, align 4, !tbaa !0
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%add = add nsw i32 %1, %z1.016
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%indvars.iv.next = add i64 %indvars.iv, 1
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%lftr.wideiv = trunc i64 %indvars.iv.next to i32
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%exitcond = icmp eq i32 %lftr.wideiv, 36
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br i1 %exitcond, label %for.end9, label %for.body4
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for.end9: ; preds = %for.body4
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ret i32 %add
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}
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; Leaf function with no stack allocation but with saving restoring of
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; non-volatile registers.
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define i32 @foo3(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f, i32 %g, i32 %h) #1 {
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entry:
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%0 = load volatile i32* @bar, align 4, !tbaa !0
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%1 = load volatile i32* @bar, align 4, !tbaa !0
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%2 = load volatile i32* @bar, align 4, !tbaa !0
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%3 = load volatile i32* @bar, align 4, !tbaa !0
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%4 = load volatile i32* @bar, align 4, !tbaa !0
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%5 = load volatile i32* @bar, align 4, !tbaa !0
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%6 = load volatile i32* @bar, align 4, !tbaa !0
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%7 = load volatile i32* @bar, align 4, !tbaa !0
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%8 = load volatile i32* @bar, align 4, !tbaa !0
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%9 = load volatile i32* @bar, align 4, !tbaa !0
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%10 = load volatile i32* @bar, align 4, !tbaa !0
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%11 = load volatile i32* @bar, align 4, !tbaa !0
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%12 = load volatile i32* @bar, align 4, !tbaa !0
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%13 = load volatile i32* @bar, align 4, !tbaa !0
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%14 = load volatile i32* @bar, align 4, !tbaa !0
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%15 = load volatile i32* @bar, align 4, !tbaa !0
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%16 = load volatile i32* @bar, align 4, !tbaa !0
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%17 = load volatile i32* @bar, align 4, !tbaa !0
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%factor = mul i32 %h, -2
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%factor56 = mul i32 %g, -2
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%factor57 = mul i32 %f, -2
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%factor58 = mul i32 %e, -2
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%factor59 = mul i32 %d, -2
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%factor60 = mul i32 %c, -2
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%factor61 = mul i32 %b, -2
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%sum = add i32 %1, %0
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%sum62 = add i32 %sum, %2
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%sum63 = add i32 %sum62, %3
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%sum64 = add i32 %sum63, %4
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%sum65 = add i32 %sum64, %5
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%sum66 = add i32 %sum65, %6
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%sum67 = add i32 %sum66, %7
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%sum68 = add i32 %sum67, %8
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%sum69 = add i32 %sum68, %9
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%sum70 = add i32 %sum69, %10
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%sum71 = add i32 %sum70, %11
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%sum72 = add i32 %sum71, %12
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%sum73 = add i32 %sum72, %13
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%sum74 = add i32 %sum73, %14
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%sum75 = add i32 %sum74, %15
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%sum76 = add i32 %sum75, %16
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%sub10 = sub i32 %17, %sum76
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%sub11 = add i32 %sub10, %factor
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%sub12 = add i32 %sub11, %factor56
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%sub13 = add i32 %sub12, %factor57
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%sub14 = add i32 %sub13, %factor58
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%sub15 = add i32 %sub14, %factor59
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%sub16 = add i32 %sub15, %factor60
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%add = add i32 %sub16, %factor61
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ret i32 %add
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}
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; Leaf function with stack allocation and saving/restoring of non-volatile
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; registers.
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define i32 @foo4(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f, i32 %g, i32 %h) #0 {
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entry:
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%stack = alloca [128 x i32], align 4
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%0 = zext i32 %a to i64
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br label %for.body
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for.cond2.preheader: ; preds = %for.body
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%1 = sext i32 %f to i64
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br label %for.body4
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for.body: ; preds = %for.body, %entry
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%indvars.iv22 = phi i64 [ 0, %entry ], [ %indvars.iv.next23, %for.body ]
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%2 = add nsw i64 %indvars.iv22, %0
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%arrayidx = getelementptr inbounds [128 x i32]* %stack, i64 0, i64 %indvars.iv22
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%3 = trunc i64 %2 to i32
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store i32 %3, i32* %arrayidx, align 4, !tbaa !0
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%indvars.iv.next23 = add i64 %indvars.iv22, 1
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%lftr.wideiv25 = trunc i64 %indvars.iv.next23 to i32
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%exitcond26 = icmp eq i32 %lftr.wideiv25, 128
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br i1 %exitcond26, label %for.cond2.preheader, label %for.body
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for.body4: ; preds = %for.body4, %for.cond2.preheader
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%indvars.iv = phi i64 [ 0, %for.cond2.preheader ], [ %indvars.iv.next, %for.body4 ]
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%z1.018 = phi i32 [ 0, %for.cond2.preheader ], [ %add8, %for.body4 ]
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%4 = add nsw i64 %indvars.iv, %1
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%arrayidx7 = getelementptr inbounds [128 x i32]* %stack, i64 0, i64 %4
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%5 = load i32* %arrayidx7, align 4, !tbaa !0
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%add8 = add nsw i32 %5, %z1.018
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%indvars.iv.next = add i64 %indvars.iv, 1
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%lftr.wideiv = trunc i64 %indvars.iv.next to i32
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%exitcond = icmp eq i32 %lftr.wideiv, 128
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br i1 %exitcond, label %for.end11, label %for.body4
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for.end11: ; preds = %for.body4
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ret i32 %add8
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}
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attributes #0 = { readnone "target-cpu"="cyclone" }
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attributes #1 = { "target-cpu"="cyclone" }
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!0 = metadata !{metadata !"int", metadata !1}
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!1 = metadata !{metadata !"omnipotent char", metadata !2}
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!2 = metadata !{metadata !"Simple C/C++ TBAA"}
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; CHECK: .section __LD,__compact_unwind,regular,debug
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; CHECK: .quad _foo1 ; Range Start
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; CHECK: .long 33554432 ; Compact Unwind Encoding: 0x2000000
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; CHECK: .quad _foo2 ; Range Start
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; CHECK: .long 33591296 ; Compact Unwind Encoding: 0x2009000
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; CHECK: .quad _foo3 ; Range Start
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; CHECK: .long 33570831 ; Compact Unwind Encoding: 0x200400f
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; CHECK: .quad _foo4 ; Range Start
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; CHECK: .long 33689616 ; Compact Unwind Encoding: 0x2021010
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208
test/MC/leaf-compact-unwind.s
Normal file
208
test/MC/leaf-compact-unwind.s
Normal file
@ -0,0 +1,208 @@
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// RUN: llvm-mc -triple=arm64-apple-ios -filetype=obj < %s | \
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// RUN: llvm-readobj -sections -section-relocations -section-data | \
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// RUN: FileCheck %s
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//
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// rdar://13070556
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// FIXME: we should add compact unwind support to llvm-objdump -unwind-info
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// CHECK: Section {
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// CHECK: Index: 1
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// CHECK-NEXT: Name: __compact_unwind
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// CHECK-NEXT: Segment: __LD
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// CHECK-NEXT: Address:
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// CHECK-NEXT: Size:
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// CHECK-NEXT: Offset:
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// CHECK-NEXT: Alignment:
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// CHECK-NEXT: RelocationOffset:
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// CHECK-NEXT: RelocationCount:
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// CHECK-NEXT: Type:
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// CHECK-NEXT: Attributes [
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// CHECK-NEXT: Debug
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// CHECK-NEXT: ]
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// CHECK-NEXT: Reserved1:
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// CHECK-NEXT: Reserved2:
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// CHECK-NEXT: Relocations [
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// CHECK-NEXT: 0x60 0 3 0 ARM64_RELOC_UNSIGNED 0 -
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// CHECK-NEXT: 0x40 0 3 0 ARM64_RELOC_UNSIGNED 0 -
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// CHECK-NEXT: 0x20 0 3 0 ARM64_RELOC_UNSIGNED 0 -
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// CHECK-NEXT: 0x0 0 3 0 ARM64_RELOC_UNSIGNED 0 -
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// CHECK-NEXT: ]
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// CHECK-NEXT: SectionData (
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// CHECK-NEXT: 0000: 00000000 00000000 08000000 00000002
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// CHECK-NEXT: 0010: 00000000 00000000 00000000 00000000
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// CHECK-NEXT: 0020: 08000000 00000000 40000000 00900002
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// CHECK-NEXT: 0030: 00000000 00000000 00000000 00000000
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// CHECK-NEXT: 0040: 48000000 00000000 D4000000 0F400002
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// CHECK-NEXT: 0050: 00000000 00000000 00000000 00000000
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// CHECK-NEXT: 0060: 1C010000 00000000 54000000 10100202
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// CHECK-NEXT: 0070: 00000000 00000000 00000000 00000000
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// CHECK-NEXT: )
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// CHECK-NEXT: }
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.section __TEXT,__text,regular,pure_instructions
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.globl _foo1
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.align 2
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_foo1: ; @foo1
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.cfi_startproc
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; BB#0: ; %entry
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add w0, w0, #42 ; =#42
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ret
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.cfi_endproc
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.globl _foo2
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.align 2
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_foo2: ; @foo2
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.cfi_startproc
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; BB#0: ; %entry
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sub sp, sp, #144 ; =#144
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Ltmp2:
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.cfi_def_cfa_offset 144
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mov x9, xzr
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mov x8, sp
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LBB1_1: ; %for.body
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; =>This Inner Loop Header: Depth=1
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str w9, [x8, x9, lsl #2]
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add x9, x9, #1 ; =#1
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cmp w9, #36 ; =#36
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b.ne LBB1_1
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; BB#2:
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mov x9, xzr
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mov w0, wzr
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LBB1_3: ; %for.body4
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; =>This Inner Loop Header: Depth=1
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ldr w10, [x8, x9]
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add x9, x9, #4 ; =#4
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cmp w9, #144 ; =#144
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add w0, w10, w0
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b.ne LBB1_3
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; BB#4: ; %for.end9
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add sp, sp, #144 ; =#144
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ret
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.cfi_endproc
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.globl _foo3
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.align 2
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_foo3: ; @foo3
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.cfi_startproc
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; BB#0: ; %entry
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stp x26, x25, [sp, #-64]!
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stp x24, x23, [sp, #16]
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stp x22, x21, [sp, #32]
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stp x20, x19, [sp, #48]
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Ltmp3:
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.cfi_def_cfa_offset 64
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Ltmp4:
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.cfi_offset w19, -16
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Ltmp5:
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.cfi_offset w20, -24
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Ltmp6:
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.cfi_offset w21, -32
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Ltmp7:
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.cfi_offset w22, -40
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Ltmp8:
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.cfi_offset w23, -48
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Ltmp9:
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.cfi_offset w24, -56
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Ltmp10:
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.cfi_offset w25, -64
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Ltmp11:
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.cfi_offset w26, -72
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Lloh0:
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adrp x8, _bar@GOTPAGE
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Lloh1:
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ldr x8, [x8, _bar@GOTPAGEOFF]
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ldr w9, [x8]
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ldr w10, [x8]
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ldr w11, [x8]
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ldr w12, [x8]
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ldr w13, [x8]
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ldr w14, [x8]
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ldr w15, [x8]
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ldr w16, [x8]
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ldr w17, [x8]
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ldr w0, [x8]
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ldr w19, [x8]
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ldr w20, [x8]
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ldr w21, [x8]
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ldr w22, [x8]
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ldr w23, [x8]
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ldr w24, [x8]
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ldr w25, [x8]
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ldr w8, [x8]
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add w9, w10, w9
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add w9, w9, w11
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add w9, w9, w12
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add w9, w9, w13
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add w9, w9, w14
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add w9, w9, w15
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add w9, w9, w16
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add w9, w9, w17
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add w9, w9, w0
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add w9, w9, w19
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add w9, w9, w20
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add w9, w9, w21
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add w9, w9, w22
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add w9, w9, w23
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add w9, w9, w24
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add w9, w9, w25
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sub w8, w8, w9
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sub w8, w8, w7, lsl #1
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sub w8, w8, w6, lsl #1
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sub w8, w8, w5, lsl #1
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sub w8, w8, w4, lsl #1
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sub w8, w8, w3, lsl #1
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sub w8, w8, w2, lsl #1
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sub w0, w8, w1, lsl #1
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ldp x20, x19, [sp, #48]
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ldp x22, x21, [sp, #32]
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ldp x24, x23, [sp, #16]
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ldp x26, x25, [sp], #64
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ret
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.loh AdrpLdrGot Lloh0, Lloh1
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.cfi_endproc
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.globl _foo4
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.align 2
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_foo4: ; @foo4
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.cfi_startproc
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; BB#0: ; %entry
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stp x28, x27, [sp, #-16]!
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sub sp, sp, #512 ; =#512
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Ltmp12:
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.cfi_def_cfa_offset 528
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Ltmp13:
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.cfi_offset w27, -16
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Ltmp14:
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.cfi_offset w28, -24
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; kill: W0<def> W0<kill> X0<def>
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mov x9, xzr
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ubfx x10, x0, #0, #32
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mov x8, sp
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LBB3_1: ; %for.body
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; =>This Inner Loop Header: Depth=1
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add w11, w10, w9
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str w11, [x8, x9, lsl #2]
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add x9, x9, #1 ; =#1
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cmp w9, #128 ; =#128
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b.ne LBB3_1
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; BB#2: ; %for.cond2.preheader
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mov x9, xzr
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mov w0, wzr
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add x8, x8, w5, sxtw #2
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LBB3_3: ; %for.body4
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; =>This Inner Loop Header: Depth=1
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ldr w10, [x8, x9]
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add x9, x9, #4 ; =#4
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cmp w9, #512 ; =#512
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add w0, w10, w0
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b.ne LBB3_3
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; BB#4: ; %for.end11
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add sp, sp, #512 ; =#512
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ldp x28, x27, [sp], #16
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ret
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.cfi_endproc
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.comm _bar,4,2 ; @bar
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.subsections_via_symbols
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