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add some nounwind's.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119086 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2010-11-14 22:22:14 +00:00
parent 2ead458ae8
commit 261bc89fa1
5 changed files with 6 additions and 6 deletions
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2
test/CodeGen/PowerPC/2007-03-24-cntlzd.ll
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@ -1,6 +1,6 @@
; RUN: llc < %s -march=ppc64 -mcpu=g5 | grep cntlzd
define i32 @_ZNK4llvm5APInt17countLeadingZerosEv(i64 *%t) {
define i32 @_ZNK4llvm5APInt17countLeadingZerosEv(i64 *%t) nounwind {
%tmp19 = load i64* %t
%tmp22 = tail call i64 @llvm.ctlz.i64( i64 %tmp19 ) ; <i64> [#uses=1]
%tmp23 = trunc i64 %tmp22 to i32

2
test/CodeGen/PowerPC/compare-simm.ll
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@ -1,7 +1,7 @@
; RUN: llc < %s -march=ppc32 -mtriple=powerpc-apple-darwin8 | \
; RUN: grep {cmpwi cr0, r3, -1}
define i32 @test(i32 %x) {
define i32 @test(i32 %x) nounwind {
%c = icmp eq i32 %x, -1
br i1 %c, label %T, label %F
T:

2
test/CodeGen/PowerPC/rlwimi2.ll
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@ -4,7 +4,7 @@
; RUN: grep srwi %t | count 1
; RUN: not grep slwi %t
define i16 @test1(i32 %srcA, i32 %srcB, i32 %alpha) {
define i16 @test1(i32 %srcA, i32 %srcB, i32 %alpha) nounwind {
entry:
%tmp.1 = shl i32 %srcA, 15 ; <i32> [#uses=1]
%tmp.4 = and i32 %tmp.1, 32505856 ; <i32> [#uses=1]

4
test/CodeGen/PowerPC/stfiwx.ll
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@ -6,13 +6,13 @@
; RUN: not grep stfiwx %t2
; RUN: grep r1 %t2
define void @test(float %a, i32* %b) {
define void @test(float %a, i32* %b) nounwind {
%tmp.2 = fptosi float %a to i32 ; <i32> [#uses=1]
store i32 %tmp.2, i32* %b
ret void
}
define void @test2(float %a, i32* %b, i32 %i) {
define void @test2(float %a, i32* %b, i32 %i) nounwind {
%tmp.2 = getelementptr i32* %b, i32 1 ; <i32*> [#uses=1]
%tmp.5 = getelementptr i32* %b, i32 %i ; <i32*> [#uses=1]
%tmp.7 = fptosi float %a to i32 ; <i32> [#uses=3]

2
test/CodeGen/PowerPC/unsafe-math.ll
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@ -2,7 +2,7 @@
; RUN: llc < %s -march=ppc32 -enable-unsafe-fp-math | \
; RUN: grep fmul | count 1
define double @foo(double %X) {
define double @foo(double %X) nounwind {
%tmp1 = fmul double %X, 1.23
%tmp2 = fmul double %tmp1, 4.124
ret double %tmp2