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Move test to Transforms/InstCombine.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131634 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1,5 +1,4 @@
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; RUN: llc < %s -march=x86-64 -mattr=sse41 | FileCheck %s
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; RUN: opt -std-compile-opts < %s | llc -march=x86-64 -mattr=sse41 | FileCheck --check-prefix=CHECK_OPT_LLC %s
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define <8 x i16> @shuf6(<8 x i16> %T0, <8 x i16> %T1) nounwind readnone {
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; CHECK: pshufb
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@ -15,21 +14,3 @@ define <8 x i16> @shuf7(<8 x i16> %t0) {
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%tmp10 = shufflevector <8 x i16> %t0, <8 x i16> undef, <8 x i32> < i32 undef, i32 2, i32 2, i32 2, i32 2, i32 2, i32 undef, i32 undef >
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ret <8 x i16> %tmp10
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}
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; <rdar://problem/6945110>
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define <4 x i32> @kernel3_vertical(<4 x i16> * %src, <8 x i16> * %foo) nounwind {
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entry:
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; CHECK_OPT_LLC: call{{.*nothing}}
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call void @nothing()
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%tmp = load <4 x i16>* %src
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%tmp1 = load <8 x i16>* %foo
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; pmovzxwd ignores the upper 64-bits of its input; everything between the call and pmovzxwd should be removed.
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%tmp2 = shufflevector <4 x i16> %tmp, <4 x i16> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef>
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%tmp3 = shufflevector <8 x i16> %tmp1, <8 x i16> %tmp2, <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 4, i32 5, i32 6, i32 7>
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; CHECK_OPT_LLC-NEXT: pmovzxwd
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%0 = call <4 x i32> @llvm.x86.sse41.pmovzxwd(<8 x i16> %tmp3)
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ret <4 x i32> %0
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}
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declare void @nothing() nounwind
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declare <4 x i32> @llvm.x86.sse41.pmovzxwd(<8 x i16>) nounwind readnone
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@ -136,3 +136,19 @@ declare i32 @llvm.x86.sse2.cvtsd2si(<2 x double>)
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declare i64 @llvm.x86.sse2.cvtsd2si64(<2 x double>)
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declare i32 @llvm.x86.sse2.cvttsd2si(<2 x double>)
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declare i64 @llvm.x86.sse2.cvttsd2si64(<2 x double>)
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; <rdar://problem/6945110>
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define <4 x i32> @kernel3_vertical(<4 x i16> * %src, <8 x i16> * %foo) nounwind {
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entry:
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%tmp = load <4 x i16>* %src
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%tmp1 = load <8 x i16>* %foo
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; CHECK: %tmp2 = shufflevector
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%tmp2 = shufflevector <4 x i16> %tmp, <4 x i16> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef>
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; pmovzxwd ignores the upper 64-bits of its input; -instcombine should remove this shuffle:
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; CHECK-NOT: shufflevector
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%tmp3 = shufflevector <8 x i16> %tmp1, <8 x i16> %tmp2, <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 4, i32 5, i32 6, i32 7>
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; CHECK-NEXT: pmovzxwd
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%0 = call <4 x i32> @llvm.x86.sse41.pmovzxwd(<8 x i16> %tmp3)
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ret <4 x i32> %0
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}
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declare <4 x i32> @llvm.x86.sse41.pmovzxwd(<8 x i16>) nounwind readnone
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