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comment fixes

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43168 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2007-10-19 04:08:28 +00:00
parent 597ab48ca0
commit 26cb2862e9
1 changed files with 3 additions and 3 deletions
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6
lib/Target/PowerPC/PPCISelLowering.cpp
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@ -231,12 +231,12 @@ PPCTargetLowering::PPCTargetLowering(PPCTargetMachine &TM)
}
if (TM.getSubtarget<PPCSubtarget>().use64BitRegs()) {
// 64 bit PowerPC implementations can support i64 types directly
// 64-bit PowerPC implementations can support i64 types directly
addRegisterClass(MVT::i64, PPC::G8RCRegisterClass);
// BUILD_PAIR can't be handled natively, and should be expanded to shl/or
setOperationAction(ISD::BUILD_PAIR, MVT::i64, Expand);
} else {
// 32 bit PowerPC wants to expand i64 shifts itself.
// 32-bit PowerPC wants to expand i64 shifts itself.
setOperationAction(ISD::SHL_PARTS, MVT::i32, Custom);
setOperationAction(ISD::SRA_PARTS, MVT::i32, Custom);
setOperationAction(ISD::SRL_PARTS, MVT::i32, Custom);
@ -2105,7 +2105,7 @@ static SDOperand LowerFP_ROUND_INREG(SDOperand Op, SelectionDAG &DAG) {
assert(Op.getValueType() == MVT::ppcf128);
SDNode *Node = Op.Val;
assert(Node->getOperand(0).getValueType() == MVT::ppcf128);
assert(Node->getOperand(0).Val->getOpcode()==ISD::BUILD_PAIR);
assert(Node->getOperand(0).Val->getOpcode() == ISD::BUILD_PAIR);
SDOperand Lo = Node->getOperand(0).Val->getOperand(0);
SDOperand Hi = Node->getOperand(0).Val->getOperand(1);