mirror of
https://github.com/RPCS3/llvm.git
synced 2025-02-12 05:40:30 +00:00
R600: Do not mergevector after a vector reg is used
If we merge vector when a vector is used, it will generate an artificial antidependency that can prevent 2 tex/vtx instructions to use the same clause and thus generate extra clauses that reduce performance. There is no test case as such situation is really hard to predict. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187516 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
parent
8e37705a73
commit
26db9ecfac
@ -322,8 +322,17 @@ bool R600VectorRegMerger::runOnMachineFunction(MachineFunction &Fn) {
|
||||
for (MachineBasicBlock::iterator MII = MB->begin(), MIIE = MB->end();
|
||||
MII != MIIE; ++MII) {
|
||||
MachineInstr *MI = MII;
|
||||
if (MI->getOpcode() != AMDGPU::REG_SEQUENCE)
|
||||
if (MI->getOpcode() != AMDGPU::REG_SEQUENCE) {
|
||||
if (TII->get(MI->getOpcode()).TSFlags & R600_InstFlag::TEX_INST) {
|
||||
unsigned Reg = MI->getOperand(1).getReg();
|
||||
for (MachineRegisterInfo::def_iterator It = MRI->def_begin(Reg),
|
||||
E = MRI->def_end(); It != E; ++It) {
|
||||
RemoveMI(&(*It));
|
||||
}
|
||||
}
|
||||
continue;
|
||||
}
|
||||
|
||||
|
||||
RegSeqInfo RSI(*MRI, MI);
|
||||
|
||||
|
Loading…
x
Reference in New Issue
Block a user