[Hexagon] Creating HexagonMCInstrInfo namespace as landing zone for static functions detached from HexagonMCInst.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229885 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Colin LeMahieu 2015-02-19 19:00:00 +00:00
parent 0f842f925d
commit 27eb697fea
7 changed files with 87 additions and 40 deletions

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@ -5,6 +5,7 @@ add_llvm_library(LLVMHexagonDesc
HexagonMCAsmInfo.cpp HexagonMCAsmInfo.cpp
HexagonMCCodeEmitter.cpp HexagonMCCodeEmitter.cpp
HexagonMCInst.cpp HexagonMCInst.cpp
HexagonMCInstrInfo.cpp
HexagonMCTargetDesc.cpp HexagonMCTargetDesc.cpp
) )

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@ -11,6 +11,7 @@
#include "MCTargetDesc/HexagonBaseInfo.h" #include "MCTargetDesc/HexagonBaseInfo.h"
#include "MCTargetDesc/HexagonMCCodeEmitter.h" #include "MCTargetDesc/HexagonMCCodeEmitter.h"
#include "MCTargetDesc/HexagonMCInst.h" #include "MCTargetDesc/HexagonMCInst.h"
#include "MCTargetDesc/HexagonMCInstrInfo.h"
#include "MCTargetDesc/HexagonMCTargetDesc.h" #include "MCTargetDesc/HexagonMCTargetDesc.h"
#include "llvm/ADT/Statistic.h" #include "llvm/ADT/Statistic.h"
#include "llvm/MC/MCCodeEmitter.h" #include "llvm/MC/MCCodeEmitter.h"
@ -51,14 +52,15 @@ void emitLittleEndian(uint64_t Binary, raw_ostream &OS) {
HexagonMCCodeEmitter::HexagonMCCodeEmitter(MCInstrInfo const &aMII, HexagonMCCodeEmitter::HexagonMCCodeEmitter(MCInstrInfo const &aMII,
MCSubtargetInfo const &aMST, MCSubtargetInfo const &aMST,
MCContext &aMCT) MCContext &aMCT)
: MST(aMST), MCT(aMCT) {} : MST(aMST), MCT(aMCT), MCII (aMII) {}
void HexagonMCCodeEmitter::EncodeInstruction(MCInst const &MI, raw_ostream &OS, void HexagonMCCodeEmitter::EncodeInstruction(MCInst const &MI, raw_ostream &OS,
SmallVectorImpl<MCFixup> &Fixups, SmallVectorImpl<MCFixup> &Fixups,
MCSubtargetInfo const &STI) const { MCSubtargetInfo const &STI) const {
HexagonMCInst const &HMB = static_cast<HexagonMCInst const &>(MI); HexagonMCInst const &HMB = static_cast<HexagonMCInst const &>(MI);
uint64_t Binary = getBinaryCodeForInstr(HMB, Fixups, STI) | getPacketBits(HMB); uint64_t Binary = getBinaryCodeForInstr(HMB, Fixups, STI) | getPacketBits(HMB);
assert(HMB.getDesc().getSize() == 4 && "All instructions should be 32bit"); assert(HexagonMCInstrInfo::getDesc(MCII, HMB).getSize() == 4 &&
"All instructions should be 32bit");
emitLittleEndian(Binary, OS); emitLittleEndian(Binary, OS);
++MCNumEmitted; ++MCNumEmitted;
} }

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@ -28,6 +28,7 @@ namespace llvm {
class HexagonMCCodeEmitter : public MCCodeEmitter { class HexagonMCCodeEmitter : public MCCodeEmitter {
MCSubtargetInfo const &MST; MCSubtargetInfo const &MST;
MCContext &MCT; MCContext &MCT;
MCInstrInfo const &MCII;
public: public:
HexagonMCCodeEmitter(MCInstrInfo const &aMII, MCSubtargetInfo const &aMST, HexagonMCCodeEmitter(MCInstrInfo const &aMII, MCSubtargetInfo const &aMST,

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@ -13,6 +13,7 @@
#include "MCTargetDesc/HexagonBaseInfo.h" #include "MCTargetDesc/HexagonBaseInfo.h"
#include "MCTargetDesc/HexagonMCInst.h" #include "MCTargetDesc/HexagonMCInst.h"
#include "MCTargetDesc/HexagonMCInstrInfo.h"
#include "MCTargetDesc/HexagonMCTargetDesc.h" #include "MCTargetDesc/HexagonMCTargetDesc.h"
using namespace llvm; using namespace llvm;
@ -64,21 +65,17 @@ void HexagonMCInst::resetPacket() {
setPacketEnd(false); setPacketEnd(false);
} }
MCInstrDesc const &HexagonMCInst::getDesc() const {
return (MCII->get(getOpcode()));
}
// Return the Hexagon ISA class for the insn. // Return the Hexagon ISA class for the insn.
unsigned HexagonMCInst::getType() const { unsigned HexagonMCInst::getType() const {
const uint64_t F = getDesc().TSFlags; const uint64_t F = HexagonMCInstrInfo::getDesc(*MCII, *this).TSFlags;
return ((F >> HexagonII::TypePos) & HexagonII::TypeMask); return ((F >> HexagonII::TypePos) & HexagonII::TypeMask);
} }
// Return whether the insn is an actual insn. // Return whether the insn is an actual insn.
bool HexagonMCInst::isCanon() const { bool HexagonMCInst::isCanon() const {
return (!getDesc().isPseudo() && !isPrefix() && return (!HexagonMCInstrInfo::getDesc(*MCII, *this).isPseudo() &&
getType() != HexagonII::TypeENDLOOP); !isPrefix() && getType() != HexagonII::TypeENDLOOP);
} }
// Return whether the insn is a prefix. // Return whether the insn is a prefix.
@ -88,25 +85,25 @@ bool HexagonMCInst::isPrefix() const {
// Return whether the insn is solo, i.e., cannot be in a packet. // Return whether the insn is solo, i.e., cannot be in a packet.
bool HexagonMCInst::isSolo() const { bool HexagonMCInst::isSolo() const {
const uint64_t F = getDesc().TSFlags; const uint64_t F = HexagonMCInstrInfo::getDesc(*MCII, *this).TSFlags;
return ((F >> HexagonII::SoloPos) & HexagonII::SoloMask); return ((F >> HexagonII::SoloPos) & HexagonII::SoloMask);
} }
// Return whether the insn is a new-value consumer. // Return whether the insn is a new-value consumer.
bool HexagonMCInst::isNewValue() const { bool HexagonMCInst::isNewValue() const {
const uint64_t F = getDesc().TSFlags; const uint64_t F = HexagonMCInstrInfo::getDesc(*MCII, *this).TSFlags;
return ((F >> HexagonII::NewValuePos) & HexagonII::NewValueMask); return ((F >> HexagonII::NewValuePos) & HexagonII::NewValueMask);
} }
// Return whether the instruction is a legal new-value producer. // Return whether the instruction is a legal new-value producer.
bool HexagonMCInst::hasNewValue() const { bool HexagonMCInst::hasNewValue() const {
const uint64_t F = getDesc().TSFlags; const uint64_t F = HexagonMCInstrInfo::getDesc(*MCII, *this).TSFlags;
return ((F >> HexagonII::hasNewValuePos) & HexagonII::hasNewValueMask); return ((F >> HexagonII::hasNewValuePos) & HexagonII::hasNewValueMask);
} }
// Return the operand that consumes or produces a new value. // Return the operand that consumes or produces a new value.
const MCOperand &HexagonMCInst::getNewValue() const { const MCOperand &HexagonMCInst::getNewValue() const {
const uint64_t F = getDesc().TSFlags; const uint64_t F = HexagonMCInstrInfo::getDesc(*MCII, *this).TSFlags;
const unsigned O = const unsigned O =
(F >> HexagonII::NewValueOpPos) & HexagonII::NewValueOpMask; (F >> HexagonII::NewValueOpPos) & HexagonII::NewValueOpMask;
const MCOperand &MCO = getOperand(O); const MCOperand &MCO = getOperand(O);
@ -132,7 +129,7 @@ bool HexagonMCInst::isConstExtended(void) const {
short ExtOpNum = getCExtOpNum(); short ExtOpNum = getCExtOpNum();
int MinValue = getMinValue(); int MinValue = getMinValue();
int MaxValue = getMaxValue(); int MaxValue = HexagonMCInstrInfo::getMaxValue(*MCII, *this);
const MCOperand &MO = getOperand(ExtOpNum); const MCOperand &MO = getOperand(ExtOpNum);
// We could be using an instruction with an extendable immediate and shoehorn // We could be using an instruction with an extendable immediate and shoehorn
@ -154,31 +151,31 @@ bool HexagonMCInst::isConstExtended(void) const {
// Return whether the instruction must be always extended. // Return whether the instruction must be always extended.
bool HexagonMCInst::isExtended(void) const { bool HexagonMCInst::isExtended(void) const {
const uint64_t F = getDesc().TSFlags; const uint64_t F = HexagonMCInstrInfo::getDesc(*MCII, *this).TSFlags;
return (F >> HexagonII::ExtendedPos) & HexagonII::ExtendedMask; return (F >> HexagonII::ExtendedPos) & HexagonII::ExtendedMask;
} }
// Return true if the instruction may be extended based on the operand value. // Return true if the instruction may be extended based on the operand value.
bool HexagonMCInst::isExtendable(void) const { bool HexagonMCInst::isExtendable(void) const {
const uint64_t F = getDesc().TSFlags; const uint64_t F = HexagonMCInstrInfo::getDesc(*MCII, *this).TSFlags;
return (F >> HexagonII::ExtendablePos) & HexagonII::ExtendableMask; return (F >> HexagonII::ExtendablePos) & HexagonII::ExtendableMask;
} }
// Return number of bits in the constant extended operand. // Return number of bits in the constant extended operand.
unsigned HexagonMCInst::getBitCount(void) const { unsigned HexagonMCInst::getBitCount(void) const {
const uint64_t F = getDesc().TSFlags; const uint64_t F = HexagonMCInstrInfo::getDesc(*MCII, *this).TSFlags;
return ((F >> HexagonII::ExtentBitsPos) & HexagonII::ExtentBitsMask); return ((F >> HexagonII::ExtentBitsPos) & HexagonII::ExtentBitsMask);
} }
// Return constant extended operand number. // Return constant extended operand number.
unsigned short HexagonMCInst::getCExtOpNum(void) const { unsigned short HexagonMCInst::getCExtOpNum(void) const {
const uint64_t F = getDesc().TSFlags; const uint64_t F = HexagonMCInstrInfo::getDesc(*MCII, *this).TSFlags;
return ((F >> HexagonII::ExtendableOpPos) & HexagonII::ExtendableOpMask); return ((F >> HexagonII::ExtendableOpPos) & HexagonII::ExtendableOpMask);
} }
// Return whether the operand can be constant extended. // Return whether the operand can be constant extended.
bool HexagonMCInst::isOperandExtended(const unsigned short OperandNum) const { bool HexagonMCInst::isOperandExtended(const unsigned short OperandNum) const {
const uint64_t F = getDesc().TSFlags; const uint64_t F = HexagonMCInstrInfo::getDesc(*MCII, *this).TSFlags;
return ((F >> HexagonII::ExtendableOpPos) & HexagonII::ExtendableOpMask) == return ((F >> HexagonII::ExtendableOpPos) & HexagonII::ExtendableOpMask) ==
OperandNum; OperandNum;
} }
@ -186,7 +183,7 @@ bool HexagonMCInst::isOperandExtended(const unsigned short OperandNum) const {
// Return the min value that a constant extendable operand can have // Return the min value that a constant extendable operand can have
// without being extended. // without being extended.
int HexagonMCInst::getMinValue(void) const { int HexagonMCInst::getMinValue(void) const {
const uint64_t F = getDesc().TSFlags; const uint64_t F = HexagonMCInstrInfo::getDesc(*MCII, *this).TSFlags;
unsigned isSigned = unsigned isSigned =
(F >> HexagonII::ExtentSignedPos) & HexagonII::ExtentSignedMask; (F >> HexagonII::ExtentSignedPos) & HexagonII::ExtentSignedMask;
unsigned bits = (F >> HexagonII::ExtentBitsPos) & HexagonII::ExtentBitsMask; unsigned bits = (F >> HexagonII::ExtentBitsPos) & HexagonII::ExtentBitsMask;
@ -196,17 +193,3 @@ int HexagonMCInst::getMinValue(void) const {
else else
return 0; return 0;
} }
// Return the max value that a constant extendable operand can have
// without being extended.
int HexagonMCInst::getMaxValue(void) const {
const uint64_t F = getDesc().TSFlags;
unsigned isSigned =
(F >> HexagonII::ExtentSignedPos) & HexagonII::ExtentSignedMask;
unsigned bits = (F >> HexagonII::ExtentBitsPos) & HexagonII::ExtentBitsMask;
if (isSigned) // if value is signed
return ~(-1U << (bits - 1));
else
return ~(-1U << bits);
}

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@ -52,8 +52,6 @@ public:
// Return the Hexagon ISA class for the insn. // Return the Hexagon ISA class for the insn.
unsigned getType() const; unsigned getType() const;
MCInstrDesc const &getDesc() const;
// Return whether the insn is an actual insn. // Return whether the insn is an actual insn.
bool isCanon() const; bool isCanon() const;
@ -94,10 +92,6 @@ private:
// Return the min value that a constant extendable operand can have // Return the min value that a constant extendable operand can have
// without being extended. // without being extended.
int getMinValue() const; int getMinValue() const;
// Return the max value that a constant extendable operand can have
// without being extended.
int getMaxValue() const;
}; };
} }

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@ -0,0 +1,37 @@
//===- HexagonMCInstrInfo.cpp - Hexagon sub-class of MCInst ---------------===//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
// This class extends MCInstrInfo to allow Hexagon specific MCInstr queries
//
//===----------------------------------------------------------------------===//
#include "HexagonMCInstrInfo.h"
#include "HexagonBaseInfo.h"
#include "llvm/MC/MCInstrInfo.h"
namespace llvm {
MCInstrDesc const &HexagonMCInstrInfo::getDesc(MCInstrInfo const &MCII,
MCInst const &MCI) {
return (MCII.get(MCI.getOpcode()));
}
// Return the max value that a constant extendable operand can have
// without being extended.
int HexagonMCInstrInfo::getMaxValue(MCInstrInfo const &MCII,
MCInst const &MCI) {
const uint64_t F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags;
unsigned isSigned =
(F >> HexagonII::ExtentSignedPos) & HexagonII::ExtentSignedMask;
unsigned bits = (F >> HexagonII::ExtentBitsPos) & HexagonII::ExtentBitsMask;
if (isSigned) // if value is signed
return ~(-1U << (bits - 1));
else
return ~(-1U << bits);
}
}

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@ -0,0 +1,29 @@
//===- HexagonMCInstrInfo.cpp - Hexagon sub-class of MCInst ---------------===//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
// Utility functions for Hexagon specific MCInst queries
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_LIB_TARGET_HEXAGON_MCTARGETDESC_HEXAGONMCINSTRINFO_H
#define LLVM_LIB_TARGET_HEXAGON_MCTARGETDESC_HEXAGONMCINSTRINFO_H
namespace llvm {
class MCInstrDesc;
class MCInstrInfo;
class MCInst;
namespace HexagonMCInstrInfo {
MCInstrDesc const &getDesc(MCInstrInfo const &MCII, MCInst const &MCI);
// Return the max value that a constant extendable operand can have
// without being extended.
int getMaxValue(MCInstrInfo const &MCII, MCInst const &MCI);
}
}
#endif // LLVM_LIB_TARGET_HEXAGON_MCTARGETDESC_HEXAGONMCINSTRINFO_H