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Fix PR14204

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- Add missing pattern on X86ISD::VZEXT from VR256 to VR256 when AVX2 is enabled.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166947 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Michael Liao 2012-10-29 17:57:12 +00:00
parent 9cc1fad5ad
commit 2a2263e744
2 changed files with 30 additions and 0 deletions
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15
lib/Target/X86/X86InstrSSE.td
View File

@ -5850,6 +5850,21 @@ let Predicates = [HasAVX2] in {
def : Pat<(v4i64 (X86vzext (v8i16 VR128:$src))), (VPMOVZXWQYrr VR128:$src)>;
def : Pat<(v4i64 (X86vzext (v4i32 VR128:$src))), (VPMOVZXDQYrr VR128:$src)>;
def : Pat<(v16i16 (X86vzext (v32i8 VR256:$src))),
(VPMOVZXBWYrr (EXTRACT_SUBREG VR256:$src, sub_xmm))>;
def : Pat<(v8i32 (X86vzext (v32i8 VR256:$src))),
(VPMOVZXBDYrr (EXTRACT_SUBREG VR256:$src, sub_xmm))>;
def : Pat<(v4i64 (X86vzext (v32i8 VR256:$src))),
(VPMOVZXBQYrr (EXTRACT_SUBREG VR256:$src, sub_xmm))>;
def : Pat<(v8i32 (X86vzext (v16i16 VR256:$src))),
(VPMOVZXWDYrr (EXTRACT_SUBREG VR256:$src, sub_xmm))>;
def : Pat<(v4i64 (X86vzext (v16i16 VR256:$src))),
(VPMOVZXWQYrr (EXTRACT_SUBREG VR256:$src, sub_xmm))>;
def : Pat<(v4i64 (X86vzext (v8i32 VR256:$src))),
(VPMOVZXDQYrr (EXTRACT_SUBREG VR256:$src, sub_xmm))>;
}
let Predicates = [HasAVX] in {

15
test/CodeGen/X86/pr14204.ll Normal file
View File

@ -0,0 +1,15 @@
; RUN: llc < %s -mtriple=x86_64-linux-pc -mcpu=core-avx2 | FileCheck %s
; FIXME: vpmovsxwd should be generated instead of vpmovzxwd followed by
; SLL/SRA.
define <8 x i32> @foo(<8 x i1> %bar) nounwind readnone {
entry:
%s = sext <8 x i1> %bar to <8 x i32>
ret <8 x i32> %s
; CHECK: foo
; CHECK: vpmovzxwd
; CHECK: vpslld
; CHECK: vpsrad
; CHECK: ret
}