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- Added zero_reg def to stand for register 0.

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- Added two variants of PredicateOperand: ImmutablePredicateOperand, whose predicate does not change after isel; PredicateDefOperand, which represent a predicate defintion operand.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37892 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng 2007-07-05 07:09:09 +00:00
parent 0e4a276c72
commit 2aa133ef72
1 changed files with 19 additions and 2 deletions
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21
lib/Target/Target.td
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@ -256,16 +256,33 @@ def i16imm : Operand<i16>;
def i32imm : Operand<i32>;
def i64imm : Operand<i64>;
/// zero_reg definition - Special node to stand for the zero register.
///
def zero_reg;
/// PredicateOperand - This can be used to define a predicate operand for an
/// instruction. OpTypes specifies the MIOperandInfo for the operand, and
/// AlwaysVal specifies the value of this predicate when set to "always
/// execute".
class PredicateOperand<ValueType ty, dag OpTypes, dag AlwaysVal> : Operand<ty> {
/// execute". If isOutput is true, then this is output operand. If isImmutable
/// is true, then the operand should not change after instruction selection.
class PredicateOperand<ValueType ty, dag OpTypes, dag AlwaysVal>
: Operand<ty> {
let MIOperandInfo = OpTypes;
bit isOutput = 0;
bit isImmutable = 0;
dag ExecuteAlways = AlwaysVal;
}
class ImmutablePredicateOperand<ValueType ty, dag OpTypes, dag AlwaysVal>
: PredicateOperand<ty, OpTypes, AlwaysVal> {
let isImmutable = 1;
}
class PredicateDefOperand<ValueType ty, dag OpTypes, dag AlwaysVal>
: PredicateOperand<ty, OpTypes, AlwaysVal> {
let isOutput = 1;
}
// InstrInfo - This class should only be instantiated once to provide parameters
// which are global to the the target machine.