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[Hexagon] Fix reserving emergency spill slots for register scavenger

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- R10 and R11 are not reserved registers.
- Check for reserved registers when finding unused caller-saved registers.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263977 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Krzysztof Parzyszek 2016-03-21 19:57:08 +00:00
parent c13556c771
commit 2be5a89f8e
3 changed files with 11 additions and 35 deletions
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29
lib/Target/Hexagon/HexagonFrameLowering.cpp
View File

@ -1046,26 +1046,19 @@ void HexagonFrameLowering::processFunctionBeforeFrameFinalized(
static bool needToReserveScavengingSpillSlots(MachineFunction &MF,
const HexagonRegisterInfo &HRI) {
MachineRegisterInfo &MRI = MF.getRegInfo();
const MCPhysReg *CallerSavedRegs = HRI.getCallerSavedRegs(&MF);
// Check for an unused caller-saved register.
for ( ; *CallerSavedRegs; ++CallerSavedRegs) {
MCPhysReg FreeReg = *CallerSavedRegs;
if (MRI.isPhysRegUsed(FreeReg))
continue;
BitVector Reserved = HRI.getReservedRegs(MF);
// Check aliased register usage.
bool IsCurrentRegUsed = false;
for (MCRegAliasIterator AI(FreeReg, &HRI, false); AI.isValid(); ++AI)
if (MRI.isPhysRegUsed(*AI)) {
IsCurrentRegUsed = true;
break;
}
if (IsCurrentRegUsed)
continue;
// Neither directly used nor used through an aliased register.
auto IsUsed = [&HRI,&MRI] (unsigned Reg) -> bool {
for (MCRegAliasIterator AI(Reg, &HRI, true); AI.isValid(); ++AI)
if (MRI.isPhysRegUsed(*AI))
return true;
return false;
}
};
// Check for an unused caller-saved register.
for (const MCPhysReg *P = HRI.getCallerSavedRegs(&MF); *P; ++P)
if (!IsUsed(*P))
return false;
// All caller-saved registers are used.
return true;
}

2
lib/Target/Hexagon/HexagonRegisterInfo.cpp
View File

@ -109,8 +109,6 @@ HexagonRegisterInfo::getCalleeSavedRegs(const MachineFunction *MF) const {
BitVector HexagonRegisterInfo::getReservedRegs(const MachineFunction &MF)
const {
BitVector Reserved(getNumRegs());
Reserved.set(HEXAGON_RESERVED_REG_1);
Reserved.set(HEXAGON_RESERVED_REG_2);
Reserved.set(Hexagon::R29);
Reserved.set(Hexagon::R30);
Reserved.set(Hexagon::R31);

15
lib/Target/Hexagon/HexagonRegisterInfo.h
View File

@ -21,21 +21,6 @@
#define GET_REGINFO_HEADER
#include "HexagonGenRegisterInfo.inc"
//
// We try not to hard code the reserved registers in our code,
// so the following two macros were defined. However, there
// are still a few places that R11 and R10 are hard wired.
// See below. If, in the future, we decided to change the reserved
// register. Don't forget changing the following places.
//
// 1. the "Defs" set of STriw_pred in HexagonInstrInfo.td
// 2. the "Defs" set of LDri_pred in HexagonInstrInfo.td
// 3. the definition of "IntRegs" in HexagonRegisterInfo.td
// 4. the definition of "DoubleRegs" in HexagonRegisterInfo.td
//
#define HEXAGON_RESERVED_REG_1 Hexagon::R10
#define HEXAGON_RESERVED_REG_2 Hexagon::R11
namespace llvm {
class HexagonRegisterInfo : public HexagonGenRegisterInfo {
public: