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Pseudo-ize ARM MOVPCRX

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120442 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jim Grosbach 2010-11-30 18:56:36 +00:00
parent b6e1e67b80
commit 2e812e1635
2 changed files with 19 additions and 8 deletions
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13
lib/Target/ARM/ARMAsmPrinter.cpp
View File

@ -806,6 +806,19 @@ void ARMAsmPrinter::EmitInstruction(const MachineInstr *MI) {
}
return;
}
case ARM::MOVPCRX: {
MCInst TmpInst;
TmpInst.setOpcode(ARM::MOVr);
TmpInst.addOperand(MCOperand::CreateReg(ARM::PC));
TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg()));
// Add predicate operands.
TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL));
TmpInst.addOperand(MCOperand::CreateReg(0));
// Add 's' bit operand (always reg0 for this)
TmpInst.addOperand(MCOperand::CreateReg(0));
OutStreamer.EmitInstruction(TmpInst);
return;
}
case ARM::BXr9_CALL:
case ARM::BX_CALL: {
{

14
lib/Target/ARM/ARMInstrInfo.td
View File

@ -1230,14 +1230,12 @@ let isBranch = 1, isTerminator = 1, isBarrier = 1, isIndirectBranch = 1 in {
}
// ARMV4 only
// FIXME: This should be a pseudo.
def MOVPCRX : AXI<(outs), (ins GPR:$dst), BrMiscFrm, IIC_Br, "mov\tpc, $dst",
[(brind GPR:$dst)]>,
Requires<[IsARM, NoV4T]> {
bits<4> dst;
let Inst{31-4} = 0b1110000110100000111100000000;
let Inst{3-0} = dst;
}
// FIXME: We would really like to define this as a vanilla ARMPat like:
// ARMPat<(brind GPR:$dst), (MOVr PC, GPR:$dst)>
// With that, however, we can't set isBranch, isTerminator, etc..
def MOVPCRX : ARMPseudoInst<(outs), (ins GPR:$dst),
Size4Bytes, IIC_Br, [(brind GPR:$dst)]>,
Requires<[IsARM, NoV4T]>;
}
// All calls clobber the non-callee saved registers. SP is marked as