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Remove assert from MachineLoop::getLoopPredecessor()
According to the documentation method returns predecessor if the given loop's header has exactly one unique predecessor outside the loop. Otherwise return null. In reality it asserts if there is no predecessor outside of the loop. The testcase has the loop where predecessors outside of the loop were not identified as analyzeBranch() was unable to process the mask branch and returned true. That is also not correct to assert for the truly dead loops. Differential Revision: https://reviews.llvm.org/D67634 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@372405 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -200,8 +200,6 @@ BlockT *LoopBase<BlockT, LoopT>::getLoopPredecessor() const {
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}
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}
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// Make sure there is only one exit out of the preheader.
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assert(Out && "Header of loop has no predecessors from outside loop?");
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return Out;
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}
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92
test/CodeGen/AMDGPU/loop_header_nopred.mir
Normal file
92
test/CodeGen/AMDGPU/loop_header_nopred.mir
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@ -0,0 +1,92 @@
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -march=amdgcn -o - -run-pass=block-placement -mcpu=gfx1010 -mattr=-inst-fwd-prefetch-bug -verify-machineinstrs %s | FileCheck -check-prefix=GCN %s
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# Used to fail with
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# Assertion `Out && "Header of loop has no predecessors from outside loop?"
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---
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name: loop_header_nopred
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body: |
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; GCN-LABEL: name: loop_header_nopred
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; GCN: bb.0:
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; GCN: successors: %bb.2(0x40000000), %bb.3(0x40000000)
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; GCN: S_CBRANCH_VCCZ %bb.3, implicit $vcc
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; GCN: S_BRANCH %bb.2
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; GCN: bb.6 (align 64):
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; GCN: successors: %bb.7(0x04000000), %bb.1(0x7c000000)
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; GCN: S_CBRANCH_VCCNZ %bb.7, implicit $vcc
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; GCN: bb.1:
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; GCN: successors: %bb.2(0x40000000), %bb.3(0x40000000)
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; GCN: S_CBRANCH_VCCNZ %bb.2, implicit $vcc
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; GCN: bb.3:
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; GCN: successors: %bb.4(0x40000000), %bb.6(0x40000000)
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; GCN: SI_MASK_BRANCH %bb.6, implicit $exec
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; GCN: S_BRANCH %bb.4
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; GCN: bb.2 (align 64):
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; GCN: successors: %bb.4(0x40000000), %bb.6(0x40000000)
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; GCN: SI_MASK_BRANCH %bb.6, implicit $exec
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; GCN: S_BRANCH %bb.4
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; GCN: bb.4:
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; GCN: successors: %bb.5(0x04000000), %bb.4(0x7c000000)
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; GCN: S_NOP 0
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; GCN: S_NOP 0
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; GCN: S_NOP 0
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; GCN: S_NOP 0
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; GCN: S_NOP 0
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; GCN: S_NOP 0
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; GCN: S_NOP 0
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; GCN: S_NOP 0
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; GCN: S_NOP 0
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; GCN: S_NOP 0
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; GCN: S_NOP 0
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; GCN: S_CBRANCH_EXECZ %bb.4, implicit $exec
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; GCN: bb.5:
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; GCN: successors: %bb.6(0x80000000)
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; GCN: S_BRANCH %bb.6
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; GCN: bb.7:
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; GCN: S_ENDPGM 0
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bb.0:
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successors: %bb.1(0x80000000)
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bb.1:
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successors: %bb.2(0x40000000), %bb.3(0x40000000)
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S_CBRANCH_VCCZ %bb.3, implicit $vcc
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S_BRANCH %bb.2
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bb.2:
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successors: %bb.3(0x80000000)
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bb.3:
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successors: %bb.4(0x40000000), %bb.6(0x40000000)
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SI_MASK_BRANCH %bb.6, implicit $exec
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S_BRANCH %bb.4
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bb.4:
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successors: %bb.5(0x04000000), %bb.4(0x7c000000)
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S_NOP 0
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S_NOP 0
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S_NOP 0
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S_NOP 0
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S_NOP 0
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S_NOP 0
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S_NOP 0
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S_NOP 0
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S_NOP 0
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S_NOP 0
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S_NOP 0
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S_CBRANCH_EXECZ %bb.4, implicit $exec
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bb.5:
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successors: %bb.6(0x80000000)
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bb.6:
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successors: %bb.7(0x04000000), %bb.1(0x7c000000)
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S_CBRANCH_VCCZ %bb.1, implicit $vcc
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bb.7:
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S_ENDPGM 0
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...
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