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[globalisel][tablegen] Import rules containing intrinsic_wo_chain.
Summary: As of this patch, 1018 out of 3938 rules are currently imported. Depends on D32275 Reviewers: qcolombet, kristof.beyls, rovka, t.p.northover, ab, aditya_nandakumar Reviewed By: qcolombet Subscribers: dberris, igorb, llvm-commits Differential Revision: https://reviews.llvm.org/D32278 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307240 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -64,6 +64,7 @@ def : GINodeEquiv<G_FREM, frem>;
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def : GINodeEquiv<G_FPOW, fpow>;
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def : GINodeEquiv<G_FEXP2, fexp2>;
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def : GINodeEquiv<G_FLOG2, flog2>;
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def : GINodeEquiv<G_INTRINSIC, intrinsic_wo_chain>;
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def : GINodeEquiv<G_BR, br>;
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// Specifies the GlobalISel equivalents for SelectionDAG's ComplexPattern.
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@ -7,6 +7,10 @@ include "llvm/Target/Target.td"
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def MyTargetISA : InstrInfo;
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def MyTarget : Target { let InstructionSet = MyTargetISA; }
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let TargetPrefix = "mytarget" in {
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def int_mytarget_nop : Intrinsic<[llvm_i32_ty], [llvm_i32_ty], [IntrNoMem]>;
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}
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def R0 : Register<"r0"> { let Namespace = "MyTarget"; }
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def GPR32 : RegisterClass<"MyTarget", [i32], 32, (add R0)>;
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def GPR32Op : RegisterOperand<GPR32>;
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@ -156,9 +160,42 @@ def : Pat<(select GPR32:$src1, complex:$src2, complex:$src3),
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def ADD : I<(outs GPR32:$dst), (ins GPR32:$src1, GPR32:$src2),
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[(set GPR32:$dst, (add GPR32:$src1, GPR32:$src2))]>;
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//===- Test a nested instruction match. -----------------------------------===//
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//===- Test a simple pattern with an intrinsic. ---------------------------===//
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//
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// CHECK-LABEL: MatchTable2[] = {
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// CHECK-NEXT: GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
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// CHECK-NEXT: GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
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// CHECK-NEXT: // MIs[0] dst
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// CHECK-NEXT: GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
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// CHECK-NEXT: GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/MyTarget::GPR32RegClassID,
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// CHECK-NEXT: // MIs[0] Operand 1
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// CHECK-NEXT: GIM_CheckLiteralInt, /*MI*/0, /*Op*/1, [[ID:[0-9]+]],
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// CHECK-NEXT: // MIs[0] src1
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// CHECK-NEXT: GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
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// CHECK-NEXT: GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/MyTarget::GPR32RegClassID,
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// CHECK-NEXT: // (intrinsic_wo_chain:i32 [[ID]]:iPTR, GPR32:i32:$src1) => (MOV:i32 GPR32:i32:$src1)
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// CHECK-NEXT: GIR_BuildMI, /*InsnID*/0, /*Opcode*/MyTarget::MOV,
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// CHECK-NEXT: GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
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// CHECK-NEXT: GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
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// CHECK-NEXT: GIR_MergeMemOperands, /*InsnID*/0,
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// CHECK-NEXT: GIR_EraseFromParent, /*InsnID*/0,
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// CHECK-NEXT: GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
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// CHECK-NEXT: GIR_Done,
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// CHECK-NEXT: };
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// CHECK-NEXT: MIs.resize(1);
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// CHECK-NEXT: DEBUG(dbgs() << "Processing MatchTable2\n");
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// CHECK-NEXT: if (executeMatchTable(*this, OutMIs, State, MatcherInfo, MatchTable2, TII, MRI, TRI, RBI, AvailableFeatures)) {
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// CHECK-NEXT: return true;
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// CHECK-NEXT: }
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def MOV : I<(outs GPR32:$dst), (ins GPR32:$src1),
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[(set GPR32:$dst, (int_mytarget_nop GPR32:$src1))]>;
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//===- Test a nested instruction match. -----------------------------------===//
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// CHECK-LABEL: MatchTable3[] = {
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// CHECK-NEXT: GIM_CheckFeatures, GIFBS_HasA,
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// CHECK-NEXT: GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
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// CHECK-NEXT: GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
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@ -194,13 +231,13 @@ def ADD : I<(outs GPR32:$dst), (ins GPR32:$src1, GPR32:$src2),
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// CHECK-NEXT: GIR_Done,
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// CHECK-NEXT: };
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// CHECK-NEXT: MIs.resize(1);
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// CHECK-NEXT: DEBUG(dbgs() << "Processing MatchTable2\n");
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// CHECK-NEXT: if (executeMatchTable(*this, OutMIs, State, MatcherInfo, MatchTable2, TII, MRI, TRI, RBI, AvailableFeatures)) {
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// CHECK-NEXT: DEBUG(dbgs() << "Processing MatchTable3\n");
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// CHECK-NEXT: if (executeMatchTable(*this, OutMIs, State, MatcherInfo, MatchTable3, TII, MRI, TRI, RBI, AvailableFeatures)) {
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// CHECK-NEXT: return true;
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// CHECK-NEXT: }
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// We also get a second rule by commutativity.
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// CHECK-LABEL: MatchTable3[] = {
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// CHECK-LABEL: MatchTable4[] = {
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// CHECK-NEXT: GIM_CheckFeatures, GIFBS_HasA,
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// CHECK-NEXT: GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
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// CHECK-NEXT: GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2,
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@ -236,8 +273,8 @@ def ADD : I<(outs GPR32:$dst), (ins GPR32:$src1, GPR32:$src2),
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// CHECK-NEXT: GIR_Done,
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// CHECK-NEXT: };
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// CHECK-NEXT: MIs.resize(1);
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// CHECK-NEXT: DEBUG(dbgs() << "Processing MatchTable3\n");
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// CHECK-NEXT: if (executeMatchTable(*this, OutMIs, State, MatcherInfo, MatchTable3, TII, MRI, TRI, RBI, AvailableFeatures)) {
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// CHECK-NEXT: DEBUG(dbgs() << "Processing MatchTable4\n");
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// CHECK-NEXT: if (executeMatchTable(*this, OutMIs, State, MatcherInfo, MatchTable4, TII, MRI, TRI, RBI, AvailableFeatures)) {
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// CHECK-NEXT: return true;
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// CHECK-NEXT: }
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@ -248,7 +285,7 @@ def MULADD : I<(outs GPR32:$dst), (ins GPR32:$src1, GPR32:$src2, GPR32:$src3),
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//===- Test another simple pattern with regclass operands. ----------------===//
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// CHECK-LABEL: MatchTable4[] = {
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// CHECK-LABEL: MatchTable5[] = {
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// CHECK-NEXT: GIM_CheckFeatures, GIFBS_HasA_HasB_HasC,
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// CHECK-NEXT: GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
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// CHECK-NEXT: GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_MUL,
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@ -272,8 +309,8 @@ def MULADD : I<(outs GPR32:$dst), (ins GPR32:$src1, GPR32:$src2, GPR32:$src3),
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// CHECK-NEXT: GIR_Done,
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// CHECK-NEXT: };
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// CHECK-NEXT: MIs.resize(1);
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// CHECK-NEXT: DEBUG(dbgs() << "Processing MatchTable4\n");
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// CHECK-NEXT: if (executeMatchTable(*this, OutMIs, State, MatcherInfo, MatchTable4, TII, MRI, TRI, RBI, AvailableFeatures)) {
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// CHECK-NEXT: DEBUG(dbgs() << "Processing MatchTable5\n");
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// CHECK-NEXT: if (executeMatchTable(*this, OutMIs, State, MatcherInfo, MatchTable5, TII, MRI, TRI, RBI, AvailableFeatures)) {
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// CHECK-NEXT: return true;
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// CHECK-NEXT: }
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@ -283,7 +320,7 @@ def MUL : I<(outs GPR32:$dst), (ins GPR32:$src2, GPR32:$src1),
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//===- Test a more complex multi-instruction match. -----------------------===//
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// CHECK-LABEL: MatchTable5[] = {
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// CHECK-LABEL: MatchTable6[] = {
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// CHECK-NEXT: GIM_CheckFeatures, GIFBS_HasA,
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// CHECK-NEXT: GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
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// CHECK-NEXT: GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
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@ -331,8 +368,8 @@ def MUL : I<(outs GPR32:$dst), (ins GPR32:$src2, GPR32:$src1),
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// CHECK-NEXT: GIR_Done,
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// CHECK-NEXT: };
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// CHECK-NEXT: MIs.resize(1);
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// CHECK-NEXT: DEBUG(dbgs() << "Processing MatchTable5\n");
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// CHECK-NEXT: if (executeMatchTable(*this, OutMIs, State, MatcherInfo, MatchTable5, TII, MRI, TRI, RBI, AvailableFeatures)) {
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// CHECK-NEXT: DEBUG(dbgs() << "Processing MatchTable6\n");
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// CHECK-NEXT: if (executeMatchTable(*this, OutMIs, State, MatcherInfo, MatchTable6, TII, MRI, TRI, RBI, AvailableFeatures)) {
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// CHECK-NEXT: return true;
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// CHECK-NEXT: }
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@ -344,7 +381,7 @@ def INSNBOB : I<(outs GPR32:$dst), (ins GPR32:$src1, GPR32:$src2, GPR32:$src3, G
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//===- Test a pattern with ComplexPattern operands. -----------------------===//
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//
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// CHECK-LABEL: MatchTable6[] = {
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// CHECK-LABEL: MatchTable7[] = {
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// CHECK-NEXT: GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
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// CHECK-NEXT: GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_SUB,
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// CHECK-NEXT: // MIs[0] dst
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@ -367,8 +404,8 @@ def INSNBOB : I<(outs GPR32:$dst), (ins GPR32:$src1, GPR32:$src2, GPR32:$src3, G
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// CHECK-NEXT: GIR_Done,
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// CHECK-NEXT: };
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// CHECK-NEXT: MIs.resize(1);
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// CHECK-NEXT: DEBUG(dbgs() << "Processing MatchTable6\n");
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// CHECK-NEXT: if (executeMatchTable(*this, OutMIs, State, MatcherInfo, MatchTable6, TII, MRI, TRI, RBI, AvailableFeatures)) {
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// CHECK-NEXT: DEBUG(dbgs() << "Processing MatchTable7\n");
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// CHECK-NEXT: if (executeMatchTable(*this, OutMIs, State, MatcherInfo, MatchTable7, TII, MRI, TRI, RBI, AvailableFeatures)) {
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// CHECK-NEXT: return true;
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// CHECK-NEXT: }
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@ -378,7 +415,7 @@ def : Pat<(sub GPR32:$src1, complex:$src2), (INSN1 GPR32:$src1, complex:$src2)>;
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//===- Test a simple pattern with a default operand. ----------------------===//
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//
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// CHECK-LABEL: MatchTable7[] = {
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// CHECK-LABEL: MatchTable8[] = {
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// CHECK-NEXT: GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
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// CHECK-NEXT: GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_XOR,
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// CHECK-NEXT: // MIs[0] dst
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@ -401,8 +438,8 @@ def : Pat<(sub GPR32:$src1, complex:$src2), (INSN1 GPR32:$src1, complex:$src2)>;
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// CHECK-NEXT: GIR_Done,
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// CHECK-NEXT: };
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// CHECK-NEXT: MIs.resize(1);
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// CHECK-NEXT: DEBUG(dbgs() << "Processing MatchTable7\n");
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// CHECK-NEXT: if (executeMatchTable(*this, OutMIs, State, MatcherInfo, MatchTable7, TII, MRI, TRI, RBI, AvailableFeatures)) {
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// CHECK-NEXT: DEBUG(dbgs() << "Processing MatchTable8\n");
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// CHECK-NEXT: if (executeMatchTable(*this, OutMIs, State, MatcherInfo, MatchTable8, TII, MRI, TRI, RBI, AvailableFeatures)) {
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// CHECK-NEXT: return true;
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// CHECK-NEXT: }
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@ -413,7 +450,7 @@ def XORI : I<(outs GPR32:$dst), (ins m1:$src2, GPR32:$src1),
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//===- Test a simple pattern with a default register operand. -------------===//
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//
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// CHECK-LABEL: MatchTable8[] = {
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// CHECK-LABEL: MatchTable9[] = {
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// CHECK-NEXT: GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
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// CHECK-NEXT: GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_XOR,
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// CHECK-NEXT: // MIs[0] dst
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@ -436,8 +473,8 @@ def XORI : I<(outs GPR32:$dst), (ins m1:$src2, GPR32:$src1),
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// CHECK-NEXT: GIR_Done,
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// CHECK-NEXT: };
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// CHECK-NEXT: MIs.resize(1);
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// CHECK-NEXT: DEBUG(dbgs() << "Processing MatchTable8\n");
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// CHECK-NEXT: if (executeMatchTable(*this, OutMIs, State, MatcherInfo, MatchTable8, TII, MRI, TRI, RBI, AvailableFeatures)) {
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// CHECK-NEXT: DEBUG(dbgs() << "Processing MatchTable9\n");
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// CHECK-NEXT: if (executeMatchTable(*this, OutMIs, State, MatcherInfo, MatchTable9, TII, MRI, TRI, RBI, AvailableFeatures)) {
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// CHECK-NEXT: return true;
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// CHECK-NEXT: }
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@ -448,7 +485,7 @@ def XOR : I<(outs GPR32:$dst), (ins Z:$src2, GPR32:$src1),
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//===- Test a simple pattern with a multiple default operands. ------------===//
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//
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// CHECK-LABEL: MatchTable9[] = {
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// CHECK-LABEL: MatchTable10[] = {
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// CHECK-NEXT: GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
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// CHECK-NEXT: GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_XOR,
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// CHECK-NEXT: // MIs[0] dst
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@ -472,8 +509,8 @@ def XOR : I<(outs GPR32:$dst), (ins Z:$src2, GPR32:$src1),
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// CHECK-NEXT: GIR_Done,
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// CHECK-NEXT: };
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// CHECK-NEXT: MIs.resize(1);
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// CHECK-NEXT: DEBUG(dbgs() << "Processing MatchTable9\n");
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// CHECK-NEXT: if (executeMatchTable(*this, OutMIs, State, MatcherInfo, MatchTable9, TII, MRI, TRI, RBI, AvailableFeatures)) {
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// CHECK-NEXT: DEBUG(dbgs() << "Processing MatchTable10\n");
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// CHECK-NEXT: if (executeMatchTable(*this, OutMIs, State, MatcherInfo, MatchTable10, TII, MRI, TRI, RBI, AvailableFeatures)) {
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// CHECK-NEXT: return true;
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// CHECK-NEXT: }
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@ -484,7 +521,7 @@ def XORlike : I<(outs GPR32:$dst), (ins m1Z:$src2, GPR32:$src1),
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//===- Test a simple pattern with multiple operands with defaults. --------===//
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//
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// CHECK-LABEL: MatchTable10[] = {
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// CHECK-LABEL: MatchTable11[] = {
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// CHECK-NEXT: GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
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// CHECK-NEXT: GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_XOR,
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// CHECK-NEXT: // MIs[0] dst
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@ -509,8 +546,8 @@ def XORlike : I<(outs GPR32:$dst), (ins m1Z:$src2, GPR32:$src1),
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// CHECK-NEXT: GIR_Done,
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// CHECK-NEXT: };
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// CHECK-NEXT: MIs.resize(1);
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// CHECK-NEXT: DEBUG(dbgs() << "Processing MatchTable10\n");
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// CHECK-NEXT: if (executeMatchTable(*this, OutMIs, State, MatcherInfo, MatchTable10, TII, MRI, TRI, RBI, AvailableFeatures)) {
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// CHECK-NEXT: DEBUG(dbgs() << "Processing MatchTable11\n");
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// CHECK-NEXT: if (executeMatchTable(*this, OutMIs, State, MatcherInfo, MatchTable11, TII, MRI, TRI, RBI, AvailableFeatures)) {
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// CHECK-NEXT: return true;
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// CHECK-NEXT: }
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@ -523,7 +560,7 @@ def XORManyDefaults : I<(outs GPR32:$dst), (ins m1Z:$src3, Z:$src2, GPR32:$src1)
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// This must precede the 3-register variants because constant immediates have
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// priority over register banks.
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// CHECK-LABEL: MatchTable11[] = {
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// CHECK-LABEL: MatchTable12[] = {
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// CHECK-NEXT: GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
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// CHECK-NEXT: GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_XOR,
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// CHECK-NEXT: // MIs[0] dst
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@ -546,8 +583,8 @@ def XORManyDefaults : I<(outs GPR32:$dst), (ins m1Z:$src3, Z:$src2, GPR32:$src1)
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// CHECK-NEXT: GIR_Done,
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// CHECK-NEXT: };
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// CHECK-NEXT: MIs.resize(1);
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// CHECK-NEXT: DEBUG(dbgs() << "Processing MatchTable11\n");
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// CHECK-NEXT: if (executeMatchTable(*this, OutMIs, State, MatcherInfo, MatchTable11, TII, MRI, TRI, RBI, AvailableFeatures)) {
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// CHECK-NEXT: DEBUG(dbgs() << "Processing MatchTable12\n");
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// CHECK-NEXT: if (executeMatchTable(*this, OutMIs, State, MatcherInfo, MatchTable12, TII, MRI, TRI, RBI, AvailableFeatures)) {
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// CHECK-NEXT: return true;
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// CHECK-NEXT: }
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@ -557,7 +594,7 @@ def : Pat<(not GPR32:$Wm), (ORN R0, GPR32:$Wm)>;
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//===- Test a COPY_TO_REGCLASS --------------------------------------------===//
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//
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// CHECK-LABEL: MatchTable12[] = {
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// CHECK-LABEL: MatchTable13[] = {
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// CHECK-NEXT: GIM_CheckNumOperands, /*MI*/0, /*Expected*/2,
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// CHECK-NEXT: GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_BITCAST,
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// CHECK-NEXT: // MIs[0] dst
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@ -572,8 +609,8 @@ def : Pat<(not GPR32:$Wm), (ORN R0, GPR32:$Wm)>;
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// CHECK-NEXT: GIR_Done,
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// CHECK-NEXT: };
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// CHECK-NEXT: MIs.resize(1);
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// CHECK-NEXT: DEBUG(dbgs() << "Processing MatchTable12\n");
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// CHECK-NEXT: if (executeMatchTable(*this, OutMIs, State, MatcherInfo, MatchTable12, TII, MRI, TRI, RBI, AvailableFeatures)) {
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// CHECK-NEXT: DEBUG(dbgs() << "Processing MatchTable13\n");
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// CHECK-NEXT: if (executeMatchTable(*this, OutMIs, State, MatcherInfo, MatchTable13, TII, MRI, TRI, RBI, AvailableFeatures)) {
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// CHECK-NEXT: return true;
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// CHECK-NEXT: }
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@ -582,7 +619,7 @@ def : Pat<(i32 (bitconvert FPR32:$src1)),
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//===- Test a simple pattern with just a leaf immediate. ------------------===//
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// CHECK-LABEL: MatchTable13[] = {
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// CHECK-LABEL: MatchTable14[] = {
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// CHECK-NEXT: GIM_CheckNumOperands, /*MI*/0, /*Expected*/2,
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// CHECK-NEXT: GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_CONSTANT,
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// CHECK-NEXT: // MIs[0] dst
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@ -599,8 +636,8 @@ def : Pat<(i32 (bitconvert FPR32:$src1)),
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// CHECK-NEXT: GIR_Done,
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// CHECK-NEXT: };
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// CHECK-NEXT: MIs.resize(1);
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// CHECK-NEXT: DEBUG(dbgs() << "Processing MatchTable13\n");
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// CHECK-NEXT: if (executeMatchTable(*this, OutMIs, State, MatcherInfo, MatchTable13, TII, MRI, TRI, RBI, AvailableFeatures)) {
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// CHECK-NEXT: DEBUG(dbgs() << "Processing MatchTable14\n");
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// CHECK-NEXT: if (executeMatchTable(*this, OutMIs, State, MatcherInfo, MatchTable14, TII, MRI, TRI, RBI, AvailableFeatures)) {
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// CHECK-NEXT: return true;
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// CHECK-NEXT: }
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@ -608,7 +645,7 @@ def MOV1 : I<(outs GPR32:$dst), (ins), [(set GPR32:$dst, 1)]>;
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//===- Test a pattern with an MBB operand. --------------------------------===//
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// CHECK-LABEL: MatchTable14[] = {
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// CHECK-LABEL: MatchTable15[] = {
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// CHECK-NEXT: GIM_CheckNumOperands, /*MI*/0, /*Expected*/1,
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// CHECK-NEXT: GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_BR,
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// CHECK-NEXT: // MIs[0] target
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@ -619,8 +656,8 @@ def MOV1 : I<(outs GPR32:$dst), (ins), [(set GPR32:$dst, 1)]>;
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// CHECK-NEXT: GIR_Done,
|
||||
// CHECK-NEXT: };
|
||||
// CHECK-NEXT: MIs.resize(1);
|
||||
// CHECK-NEXT: DEBUG(dbgs() << "Processing MatchTable14\n");
|
||||
// CHECK-NEXT: if (executeMatchTable(*this, OutMIs, State, MatcherInfo, MatchTable14, TII, MRI, TRI, RBI, AvailableFeatures)) {
|
||||
// CHECK-NEXT: DEBUG(dbgs() << "Processing MatchTable15\n");
|
||||
// CHECK-NEXT: if (executeMatchTable(*this, OutMIs, State, MatcherInfo, MatchTable15, TII, MRI, TRI, RBI, AvailableFeatures)) {
|
||||
// CHECK-NEXT: return true;
|
||||
// CHECK-NEXT: }
|
||||
|
||||
|
@ -1454,6 +1454,8 @@ GlobalISelEmitter::importRulePredicates(RuleMatcher &M,
|
||||
|
||||
Expected<InstructionMatcher &> GlobalISelEmitter::createAndImportSelDAGMatcher(
|
||||
InstructionMatcher &InsnMatcher, const TreePatternNode *Src) const {
|
||||
const CodeGenInstruction *SrcGIOrNull = nullptr;
|
||||
|
||||
// Start with the defined operands (i.e., the results of the root operator).
|
||||
if (Src->getExtTypes().size() > 1)
|
||||
return failedImport("Src pattern has multiple results");
|
||||
@ -1467,7 +1469,7 @@ Expected<InstructionMatcher &> GlobalISelEmitter::createAndImportSelDAGMatcher(
|
||||
return failedImport(
|
||||
"Unable to deduce gMIR opcode to handle Src (which is a leaf)");
|
||||
} else {
|
||||
auto SrcGIOrNull = findNodeEquiv(Src->getOperator());
|
||||
SrcGIOrNull = findNodeEquiv(Src->getOperator());
|
||||
if (!SrcGIOrNull)
|
||||
return failedImport("Pattern operator lacks an equivalent Instruction" +
|
||||
explainOperator(Src->getOperator()));
|
||||
@ -1501,10 +1503,31 @@ Expected<InstructionMatcher &> GlobalISelEmitter::createAndImportSelDAGMatcher(
|
||||
return failedImport(
|
||||
"Unable to deduce gMIR opcode to handle Src (which is a leaf)");
|
||||
} else {
|
||||
assert(SrcGIOrNull &&
|
||||
"Expected to have already found an equivalent Instruction");
|
||||
// Match the used operands (i.e. the children of the operator).
|
||||
for (unsigned i = 0, e = Src->getNumChildren(); i != e; ++i) {
|
||||
if (auto Error = importChildMatcher(InsnMatcher, Src->getChild(i),
|
||||
OpIdx++, TempOpIdx))
|
||||
TreePatternNode *SrcChild = Src->getChild(i);
|
||||
|
||||
// For G_INTRINSIC, the operand immediately following the defs is an
|
||||
// intrinsic ID.
|
||||
if (SrcGIOrNull->TheDef->getName() == "G_INTRINSIC" && i == 0) {
|
||||
if (!SrcChild->isLeaf())
|
||||
return failedImport("Expected IntInit containing intrinsic ID");
|
||||
|
||||
if (IntInit *SrcChildIntInit =
|
||||
dyn_cast<IntInit>(SrcChild->getLeafValue())) {
|
||||
OperandMatcher &OM =
|
||||
InsnMatcher.addOperand(OpIdx++, SrcChild->getName(), TempOpIdx);
|
||||
OM.addPredicate<LiteralIntOperandMatcher>(SrcChildIntInit->getValue());
|
||||
continue;
|
||||
}
|
||||
|
||||
return failedImport("Expected IntInit containing instrinsic ID)");
|
||||
}
|
||||
|
||||
if (auto Error =
|
||||
importChildMatcher(InsnMatcher, SrcChild, OpIdx++, TempOpIdx))
|
||||
return std::move(Error);
|
||||
}
|
||||
}
|
||||
@ -1540,7 +1563,7 @@ Error GlobalISelEmitter::importChildMatcher(InstructionMatcher &InsnMatcher,
|
||||
|
||||
auto OpTyOrNone = MVTToLLT(ChildTypes.front().getConcrete());
|
||||
if (!OpTyOrNone)
|
||||
return failedImport("Src operand has an unsupported type");
|
||||
return failedImport("Src operand has an unsupported type (" + to_string(*SrcChild) + ")");
|
||||
OM.addPredicate<LLTOperandMatcher>(*OpTyOrNone);
|
||||
|
||||
// Check for nested instructions.
|
||||
|
Loading…
Reference in New Issue
Block a user