diff --git a/test/CodeGen/X86/avx-intrinsics-x86.ll b/test/CodeGen/X86/avx-intrinsics-x86.ll index f8d285866a7..c21784dad70 100644 --- a/test/CodeGen/X86/avx-intrinsics-x86.ll +++ b/test/CodeGen/X86/avx-intrinsics-x86.ll @@ -1,11 +1,17 @@ -; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py -; RUN: llc < %s -mtriple=i686-apple-darwin -mattr=avx,aes,pclmul | FileCheck %s +; NOTE: Assertions have been autogenerated by update_llc_test_checks.py +; RUN: llc < %s -mtriple=i686-apple-darwin -mattr=avx,aes,pclmul | FileCheck %s --check-prefix=AVX +; RUN: llc < %s -mtriple=i686-apple-darwin -mattr=avx512vl,aes,pclmul | FileCheck %s --check-prefix=AVX512VL define <2 x i64> @test_x86_aesni_aesdec(<2 x i64> %a0, <2 x i64> %a1) { -; CHECK-LABEL: test_x86_aesni_aesdec: -; CHECK: ## BB#0: -; CHECK-NEXT: vaesdec %xmm1, %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_aesni_aesdec: +; AVX: ## BB#0: +; AVX-NEXT: vaesdec %xmm1, %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_aesni_aesdec: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vaesdec %xmm1, %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <2 x i64> @llvm.x86.aesni.aesdec(<2 x i64> %a0, <2 x i64> %a1) ; <<2 x i64>> [#uses=1] ret <2 x i64> %res } @@ -13,10 +19,15 @@ declare <2 x i64> @llvm.x86.aesni.aesdec(<2 x i64>, <2 x i64>) nounwind readnone define <2 x i64> @test_x86_aesni_aesdeclast(<2 x i64> %a0, <2 x i64> %a1) { -; CHECK-LABEL: test_x86_aesni_aesdeclast: -; CHECK: ## BB#0: -; CHECK-NEXT: vaesdeclast %xmm1, %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_aesni_aesdeclast: +; AVX: ## BB#0: +; AVX-NEXT: vaesdeclast %xmm1, %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_aesni_aesdeclast: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vaesdeclast %xmm1, %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <2 x i64> @llvm.x86.aesni.aesdeclast(<2 x i64> %a0, <2 x i64> %a1) ; <<2 x i64>> [#uses=1] ret <2 x i64> %res } @@ -24,10 +35,15 @@ declare <2 x i64> @llvm.x86.aesni.aesdeclast(<2 x i64>, <2 x i64>) nounwind read define <2 x i64> @test_x86_aesni_aesenc(<2 x i64> %a0, <2 x i64> %a1) { -; CHECK-LABEL: test_x86_aesni_aesenc: -; CHECK: ## BB#0: -; CHECK-NEXT: vaesenc %xmm1, %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_aesni_aesenc: +; AVX: ## BB#0: +; AVX-NEXT: vaesenc %xmm1, %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_aesni_aesenc: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vaesenc %xmm1, %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <2 x i64> @llvm.x86.aesni.aesenc(<2 x i64> %a0, <2 x i64> %a1) ; <<2 x i64>> [#uses=1] ret <2 x i64> %res } @@ -35,10 +51,15 @@ declare <2 x i64> @llvm.x86.aesni.aesenc(<2 x i64>, <2 x i64>) nounwind readnone define <2 x i64> @test_x86_aesni_aesenclast(<2 x i64> %a0, <2 x i64> %a1) { -; CHECK-LABEL: test_x86_aesni_aesenclast: -; CHECK: ## BB#0: -; CHECK-NEXT: vaesenclast %xmm1, %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_aesni_aesenclast: +; AVX: ## BB#0: +; AVX-NEXT: vaesenclast %xmm1, %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_aesni_aesenclast: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vaesenclast %xmm1, %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <2 x i64> @llvm.x86.aesni.aesenclast(<2 x i64> %a0, <2 x i64> %a1) ; <<2 x i64>> [#uses=1] ret <2 x i64> %res } @@ -46,10 +67,15 @@ declare <2 x i64> @llvm.x86.aesni.aesenclast(<2 x i64>, <2 x i64>) nounwind read define <2 x i64> @test_x86_aesni_aesimc(<2 x i64> %a0) { -; CHECK-LABEL: test_x86_aesni_aesimc: -; CHECK: ## BB#0: -; CHECK-NEXT: vaesimc %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_aesni_aesimc: +; AVX: ## BB#0: +; AVX-NEXT: vaesimc %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_aesni_aesimc: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vaesimc %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <2 x i64> @llvm.x86.aesni.aesimc(<2 x i64> %a0) ; <<2 x i64>> [#uses=1] ret <2 x i64> %res } @@ -57,10 +83,15 @@ declare <2 x i64> @llvm.x86.aesni.aesimc(<2 x i64>) nounwind readnone define <2 x i64> @test_x86_aesni_aeskeygenassist(<2 x i64> %a0) { -; CHECK-LABEL: test_x86_aesni_aeskeygenassist: -; CHECK: ## BB#0: -; CHECK-NEXT: vaeskeygenassist $7, %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_aesni_aeskeygenassist: +; AVX: ## BB#0: +; AVX-NEXT: vaeskeygenassist $7, %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_aesni_aeskeygenassist: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vaeskeygenassist $7, %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <2 x i64> @llvm.x86.aesni.aeskeygenassist(<2 x i64> %a0, i8 7) ; <<2 x i64>> [#uses=1] ret <2 x i64> %res } @@ -68,10 +99,15 @@ declare <2 x i64> @llvm.x86.aesni.aeskeygenassist(<2 x i64>, i8) nounwind readno define <2 x double> @test_x86_sse2_add_sd(<2 x double> %a0, <2 x double> %a1) { -; CHECK-LABEL: test_x86_sse2_add_sd: -; CHECK: ## BB#0: -; CHECK-NEXT: vaddsd %xmm1, %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse2_add_sd: +; AVX: ## BB#0: +; AVX-NEXT: vaddsd %xmm1, %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse2_add_sd: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vaddsd %xmm1, %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <2 x double> @llvm.x86.sse2.add.sd(<2 x double> %a0, <2 x double> %a1) ; <<2 x double>> [#uses=1] ret <2 x double> %res } @@ -79,10 +115,15 @@ declare <2 x double> @llvm.x86.sse2.add.sd(<2 x double>, <2 x double>) nounwind define <2 x double> @test_x86_sse2_cmp_pd(<2 x double> %a0, <2 x double> %a1) { -; CHECK-LABEL: test_x86_sse2_cmp_pd: -; CHECK: ## BB#0: -; CHECK-NEXT: vcmpordpd %xmm1, %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse2_cmp_pd: +; AVX: ## BB#0: +; AVX-NEXT: vcmpordpd %xmm1, %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse2_cmp_pd: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vcmpordpd %xmm1, %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <2 x double> @llvm.x86.sse2.cmp.pd(<2 x double> %a0, <2 x double> %a1, i8 7) ; <<2 x double>> [#uses=1] ret <2 x double> %res } @@ -90,10 +131,15 @@ declare <2 x double> @llvm.x86.sse2.cmp.pd(<2 x double>, <2 x double>, i8) nounw define <2 x double> @test_x86_sse2_cmp_sd(<2 x double> %a0, <2 x double> %a1) { -; CHECK-LABEL: test_x86_sse2_cmp_sd: -; CHECK: ## BB#0: -; CHECK-NEXT: vcmpordsd %xmm1, %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse2_cmp_sd: +; AVX: ## BB#0: +; AVX-NEXT: vcmpordsd %xmm1, %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse2_cmp_sd: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vcmpordsd %xmm1, %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <2 x double> @llvm.x86.sse2.cmp.sd(<2 x double> %a0, <2 x double> %a1, i8 7) ; <<2 x double>> [#uses=1] ret <2 x double> %res } @@ -101,14 +147,23 @@ declare <2 x double> @llvm.x86.sse2.cmp.sd(<2 x double>, <2 x double>, i8) nounw define i32 @test_x86_sse2_comieq_sd(<2 x double> %a0, <2 x double> %a1) { -; CHECK-LABEL: test_x86_sse2_comieq_sd: -; CHECK: ## BB#0: -; CHECK-NEXT: vcomisd %xmm1, %xmm0 -; CHECK-NEXT: setnp %al -; CHECK-NEXT: sete %cl -; CHECK-NEXT: andb %al, %cl -; CHECK-NEXT: movzbl %cl, %eax -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse2_comieq_sd: +; AVX: ## BB#0: +; AVX-NEXT: vcomisd %xmm1, %xmm0 +; AVX-NEXT: setnp %al +; AVX-NEXT: sete %cl +; AVX-NEXT: andb %al, %cl +; AVX-NEXT: movzbl %cl, %eax +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse2_comieq_sd: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vcomisd %xmm1, %xmm0 +; AVX512VL-NEXT: setnp %al +; AVX512VL-NEXT: sete %cl +; AVX512VL-NEXT: andb %al, %cl +; AVX512VL-NEXT: movzbl %cl, %eax +; AVX512VL-NEXT: retl %res = call i32 @llvm.x86.sse2.comieq.sd(<2 x double> %a0, <2 x double> %a1) ; [#uses=1] ret i32 %res } @@ -116,12 +171,19 @@ declare i32 @llvm.x86.sse2.comieq.sd(<2 x double>, <2 x double>) nounwind readno define i32 @test_x86_sse2_comige_sd(<2 x double> %a0, <2 x double> %a1) { -; CHECK-LABEL: test_x86_sse2_comige_sd: -; CHECK: ## BB#0: -; CHECK-NEXT: vcomisd %xmm1, %xmm0 -; CHECK-NEXT: setae %al -; CHECK-NEXT: movzbl %al, %eax -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse2_comige_sd: +; AVX: ## BB#0: +; AVX-NEXT: vcomisd %xmm1, %xmm0 +; AVX-NEXT: setae %al +; AVX-NEXT: movzbl %al, %eax +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse2_comige_sd: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vcomisd %xmm1, %xmm0 +; AVX512VL-NEXT: setae %al +; AVX512VL-NEXT: movzbl %al, %eax +; AVX512VL-NEXT: retl %res = call i32 @llvm.x86.sse2.comige.sd(<2 x double> %a0, <2 x double> %a1) ; [#uses=1] ret i32 %res } @@ -129,12 +191,19 @@ declare i32 @llvm.x86.sse2.comige.sd(<2 x double>, <2 x double>) nounwind readno define i32 @test_x86_sse2_comigt_sd(<2 x double> %a0, <2 x double> %a1) { -; CHECK-LABEL: test_x86_sse2_comigt_sd: -; CHECK: ## BB#0: -; CHECK-NEXT: vcomisd %xmm1, %xmm0 -; CHECK-NEXT: seta %al -; CHECK-NEXT: movzbl %al, %eax -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse2_comigt_sd: +; AVX: ## BB#0: +; AVX-NEXT: vcomisd %xmm1, %xmm0 +; AVX-NEXT: seta %al +; AVX-NEXT: movzbl %al, %eax +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse2_comigt_sd: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vcomisd %xmm1, %xmm0 +; AVX512VL-NEXT: seta %al +; AVX512VL-NEXT: movzbl %al, %eax +; AVX512VL-NEXT: retl %res = call i32 @llvm.x86.sse2.comigt.sd(<2 x double> %a0, <2 x double> %a1) ; [#uses=1] ret i32 %res } @@ -142,12 +211,19 @@ declare i32 @llvm.x86.sse2.comigt.sd(<2 x double>, <2 x double>) nounwind readno define i32 @test_x86_sse2_comile_sd(<2 x double> %a0, <2 x double> %a1) { -; CHECK-LABEL: test_x86_sse2_comile_sd: -; CHECK: ## BB#0: -; CHECK-NEXT: vcomisd %xmm0, %xmm1 -; CHECK-NEXT: setae %al -; CHECK-NEXT: movzbl %al, %eax -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse2_comile_sd: +; AVX: ## BB#0: +; AVX-NEXT: vcomisd %xmm0, %xmm1 +; AVX-NEXT: setae %al +; AVX-NEXT: movzbl %al, %eax +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse2_comile_sd: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vcomisd %xmm0, %xmm1 +; AVX512VL-NEXT: setae %al +; AVX512VL-NEXT: movzbl %al, %eax +; AVX512VL-NEXT: retl %res = call i32 @llvm.x86.sse2.comile.sd(<2 x double> %a0, <2 x double> %a1) ; [#uses=1] ret i32 %res } @@ -155,12 +231,19 @@ declare i32 @llvm.x86.sse2.comile.sd(<2 x double>, <2 x double>) nounwind readno define i32 @test_x86_sse2_comilt_sd(<2 x double> %a0, <2 x double> %a1) { -; CHECK-LABEL: test_x86_sse2_comilt_sd: -; CHECK: ## BB#0: -; CHECK-NEXT: vcomisd %xmm0, %xmm1 -; CHECK-NEXT: seta %al -; CHECK-NEXT: movzbl %al, %eax -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse2_comilt_sd: +; AVX: ## BB#0: +; AVX-NEXT: vcomisd %xmm0, %xmm1 +; AVX-NEXT: seta %al +; AVX-NEXT: movzbl %al, %eax +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse2_comilt_sd: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vcomisd %xmm0, %xmm1 +; AVX512VL-NEXT: seta %al +; AVX512VL-NEXT: movzbl %al, %eax +; AVX512VL-NEXT: retl %res = call i32 @llvm.x86.sse2.comilt.sd(<2 x double> %a0, <2 x double> %a1) ; [#uses=1] ret i32 %res } @@ -168,14 +251,23 @@ declare i32 @llvm.x86.sse2.comilt.sd(<2 x double>, <2 x double>) nounwind readno define i32 @test_x86_sse2_comineq_sd(<2 x double> %a0, <2 x double> %a1) { -; CHECK-LABEL: test_x86_sse2_comineq_sd: -; CHECK: ## BB#0: -; CHECK-NEXT: vcomisd %xmm1, %xmm0 -; CHECK-NEXT: setp %al -; CHECK-NEXT: setne %cl -; CHECK-NEXT: orb %al, %cl -; CHECK-NEXT: movzbl %cl, %eax -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse2_comineq_sd: +; AVX: ## BB#0: +; AVX-NEXT: vcomisd %xmm1, %xmm0 +; AVX-NEXT: setp %al +; AVX-NEXT: setne %cl +; AVX-NEXT: orb %al, %cl +; AVX-NEXT: movzbl %cl, %eax +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse2_comineq_sd: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vcomisd %xmm1, %xmm0 +; AVX512VL-NEXT: setp %al +; AVX512VL-NEXT: setne %cl +; AVX512VL-NEXT: orb %al, %cl +; AVX512VL-NEXT: movzbl %cl, %eax +; AVX512VL-NEXT: retl %res = call i32 @llvm.x86.sse2.comineq.sd(<2 x double> %a0, <2 x double> %a1) ; [#uses=1] ret i32 %res } @@ -183,10 +275,15 @@ declare i32 @llvm.x86.sse2.comineq.sd(<2 x double>, <2 x double>) nounwind readn define <2 x double> @test_x86_sse2_cvtdq2pd(<4 x i32> %a0) { -; CHECK-LABEL: test_x86_sse2_cvtdq2pd: -; CHECK: ## BB#0: -; CHECK-NEXT: vcvtdq2pd %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse2_cvtdq2pd: +; AVX: ## BB#0: +; AVX-NEXT: vcvtdq2pd %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse2_cvtdq2pd: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vcvtdq2pd %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <2 x double> @llvm.x86.sse2.cvtdq2pd(<4 x i32> %a0) ; <<2 x double>> [#uses=1] ret <2 x double> %res } @@ -194,10 +291,15 @@ declare <2 x double> @llvm.x86.sse2.cvtdq2pd(<4 x i32>) nounwind readnone define <4 x float> @test_x86_sse2_cvtdq2ps(<4 x i32> %a0) { -; CHECK-LABEL: test_x86_sse2_cvtdq2ps: -; CHECK: ## BB#0: -; CHECK-NEXT: vcvtdq2ps %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse2_cvtdq2ps: +; AVX: ## BB#0: +; AVX-NEXT: vcvtdq2ps %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse2_cvtdq2ps: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vcvtdq2ps %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <4 x float> @llvm.x86.sse2.cvtdq2ps(<4 x i32> %a0) ; <<4 x float>> [#uses=1] ret <4 x float> %res } @@ -205,10 +307,15 @@ declare <4 x float> @llvm.x86.sse2.cvtdq2ps(<4 x i32>) nounwind readnone define <4 x i32> @test_x86_sse2_cvtpd2dq(<2 x double> %a0) { -; CHECK-LABEL: test_x86_sse2_cvtpd2dq: -; CHECK: ## BB#0: -; CHECK-NEXT: vcvtpd2dq %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse2_cvtpd2dq: +; AVX: ## BB#0: +; AVX-NEXT: vcvtpd2dq %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse2_cvtpd2dq: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vcvtpd2dq %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <4 x i32> @llvm.x86.sse2.cvtpd2dq(<2 x double> %a0) ; <<4 x i32>> [#uses=1] ret <4 x i32> %res } @@ -216,10 +323,15 @@ declare <4 x i32> @llvm.x86.sse2.cvtpd2dq(<2 x double>) nounwind readnone define <4 x float> @test_x86_sse2_cvtpd2ps(<2 x double> %a0) { -; CHECK-LABEL: test_x86_sse2_cvtpd2ps: -; CHECK: ## BB#0: -; CHECK-NEXT: vcvtpd2ps %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse2_cvtpd2ps: +; AVX: ## BB#0: +; AVX-NEXT: vcvtpd2ps %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse2_cvtpd2ps: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vcvtpd2ps %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <4 x float> @llvm.x86.sse2.cvtpd2ps(<2 x double> %a0) ; <<4 x float>> [#uses=1] ret <4 x float> %res } @@ -227,10 +339,15 @@ declare <4 x float> @llvm.x86.sse2.cvtpd2ps(<2 x double>) nounwind readnone define <4 x i32> @test_x86_sse2_cvtps2dq(<4 x float> %a0) { -; CHECK-LABEL: test_x86_sse2_cvtps2dq: -; CHECK: ## BB#0: -; CHECK-NEXT: vcvtps2dq %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse2_cvtps2dq: +; AVX: ## BB#0: +; AVX-NEXT: vcvtps2dq %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse2_cvtps2dq: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vcvtps2dq %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <4 x i32> @llvm.x86.sse2.cvtps2dq(<4 x float> %a0) ; <<4 x i32>> [#uses=1] ret <4 x i32> %res } @@ -238,10 +355,15 @@ declare <4 x i32> @llvm.x86.sse2.cvtps2dq(<4 x float>) nounwind readnone define <2 x double> @test_x86_sse2_cvtps2pd(<4 x float> %a0) { -; CHECK-LABEL: test_x86_sse2_cvtps2pd: -; CHECK: ## BB#0: -; CHECK-NEXT: vcvtps2pd %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse2_cvtps2pd: +; AVX: ## BB#0: +; AVX-NEXT: vcvtps2pd %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse2_cvtps2pd: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vcvtps2pd %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <2 x double> @llvm.x86.sse2.cvtps2pd(<4 x float> %a0) ; <<2 x double>> [#uses=1] ret <2 x double> %res } @@ -249,10 +371,15 @@ declare <2 x double> @llvm.x86.sse2.cvtps2pd(<4 x float>) nounwind readnone define i32 @test_x86_sse2_cvtsd2si(<2 x double> %a0) { -; CHECK-LABEL: test_x86_sse2_cvtsd2si: -; CHECK: ## BB#0: -; CHECK-NEXT: vcvtsd2si %xmm0, %eax -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse2_cvtsd2si: +; AVX: ## BB#0: +; AVX-NEXT: vcvtsd2si %xmm0, %eax +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse2_cvtsd2si: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vcvtsd2si %xmm0, %eax +; AVX512VL-NEXT: retl %res = call i32 @llvm.x86.sse2.cvtsd2si(<2 x double> %a0) ; [#uses=1] ret i32 %res } @@ -260,10 +387,15 @@ declare i32 @llvm.x86.sse2.cvtsd2si(<2 x double>) nounwind readnone define <4 x float> @test_x86_sse2_cvtsd2ss(<4 x float> %a0, <2 x double> %a1) { -; CHECK-LABEL: test_x86_sse2_cvtsd2ss: -; CHECK: ## BB#0: -; CHECK-NEXT: vcvtsd2ss %xmm1, %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse2_cvtsd2ss: +; AVX: ## BB#0: +; AVX-NEXT: vcvtsd2ss %xmm1, %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse2_cvtsd2ss: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vcvtsd2ss %xmm1, %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <4 x float> @llvm.x86.sse2.cvtsd2ss(<4 x float> %a0, <2 x double> %a1) ; <<4 x float>> [#uses=1] ret <4 x float> %res } @@ -271,11 +403,17 @@ declare <4 x float> @llvm.x86.sse2.cvtsd2ss(<4 x float>, <2 x double>) nounwind define <2 x double> @test_x86_sse2_cvtsi2sd(<2 x double> %a0) { -; CHECK-LABEL: test_x86_sse2_cvtsi2sd: -; CHECK: ## BB#0: -; CHECK-NEXT: movl $7, %eax -; CHECK-NEXT: vcvtsi2sdl %eax, %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse2_cvtsi2sd: +; AVX: ## BB#0: +; AVX-NEXT: movl $7, %eax +; AVX-NEXT: vcvtsi2sdl %eax, %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse2_cvtsi2sd: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: movl $7, %eax +; AVX512VL-NEXT: vcvtsi2sdl %eax, %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <2 x double> @llvm.x86.sse2.cvtsi2sd(<2 x double> %a0, i32 7) ; <<2 x double>> [#uses=1] ret <2 x double> %res } @@ -283,10 +421,15 @@ declare <2 x double> @llvm.x86.sse2.cvtsi2sd(<2 x double>, i32) nounwind readnon define <2 x double> @test_x86_sse2_cvtss2sd(<2 x double> %a0, <4 x float> %a1) { -; CHECK-LABEL: test_x86_sse2_cvtss2sd: -; CHECK: ## BB#0: -; CHECK-NEXT: vcvtss2sd %xmm1, %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse2_cvtss2sd: +; AVX: ## BB#0: +; AVX-NEXT: vcvtss2sd %xmm1, %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse2_cvtss2sd: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vcvtss2sd %xmm1, %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <2 x double> @llvm.x86.sse2.cvtss2sd(<2 x double> %a0, <4 x float> %a1) ; <<2 x double>> [#uses=1] ret <2 x double> %res } @@ -294,10 +437,15 @@ declare <2 x double> @llvm.x86.sse2.cvtss2sd(<2 x double>, <4 x float>) nounwind define <4 x i32> @test_x86_sse2_cvttpd2dq(<2 x double> %a0) { -; CHECK-LABEL: test_x86_sse2_cvttpd2dq: -; CHECK: ## BB#0: -; CHECK-NEXT: vcvttpd2dq %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse2_cvttpd2dq: +; AVX: ## BB#0: +; AVX-NEXT: vcvttpd2dq %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse2_cvttpd2dq: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vcvttpd2dq %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <4 x i32> @llvm.x86.sse2.cvttpd2dq(<2 x double> %a0) ; <<4 x i32>> [#uses=1] ret <4 x i32> %res } @@ -305,10 +453,15 @@ declare <4 x i32> @llvm.x86.sse2.cvttpd2dq(<2 x double>) nounwind readnone define <4 x i32> @test_x86_sse2_cvttps2dq(<4 x float> %a0) { -; CHECK-LABEL: test_x86_sse2_cvttps2dq: -; CHECK: ## BB#0: -; CHECK-NEXT: vcvttps2dq %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse2_cvttps2dq: +; AVX: ## BB#0: +; AVX-NEXT: vcvttps2dq %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse2_cvttps2dq: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vcvttps2dq %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <4 x i32> @llvm.x86.sse2.cvttps2dq(<4 x float> %a0) ; <<4 x i32>> [#uses=1] ret <4 x i32> %res } @@ -316,10 +469,15 @@ declare <4 x i32> @llvm.x86.sse2.cvttps2dq(<4 x float>) nounwind readnone define i32 @test_x86_sse2_cvttsd2si(<2 x double> %a0) { -; CHECK-LABEL: test_x86_sse2_cvttsd2si: -; CHECK: ## BB#0: -; CHECK-NEXT: vcvttsd2si %xmm0, %eax -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse2_cvttsd2si: +; AVX: ## BB#0: +; AVX-NEXT: vcvttsd2si %xmm0, %eax +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse2_cvttsd2si: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vcvttsd2si %xmm0, %eax +; AVX512VL-NEXT: retl %res = call i32 @llvm.x86.sse2.cvttsd2si(<2 x double> %a0) ; [#uses=1] ret i32 %res } @@ -327,10 +485,15 @@ declare i32 @llvm.x86.sse2.cvttsd2si(<2 x double>) nounwind readnone define <2 x double> @test_x86_sse2_div_sd(<2 x double> %a0, <2 x double> %a1) { -; CHECK-LABEL: test_x86_sse2_div_sd: -; CHECK: ## BB#0: -; CHECK-NEXT: vdivsd %xmm1, %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse2_div_sd: +; AVX: ## BB#0: +; AVX-NEXT: vdivsd %xmm1, %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse2_div_sd: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vdivsd %xmm1, %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <2 x double> @llvm.x86.sse2.div.sd(<2 x double> %a0, <2 x double> %a1) ; <<2 x double>> [#uses=1] ret <2 x double> %res } @@ -339,10 +502,15 @@ declare <2 x double> @llvm.x86.sse2.div.sd(<2 x double>, <2 x double>) nounwind define <2 x double> @test_x86_sse2_max_pd(<2 x double> %a0, <2 x double> %a1) { -; CHECK-LABEL: test_x86_sse2_max_pd: -; CHECK: ## BB#0: -; CHECK-NEXT: vmaxpd %xmm1, %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse2_max_pd: +; AVX: ## BB#0: +; AVX-NEXT: vmaxpd %xmm1, %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse2_max_pd: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vmaxpd %xmm1, %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <2 x double> @llvm.x86.sse2.max.pd(<2 x double> %a0, <2 x double> %a1) ; <<2 x double>> [#uses=1] ret <2 x double> %res } @@ -350,10 +518,15 @@ declare <2 x double> @llvm.x86.sse2.max.pd(<2 x double>, <2 x double>) nounwind define <2 x double> @test_x86_sse2_max_sd(<2 x double> %a0, <2 x double> %a1) { -; CHECK-LABEL: test_x86_sse2_max_sd: -; CHECK: ## BB#0: -; CHECK-NEXT: vmaxsd %xmm1, %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse2_max_sd: +; AVX: ## BB#0: +; AVX-NEXT: vmaxsd %xmm1, %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse2_max_sd: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vmaxsd %xmm1, %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <2 x double> @llvm.x86.sse2.max.sd(<2 x double> %a0, <2 x double> %a1) ; <<2 x double>> [#uses=1] ret <2 x double> %res } @@ -361,10 +534,15 @@ declare <2 x double> @llvm.x86.sse2.max.sd(<2 x double>, <2 x double>) nounwind define <2 x double> @test_x86_sse2_min_pd(<2 x double> %a0, <2 x double> %a1) { -; CHECK-LABEL: test_x86_sse2_min_pd: -; CHECK: ## BB#0: -; CHECK-NEXT: vminpd %xmm1, %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse2_min_pd: +; AVX: ## BB#0: +; AVX-NEXT: vminpd %xmm1, %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse2_min_pd: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vminpd %xmm1, %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <2 x double> @llvm.x86.sse2.min.pd(<2 x double> %a0, <2 x double> %a1) ; <<2 x double>> [#uses=1] ret <2 x double> %res } @@ -372,10 +550,15 @@ declare <2 x double> @llvm.x86.sse2.min.pd(<2 x double>, <2 x double>) nounwind define <2 x double> @test_x86_sse2_min_sd(<2 x double> %a0, <2 x double> %a1) { -; CHECK-LABEL: test_x86_sse2_min_sd: -; CHECK: ## BB#0: -; CHECK-NEXT: vminsd %xmm1, %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse2_min_sd: +; AVX: ## BB#0: +; AVX-NEXT: vminsd %xmm1, %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse2_min_sd: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vminsd %xmm1, %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <2 x double> @llvm.x86.sse2.min.sd(<2 x double> %a0, <2 x double> %a1) ; <<2 x double>> [#uses=1] ret <2 x double> %res } @@ -383,10 +566,15 @@ declare <2 x double> @llvm.x86.sse2.min.sd(<2 x double>, <2 x double>) nounwind define i32 @test_x86_sse2_movmsk_pd(<2 x double> %a0) { -; CHECK-LABEL: test_x86_sse2_movmsk_pd: -; CHECK: ## BB#0: -; CHECK-NEXT: vmovmskpd %xmm0, %eax -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse2_movmsk_pd: +; AVX: ## BB#0: +; AVX-NEXT: vmovmskpd %xmm0, %eax +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse2_movmsk_pd: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vmovmskpd %xmm0, %eax +; AVX512VL-NEXT: retl %res = call i32 @llvm.x86.sse2.movmsk.pd(<2 x double> %a0) ; [#uses=1] ret i32 %res } @@ -396,10 +584,15 @@ declare i32 @llvm.x86.sse2.movmsk.pd(<2 x double>) nounwind readnone define <2 x double> @test_x86_sse2_mul_sd(<2 x double> %a0, <2 x double> %a1) { -; CHECK-LABEL: test_x86_sse2_mul_sd: -; CHECK: ## BB#0: -; CHECK-NEXT: vmulsd %xmm1, %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse2_mul_sd: +; AVX: ## BB#0: +; AVX-NEXT: vmulsd %xmm1, %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse2_mul_sd: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vmulsd %xmm1, %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <2 x double> @llvm.x86.sse2.mul.sd(<2 x double> %a0, <2 x double> %a1) ; <<2 x double>> [#uses=1] ret <2 x double> %res } @@ -407,10 +600,15 @@ declare <2 x double> @llvm.x86.sse2.mul.sd(<2 x double>, <2 x double>) nounwind define <8 x i16> @test_x86_sse2_packssdw_128(<4 x i32> %a0, <4 x i32> %a1) { -; CHECK-LABEL: test_x86_sse2_packssdw_128: -; CHECK: ## BB#0: -; CHECK-NEXT: vpackssdw %xmm1, %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse2_packssdw_128: +; AVX: ## BB#0: +; AVX-NEXT: vpackssdw %xmm1, %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse2_packssdw_128: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpackssdw %xmm1, %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <8 x i16> @llvm.x86.sse2.packssdw.128(<4 x i32> %a0, <4 x i32> %a1) ; <<8 x i16>> [#uses=1] ret <8 x i16> %res } @@ -418,10 +616,15 @@ declare <8 x i16> @llvm.x86.sse2.packssdw.128(<4 x i32>, <4 x i32>) nounwind rea define <16 x i8> @test_x86_sse2_packsswb_128(<8 x i16> %a0, <8 x i16> %a1) { -; CHECK-LABEL: test_x86_sse2_packsswb_128: -; CHECK: ## BB#0: -; CHECK-NEXT: vpacksswb %xmm1, %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse2_packsswb_128: +; AVX: ## BB#0: +; AVX-NEXT: vpacksswb %xmm1, %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse2_packsswb_128: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpacksswb %xmm1, %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <16 x i8> @llvm.x86.sse2.packsswb.128(<8 x i16> %a0, <8 x i16> %a1) ; <<16 x i8>> [#uses=1] ret <16 x i8> %res } @@ -429,10 +632,15 @@ declare <16 x i8> @llvm.x86.sse2.packsswb.128(<8 x i16>, <8 x i16>) nounwind rea define <16 x i8> @test_x86_sse2_packuswb_128(<8 x i16> %a0, <8 x i16> %a1) { -; CHECK-LABEL: test_x86_sse2_packuswb_128: -; CHECK: ## BB#0: -; CHECK-NEXT: vpackuswb %xmm1, %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse2_packuswb_128: +; AVX: ## BB#0: +; AVX-NEXT: vpackuswb %xmm1, %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse2_packuswb_128: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpackuswb %xmm1, %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <16 x i8> @llvm.x86.sse2.packuswb.128(<8 x i16> %a0, <8 x i16> %a1) ; <<16 x i8>> [#uses=1] ret <16 x i8> %res } @@ -440,10 +648,15 @@ declare <16 x i8> @llvm.x86.sse2.packuswb.128(<8 x i16>, <8 x i16>) nounwind rea define <16 x i8> @test_x86_sse2_padds_b(<16 x i8> %a0, <16 x i8> %a1) { -; CHECK-LABEL: test_x86_sse2_padds_b: -; CHECK: ## BB#0: -; CHECK-NEXT: vpaddsb %xmm1, %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse2_padds_b: +; AVX: ## BB#0: +; AVX-NEXT: vpaddsb %xmm1, %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse2_padds_b: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpaddsb %xmm1, %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <16 x i8> @llvm.x86.sse2.padds.b(<16 x i8> %a0, <16 x i8> %a1) ; <<16 x i8>> [#uses=1] ret <16 x i8> %res } @@ -451,10 +664,15 @@ declare <16 x i8> @llvm.x86.sse2.padds.b(<16 x i8>, <16 x i8>) nounwind readnone define <8 x i16> @test_x86_sse2_padds_w(<8 x i16> %a0, <8 x i16> %a1) { -; CHECK-LABEL: test_x86_sse2_padds_w: -; CHECK: ## BB#0: -; CHECK-NEXT: vpaddsw %xmm1, %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse2_padds_w: +; AVX: ## BB#0: +; AVX-NEXT: vpaddsw %xmm1, %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse2_padds_w: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpaddsw %xmm1, %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <8 x i16> @llvm.x86.sse2.padds.w(<8 x i16> %a0, <8 x i16> %a1) ; <<8 x i16>> [#uses=1] ret <8 x i16> %res } @@ -462,10 +680,15 @@ declare <8 x i16> @llvm.x86.sse2.padds.w(<8 x i16>, <8 x i16>) nounwind readnone define <16 x i8> @test_x86_sse2_paddus_b(<16 x i8> %a0, <16 x i8> %a1) { -; CHECK-LABEL: test_x86_sse2_paddus_b: -; CHECK: ## BB#0: -; CHECK-NEXT: vpaddusb %xmm1, %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse2_paddus_b: +; AVX: ## BB#0: +; AVX-NEXT: vpaddusb %xmm1, %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse2_paddus_b: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpaddusb %xmm1, %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <16 x i8> @llvm.x86.sse2.paddus.b(<16 x i8> %a0, <16 x i8> %a1) ; <<16 x i8>> [#uses=1] ret <16 x i8> %res } @@ -473,10 +696,15 @@ declare <16 x i8> @llvm.x86.sse2.paddus.b(<16 x i8>, <16 x i8>) nounwind readnon define <8 x i16> @test_x86_sse2_paddus_w(<8 x i16> %a0, <8 x i16> %a1) { -; CHECK-LABEL: test_x86_sse2_paddus_w: -; CHECK: ## BB#0: -; CHECK-NEXT: vpaddusw %xmm1, %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse2_paddus_w: +; AVX: ## BB#0: +; AVX-NEXT: vpaddusw %xmm1, %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse2_paddus_w: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpaddusw %xmm1, %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <8 x i16> @llvm.x86.sse2.paddus.w(<8 x i16> %a0, <8 x i16> %a1) ; <<8 x i16>> [#uses=1] ret <8 x i16> %res } @@ -484,10 +712,15 @@ declare <8 x i16> @llvm.x86.sse2.paddus.w(<8 x i16>, <8 x i16>) nounwind readnon define <16 x i8> @test_x86_sse2_pavg_b(<16 x i8> %a0, <16 x i8> %a1) { -; CHECK-LABEL: test_x86_sse2_pavg_b: -; CHECK: ## BB#0: -; CHECK-NEXT: vpavgb %xmm1, %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse2_pavg_b: +; AVX: ## BB#0: +; AVX-NEXT: vpavgb %xmm1, %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse2_pavg_b: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpavgb %xmm1, %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <16 x i8> @llvm.x86.sse2.pavg.b(<16 x i8> %a0, <16 x i8> %a1) ; <<16 x i8>> [#uses=1] ret <16 x i8> %res } @@ -495,10 +728,15 @@ declare <16 x i8> @llvm.x86.sse2.pavg.b(<16 x i8>, <16 x i8>) nounwind readnone define <8 x i16> @test_x86_sse2_pavg_w(<8 x i16> %a0, <8 x i16> %a1) { -; CHECK-LABEL: test_x86_sse2_pavg_w: -; CHECK: ## BB#0: -; CHECK-NEXT: vpavgw %xmm1, %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse2_pavg_w: +; AVX: ## BB#0: +; AVX-NEXT: vpavgw %xmm1, %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse2_pavg_w: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpavgw %xmm1, %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <8 x i16> @llvm.x86.sse2.pavg.w(<8 x i16> %a0, <8 x i16> %a1) ; <<8 x i16>> [#uses=1] ret <8 x i16> %res } @@ -506,10 +744,15 @@ declare <8 x i16> @llvm.x86.sse2.pavg.w(<8 x i16>, <8 x i16>) nounwind readnone define <4 x i32> @test_x86_sse2_pmadd_wd(<8 x i16> %a0, <8 x i16> %a1) { -; CHECK-LABEL: test_x86_sse2_pmadd_wd: -; CHECK: ## BB#0: -; CHECK-NEXT: vpmaddwd %xmm1, %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse2_pmadd_wd: +; AVX: ## BB#0: +; AVX-NEXT: vpmaddwd %xmm1, %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse2_pmadd_wd: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpmaddwd %xmm1, %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <4 x i32> @llvm.x86.sse2.pmadd.wd(<8 x i16> %a0, <8 x i16> %a1) ; <<4 x i32>> [#uses=1] ret <4 x i32> %res } @@ -517,10 +760,15 @@ declare <4 x i32> @llvm.x86.sse2.pmadd.wd(<8 x i16>, <8 x i16>) nounwind readnon define <8 x i16> @test_x86_sse2_pmaxs_w(<8 x i16> %a0, <8 x i16> %a1) { -; CHECK-LABEL: test_x86_sse2_pmaxs_w: -; CHECK: ## BB#0: -; CHECK-NEXT: vpmaxsw %xmm1, %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse2_pmaxs_w: +; AVX: ## BB#0: +; AVX-NEXT: vpmaxsw %xmm1, %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse2_pmaxs_w: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpmaxsw %xmm1, %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <8 x i16> @llvm.x86.sse2.pmaxs.w(<8 x i16> %a0, <8 x i16> %a1) ; <<8 x i16>> [#uses=1] ret <8 x i16> %res } @@ -528,10 +776,15 @@ declare <8 x i16> @llvm.x86.sse2.pmaxs.w(<8 x i16>, <8 x i16>) nounwind readnone define <16 x i8> @test_x86_sse2_pmaxu_b(<16 x i8> %a0, <16 x i8> %a1) { -; CHECK-LABEL: test_x86_sse2_pmaxu_b: -; CHECK: ## BB#0: -; CHECK-NEXT: vpmaxub %xmm1, %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse2_pmaxu_b: +; AVX: ## BB#0: +; AVX-NEXT: vpmaxub %xmm1, %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse2_pmaxu_b: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpmaxub %xmm1, %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <16 x i8> @llvm.x86.sse2.pmaxu.b(<16 x i8> %a0, <16 x i8> %a1) ; <<16 x i8>> [#uses=1] ret <16 x i8> %res } @@ -539,10 +792,15 @@ declare <16 x i8> @llvm.x86.sse2.pmaxu.b(<16 x i8>, <16 x i8>) nounwind readnone define <8 x i16> @test_x86_sse2_pmins_w(<8 x i16> %a0, <8 x i16> %a1) { -; CHECK-LABEL: test_x86_sse2_pmins_w: -; CHECK: ## BB#0: -; CHECK-NEXT: vpminsw %xmm1, %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse2_pmins_w: +; AVX: ## BB#0: +; AVX-NEXT: vpminsw %xmm1, %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse2_pmins_w: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpminsw %xmm1, %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <8 x i16> @llvm.x86.sse2.pmins.w(<8 x i16> %a0, <8 x i16> %a1) ; <<8 x i16>> [#uses=1] ret <8 x i16> %res } @@ -550,10 +808,15 @@ declare <8 x i16> @llvm.x86.sse2.pmins.w(<8 x i16>, <8 x i16>) nounwind readnone define <16 x i8> @test_x86_sse2_pminu_b(<16 x i8> %a0, <16 x i8> %a1) { -; CHECK-LABEL: test_x86_sse2_pminu_b: -; CHECK: ## BB#0: -; CHECK-NEXT: vpminub %xmm1, %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse2_pminu_b: +; AVX: ## BB#0: +; AVX-NEXT: vpminub %xmm1, %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse2_pminu_b: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpminub %xmm1, %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <16 x i8> @llvm.x86.sse2.pminu.b(<16 x i8> %a0, <16 x i8> %a1) ; <<16 x i8>> [#uses=1] ret <16 x i8> %res } @@ -561,10 +824,15 @@ declare <16 x i8> @llvm.x86.sse2.pminu.b(<16 x i8>, <16 x i8>) nounwind readnone define i32 @test_x86_sse2_pmovmskb_128(<16 x i8> %a0) { -; CHECK-LABEL: test_x86_sse2_pmovmskb_128: -; CHECK: ## BB#0: -; CHECK-NEXT: vpmovmskb %xmm0, %eax -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse2_pmovmskb_128: +; AVX: ## BB#0: +; AVX-NEXT: vpmovmskb %xmm0, %eax +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse2_pmovmskb_128: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpmovmskb %xmm0, %eax +; AVX512VL-NEXT: retl %res = call i32 @llvm.x86.sse2.pmovmskb.128(<16 x i8> %a0) ; [#uses=1] ret i32 %res } @@ -572,10 +840,15 @@ declare i32 @llvm.x86.sse2.pmovmskb.128(<16 x i8>) nounwind readnone define <8 x i16> @test_x86_sse2_pmulh_w(<8 x i16> %a0, <8 x i16> %a1) { -; CHECK-LABEL: test_x86_sse2_pmulh_w: -; CHECK: ## BB#0: -; CHECK-NEXT: vpmulhw %xmm1, %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse2_pmulh_w: +; AVX: ## BB#0: +; AVX-NEXT: vpmulhw %xmm1, %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse2_pmulh_w: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpmulhw %xmm1, %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <8 x i16> @llvm.x86.sse2.pmulh.w(<8 x i16> %a0, <8 x i16> %a1) ; <<8 x i16>> [#uses=1] ret <8 x i16> %res } @@ -583,10 +856,15 @@ declare <8 x i16> @llvm.x86.sse2.pmulh.w(<8 x i16>, <8 x i16>) nounwind readnone define <8 x i16> @test_x86_sse2_pmulhu_w(<8 x i16> %a0, <8 x i16> %a1) { -; CHECK-LABEL: test_x86_sse2_pmulhu_w: -; CHECK: ## BB#0: -; CHECK-NEXT: vpmulhuw %xmm1, %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse2_pmulhu_w: +; AVX: ## BB#0: +; AVX-NEXT: vpmulhuw %xmm1, %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse2_pmulhu_w: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpmulhuw %xmm1, %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <8 x i16> @llvm.x86.sse2.pmulhu.w(<8 x i16> %a0, <8 x i16> %a1) ; <<8 x i16>> [#uses=1] ret <8 x i16> %res } @@ -594,10 +872,15 @@ declare <8 x i16> @llvm.x86.sse2.pmulhu.w(<8 x i16>, <8 x i16>) nounwind readnon define <2 x i64> @test_x86_sse2_pmulu_dq(<4 x i32> %a0, <4 x i32> %a1) { -; CHECK-LABEL: test_x86_sse2_pmulu_dq: -; CHECK: ## BB#0: -; CHECK-NEXT: vpmuludq %xmm1, %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse2_pmulu_dq: +; AVX: ## BB#0: +; AVX-NEXT: vpmuludq %xmm1, %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse2_pmulu_dq: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpmuludq %xmm1, %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <2 x i64> @llvm.x86.sse2.pmulu.dq(<4 x i32> %a0, <4 x i32> %a1) ; <<2 x i64>> [#uses=1] ret <2 x i64> %res } @@ -605,10 +888,15 @@ declare <2 x i64> @llvm.x86.sse2.pmulu.dq(<4 x i32>, <4 x i32>) nounwind readnon define <2 x i64> @test_x86_sse2_psad_bw(<16 x i8> %a0, <16 x i8> %a1) { -; CHECK-LABEL: test_x86_sse2_psad_bw: -; CHECK: ## BB#0: -; CHECK-NEXT: vpsadbw %xmm1, %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse2_psad_bw: +; AVX: ## BB#0: +; AVX-NEXT: vpsadbw %xmm1, %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse2_psad_bw: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpsadbw %xmm1, %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <2 x i64> @llvm.x86.sse2.psad.bw(<16 x i8> %a0, <16 x i8> %a1) ; <<2 x i64>> [#uses=1] ret <2 x i64> %res } @@ -616,10 +904,15 @@ declare <2 x i64> @llvm.x86.sse2.psad.bw(<16 x i8>, <16 x i8>) nounwind readnone define <4 x i32> @test_x86_sse2_psll_d(<4 x i32> %a0, <4 x i32> %a1) { -; CHECK-LABEL: test_x86_sse2_psll_d: -; CHECK: ## BB#0: -; CHECK-NEXT: vpslld %xmm1, %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse2_psll_d: +; AVX: ## BB#0: +; AVX-NEXT: vpslld %xmm1, %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse2_psll_d: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpslld %xmm1, %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <4 x i32> @llvm.x86.sse2.psll.d(<4 x i32> %a0, <4 x i32> %a1) ; <<4 x i32>> [#uses=1] ret <4 x i32> %res } @@ -627,10 +920,15 @@ declare <4 x i32> @llvm.x86.sse2.psll.d(<4 x i32>, <4 x i32>) nounwind readnone define <2 x i64> @test_x86_sse2_psll_q(<2 x i64> %a0, <2 x i64> %a1) { -; CHECK-LABEL: test_x86_sse2_psll_q: -; CHECK: ## BB#0: -; CHECK-NEXT: vpsllq %xmm1, %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse2_psll_q: +; AVX: ## BB#0: +; AVX-NEXT: vpsllq %xmm1, %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse2_psll_q: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpsllq %xmm1, %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <2 x i64> @llvm.x86.sse2.psll.q(<2 x i64> %a0, <2 x i64> %a1) ; <<2 x i64>> [#uses=1] ret <2 x i64> %res } @@ -638,10 +936,15 @@ declare <2 x i64> @llvm.x86.sse2.psll.q(<2 x i64>, <2 x i64>) nounwind readnone define <8 x i16> @test_x86_sse2_psll_w(<8 x i16> %a0, <8 x i16> %a1) { -; CHECK-LABEL: test_x86_sse2_psll_w: -; CHECK: ## BB#0: -; CHECK-NEXT: vpsllw %xmm1, %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse2_psll_w: +; AVX: ## BB#0: +; AVX-NEXT: vpsllw %xmm1, %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse2_psll_w: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpsllw %xmm1, %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <8 x i16> @llvm.x86.sse2.psll.w(<8 x i16> %a0, <8 x i16> %a1) ; <<8 x i16>> [#uses=1] ret <8 x i16> %res } @@ -649,10 +952,15 @@ declare <8 x i16> @llvm.x86.sse2.psll.w(<8 x i16>, <8 x i16>) nounwind readnone define <4 x i32> @test_x86_sse2_pslli_d(<4 x i32> %a0) { -; CHECK-LABEL: test_x86_sse2_pslli_d: -; CHECK: ## BB#0: -; CHECK-NEXT: vpslld $7, %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse2_pslli_d: +; AVX: ## BB#0: +; AVX-NEXT: vpslld $7, %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse2_pslli_d: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpslld $7, %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <4 x i32> @llvm.x86.sse2.pslli.d(<4 x i32> %a0, i32 7) ; <<4 x i32>> [#uses=1] ret <4 x i32> %res } @@ -660,10 +968,15 @@ declare <4 x i32> @llvm.x86.sse2.pslli.d(<4 x i32>, i32) nounwind readnone define <2 x i64> @test_x86_sse2_pslli_q(<2 x i64> %a0) { -; CHECK-LABEL: test_x86_sse2_pslli_q: -; CHECK: ## BB#0: -; CHECK-NEXT: vpsllq $7, %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse2_pslli_q: +; AVX: ## BB#0: +; AVX-NEXT: vpsllq $7, %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse2_pslli_q: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpsllq $7, %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <2 x i64> @llvm.x86.sse2.pslli.q(<2 x i64> %a0, i32 7) ; <<2 x i64>> [#uses=1] ret <2 x i64> %res } @@ -671,10 +984,15 @@ declare <2 x i64> @llvm.x86.sse2.pslli.q(<2 x i64>, i32) nounwind readnone define <8 x i16> @test_x86_sse2_pslli_w(<8 x i16> %a0) { -; CHECK-LABEL: test_x86_sse2_pslli_w: -; CHECK: ## BB#0: -; CHECK-NEXT: vpsllw $7, %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse2_pslli_w: +; AVX: ## BB#0: +; AVX-NEXT: vpsllw $7, %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse2_pslli_w: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpsllw $7, %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <8 x i16> @llvm.x86.sse2.pslli.w(<8 x i16> %a0, i32 7) ; <<8 x i16>> [#uses=1] ret <8 x i16> %res } @@ -682,10 +1000,15 @@ declare <8 x i16> @llvm.x86.sse2.pslli.w(<8 x i16>, i32) nounwind readnone define <4 x i32> @test_x86_sse2_psra_d(<4 x i32> %a0, <4 x i32> %a1) { -; CHECK-LABEL: test_x86_sse2_psra_d: -; CHECK: ## BB#0: -; CHECK-NEXT: vpsrad %xmm1, %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse2_psra_d: +; AVX: ## BB#0: +; AVX-NEXT: vpsrad %xmm1, %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse2_psra_d: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpsrad %xmm1, %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <4 x i32> @llvm.x86.sse2.psra.d(<4 x i32> %a0, <4 x i32> %a1) ; <<4 x i32>> [#uses=1] ret <4 x i32> %res } @@ -693,10 +1016,15 @@ declare <4 x i32> @llvm.x86.sse2.psra.d(<4 x i32>, <4 x i32>) nounwind readnone define <8 x i16> @test_x86_sse2_psra_w(<8 x i16> %a0, <8 x i16> %a1) { -; CHECK-LABEL: test_x86_sse2_psra_w: -; CHECK: ## BB#0: -; CHECK-NEXT: vpsraw %xmm1, %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse2_psra_w: +; AVX: ## BB#0: +; AVX-NEXT: vpsraw %xmm1, %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse2_psra_w: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpsraw %xmm1, %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <8 x i16> @llvm.x86.sse2.psra.w(<8 x i16> %a0, <8 x i16> %a1) ; <<8 x i16>> [#uses=1] ret <8 x i16> %res } @@ -704,10 +1032,15 @@ declare <8 x i16> @llvm.x86.sse2.psra.w(<8 x i16>, <8 x i16>) nounwind readnone define <4 x i32> @test_x86_sse2_psrai_d(<4 x i32> %a0) { -; CHECK-LABEL: test_x86_sse2_psrai_d: -; CHECK: ## BB#0: -; CHECK-NEXT: vpsrad $7, %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse2_psrai_d: +; AVX: ## BB#0: +; AVX-NEXT: vpsrad $7, %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse2_psrai_d: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpsrad $7, %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <4 x i32> @llvm.x86.sse2.psrai.d(<4 x i32> %a0, i32 7) ; <<4 x i32>> [#uses=1] ret <4 x i32> %res } @@ -715,10 +1048,15 @@ declare <4 x i32> @llvm.x86.sse2.psrai.d(<4 x i32>, i32) nounwind readnone define <8 x i16> @test_x86_sse2_psrai_w(<8 x i16> %a0) { -; CHECK-LABEL: test_x86_sse2_psrai_w: -; CHECK: ## BB#0: -; CHECK-NEXT: vpsraw $7, %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse2_psrai_w: +; AVX: ## BB#0: +; AVX-NEXT: vpsraw $7, %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse2_psrai_w: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpsraw $7, %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <8 x i16> @llvm.x86.sse2.psrai.w(<8 x i16> %a0, i32 7) ; <<8 x i16>> [#uses=1] ret <8 x i16> %res } @@ -726,10 +1064,15 @@ declare <8 x i16> @llvm.x86.sse2.psrai.w(<8 x i16>, i32) nounwind readnone define <4 x i32> @test_x86_sse2_psrl_d(<4 x i32> %a0, <4 x i32> %a1) { -; CHECK-LABEL: test_x86_sse2_psrl_d: -; CHECK: ## BB#0: -; CHECK-NEXT: vpsrld %xmm1, %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse2_psrl_d: +; AVX: ## BB#0: +; AVX-NEXT: vpsrld %xmm1, %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse2_psrl_d: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpsrld %xmm1, %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <4 x i32> @llvm.x86.sse2.psrl.d(<4 x i32> %a0, <4 x i32> %a1) ; <<4 x i32>> [#uses=1] ret <4 x i32> %res } @@ -737,10 +1080,15 @@ declare <4 x i32> @llvm.x86.sse2.psrl.d(<4 x i32>, <4 x i32>) nounwind readnone define <2 x i64> @test_x86_sse2_psrl_q(<2 x i64> %a0, <2 x i64> %a1) { -; CHECK-LABEL: test_x86_sse2_psrl_q: -; CHECK: ## BB#0: -; CHECK-NEXT: vpsrlq %xmm1, %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse2_psrl_q: +; AVX: ## BB#0: +; AVX-NEXT: vpsrlq %xmm1, %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse2_psrl_q: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpsrlq %xmm1, %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <2 x i64> @llvm.x86.sse2.psrl.q(<2 x i64> %a0, <2 x i64> %a1) ; <<2 x i64>> [#uses=1] ret <2 x i64> %res } @@ -748,10 +1096,15 @@ declare <2 x i64> @llvm.x86.sse2.psrl.q(<2 x i64>, <2 x i64>) nounwind readnone define <8 x i16> @test_x86_sse2_psrl_w(<8 x i16> %a0, <8 x i16> %a1) { -; CHECK-LABEL: test_x86_sse2_psrl_w: -; CHECK: ## BB#0: -; CHECK-NEXT: vpsrlw %xmm1, %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse2_psrl_w: +; AVX: ## BB#0: +; AVX-NEXT: vpsrlw %xmm1, %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse2_psrl_w: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpsrlw %xmm1, %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <8 x i16> @llvm.x86.sse2.psrl.w(<8 x i16> %a0, <8 x i16> %a1) ; <<8 x i16>> [#uses=1] ret <8 x i16> %res } @@ -759,10 +1112,15 @@ declare <8 x i16> @llvm.x86.sse2.psrl.w(<8 x i16>, <8 x i16>) nounwind readnone define <4 x i32> @test_x86_sse2_psrli_d(<4 x i32> %a0) { -; CHECK-LABEL: test_x86_sse2_psrli_d: -; CHECK: ## BB#0: -; CHECK-NEXT: vpsrld $7, %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse2_psrli_d: +; AVX: ## BB#0: +; AVX-NEXT: vpsrld $7, %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse2_psrli_d: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpsrld $7, %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <4 x i32> @llvm.x86.sse2.psrli.d(<4 x i32> %a0, i32 7) ; <<4 x i32>> [#uses=1] ret <4 x i32> %res } @@ -770,10 +1128,15 @@ declare <4 x i32> @llvm.x86.sse2.psrli.d(<4 x i32>, i32) nounwind readnone define <2 x i64> @test_x86_sse2_psrli_q(<2 x i64> %a0) { -; CHECK-LABEL: test_x86_sse2_psrli_q: -; CHECK: ## BB#0: -; CHECK-NEXT: vpsrlq $7, %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse2_psrli_q: +; AVX: ## BB#0: +; AVX-NEXT: vpsrlq $7, %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse2_psrli_q: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpsrlq $7, %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <2 x i64> @llvm.x86.sse2.psrli.q(<2 x i64> %a0, i32 7) ; <<2 x i64>> [#uses=1] ret <2 x i64> %res } @@ -781,10 +1144,15 @@ declare <2 x i64> @llvm.x86.sse2.psrli.q(<2 x i64>, i32) nounwind readnone define <8 x i16> @test_x86_sse2_psrli_w(<8 x i16> %a0) { -; CHECK-LABEL: test_x86_sse2_psrli_w: -; CHECK: ## BB#0: -; CHECK-NEXT: vpsrlw $7, %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse2_psrli_w: +; AVX: ## BB#0: +; AVX-NEXT: vpsrlw $7, %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse2_psrli_w: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpsrlw $7, %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <8 x i16> @llvm.x86.sse2.psrli.w(<8 x i16> %a0, i32 7) ; <<8 x i16>> [#uses=1] ret <8 x i16> %res } @@ -792,10 +1160,15 @@ declare <8 x i16> @llvm.x86.sse2.psrli.w(<8 x i16>, i32) nounwind readnone define <16 x i8> @test_x86_sse2_psubs_b(<16 x i8> %a0, <16 x i8> %a1) { -; CHECK-LABEL: test_x86_sse2_psubs_b: -; CHECK: ## BB#0: -; CHECK-NEXT: vpsubsb %xmm1, %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse2_psubs_b: +; AVX: ## BB#0: +; AVX-NEXT: vpsubsb %xmm1, %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse2_psubs_b: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpsubsb %xmm1, %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <16 x i8> @llvm.x86.sse2.psubs.b(<16 x i8> %a0, <16 x i8> %a1) ; <<16 x i8>> [#uses=1] ret <16 x i8> %res } @@ -803,10 +1176,15 @@ declare <16 x i8> @llvm.x86.sse2.psubs.b(<16 x i8>, <16 x i8>) nounwind readnone define <8 x i16> @test_x86_sse2_psubs_w(<8 x i16> %a0, <8 x i16> %a1) { -; CHECK-LABEL: test_x86_sse2_psubs_w: -; CHECK: ## BB#0: -; CHECK-NEXT: vpsubsw %xmm1, %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse2_psubs_w: +; AVX: ## BB#0: +; AVX-NEXT: vpsubsw %xmm1, %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse2_psubs_w: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpsubsw %xmm1, %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <8 x i16> @llvm.x86.sse2.psubs.w(<8 x i16> %a0, <8 x i16> %a1) ; <<8 x i16>> [#uses=1] ret <8 x i16> %res } @@ -814,10 +1192,15 @@ declare <8 x i16> @llvm.x86.sse2.psubs.w(<8 x i16>, <8 x i16>) nounwind readnone define <16 x i8> @test_x86_sse2_psubus_b(<16 x i8> %a0, <16 x i8> %a1) { -; CHECK-LABEL: test_x86_sse2_psubus_b: -; CHECK: ## BB#0: -; CHECK-NEXT: vpsubusb %xmm1, %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse2_psubus_b: +; AVX: ## BB#0: +; AVX-NEXT: vpsubusb %xmm1, %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse2_psubus_b: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpsubusb %xmm1, %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <16 x i8> @llvm.x86.sse2.psubus.b(<16 x i8> %a0, <16 x i8> %a1) ; <<16 x i8>> [#uses=1] ret <16 x i8> %res } @@ -825,10 +1208,15 @@ declare <16 x i8> @llvm.x86.sse2.psubus.b(<16 x i8>, <16 x i8>) nounwind readnon define <8 x i16> @test_x86_sse2_psubus_w(<8 x i16> %a0, <8 x i16> %a1) { -; CHECK-LABEL: test_x86_sse2_psubus_w: -; CHECK: ## BB#0: -; CHECK-NEXT: vpsubusw %xmm1, %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse2_psubus_w: +; AVX: ## BB#0: +; AVX-NEXT: vpsubusw %xmm1, %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse2_psubus_w: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpsubusw %xmm1, %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <8 x i16> @llvm.x86.sse2.psubus.w(<8 x i16> %a0, <8 x i16> %a1) ; <<8 x i16>> [#uses=1] ret <8 x i16> %res } @@ -836,10 +1224,15 @@ declare <8 x i16> @llvm.x86.sse2.psubus.w(<8 x i16>, <8 x i16>) nounwind readnon define <2 x double> @test_x86_sse2_sqrt_pd(<2 x double> %a0) { -; CHECK-LABEL: test_x86_sse2_sqrt_pd: -; CHECK: ## BB#0: -; CHECK-NEXT: vsqrtpd %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse2_sqrt_pd: +; AVX: ## BB#0: +; AVX-NEXT: vsqrtpd %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse2_sqrt_pd: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vsqrtpd %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <2 x double> @llvm.x86.sse2.sqrt.pd(<2 x double> %a0) ; <<2 x double>> [#uses=1] ret <2 x double> %res } @@ -847,10 +1240,15 @@ declare <2 x double> @llvm.x86.sse2.sqrt.pd(<2 x double>) nounwind readnone define <2 x double> @test_x86_sse2_sqrt_sd(<2 x double> %a0) { -; CHECK-LABEL: test_x86_sse2_sqrt_sd: -; CHECK: ## BB#0: -; CHECK-NEXT: vsqrtsd %xmm0, %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse2_sqrt_sd: +; AVX: ## BB#0: +; AVX-NEXT: vsqrtsd %xmm0, %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse2_sqrt_sd: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vsqrtsd %xmm0, %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <2 x double> @llvm.x86.sse2.sqrt.sd(<2 x double> %a0) ; <<2 x double>> [#uses=1] ret <2 x double> %res } @@ -858,11 +1256,17 @@ declare <2 x double> @llvm.x86.sse2.sqrt.sd(<2 x double>) nounwind readnone define void @test_x86_sse2_storel_dq(i8* %a0, <4 x i32> %a1) { -; CHECK-LABEL: test_x86_sse2_storel_dq: -; CHECK: ## BB#0: -; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax -; CHECK-NEXT: vmovlps %xmm0, (%eax) -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse2_storel_dq: +; AVX: ## BB#0: +; AVX-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX-NEXT: vmovlps %xmm0, (%eax) +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse2_storel_dq: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX512VL-NEXT: vmovlps %xmm0, (%eax) +; AVX512VL-NEXT: retl call void @llvm.x86.sse2.storel.dq(i8* %a0, <4 x i32> %a1) ret void } @@ -871,12 +1275,19 @@ declare void @llvm.x86.sse2.storel.dq(i8*, <4 x i32>) nounwind define void @test_x86_sse2_storeu_dq(i8* %a0, <16 x i8> %a1) { ; add operation forces the execution domain. -; CHECK-LABEL: test_x86_sse2_storeu_dq: -; CHECK: ## BB#0: -; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax -; CHECK-NEXT: vpaddb LCPI77_0, %xmm0, %xmm0 -; CHECK-NEXT: vmovdqu %xmm0, (%eax) -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse2_storeu_dq: +; AVX: ## BB#0: +; AVX-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX-NEXT: vpaddb LCPI77_0, %xmm0, %xmm0 +; AVX-NEXT: vmovdqu %xmm0, (%eax) +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse2_storeu_dq: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX512VL-NEXT: vpaddb LCPI77_0, %xmm0, %xmm0 +; AVX512VL-NEXT: vmovdqu %xmm0, (%eax) +; AVX512VL-NEXT: retl %a2 = add <16 x i8> %a1, call void @llvm.x86.sse2.storeu.dq(i8* %a0, <16 x i8> %a2) ret void @@ -886,14 +1297,23 @@ declare void @llvm.x86.sse2.storeu.dq(i8*, <16 x i8>) nounwind define void @test_x86_sse2_storeu_pd(i8* %a0, <2 x double> %a1) { ; fadd operation forces the execution domain. -; CHECK-LABEL: test_x86_sse2_storeu_pd: -; CHECK: ## BB#0: -; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax -; CHECK-NEXT: vmovsd {{.*#+}} xmm1 = mem[0],zero -; CHECK-NEXT: vpslldq {{.*#+}} xmm1 = zero,zero,zero,zero,zero,zero,zero,zero,xmm1[0,1,2,3,4,5,6,7] -; CHECK-NEXT: vaddpd %xmm1, %xmm0, %xmm0 -; CHECK-NEXT: vmovupd %xmm0, (%eax) -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse2_storeu_pd: +; AVX: ## BB#0: +; AVX-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX-NEXT: vmovsd {{.*#+}} xmm1 = mem[0],zero +; AVX-NEXT: vpslldq {{.*#+}} xmm1 = zero,zero,zero,zero,zero,zero,zero,zero,xmm1[0,1,2,3,4,5,6,7] +; AVX-NEXT: vaddpd %xmm1, %xmm0, %xmm0 +; AVX-NEXT: vmovupd %xmm0, (%eax) +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse2_storeu_pd: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX512VL-NEXT: vmovsd {{.*#+}} xmm1 = mem[0],zero +; AVX512VL-NEXT: vpslldq {{.*#+}} xmm1 = zero,zero,zero,zero,zero,zero,zero,zero,xmm1[0,1,2,3,4,5,6,7] +; AVX512VL-NEXT: vaddpd %xmm1, %xmm0, %xmm0 +; AVX512VL-NEXT: vmovups %xmm0, (%eax) +; AVX512VL-NEXT: retl %a2 = fadd <2 x double> %a1, call void @llvm.x86.sse2.storeu.pd(i8* %a0, <2 x double> %a2) ret void @@ -902,10 +1322,15 @@ declare void @llvm.x86.sse2.storeu.pd(i8*, <2 x double>) nounwind define <2 x double> @test_x86_sse2_sub_sd(<2 x double> %a0, <2 x double> %a1) { -; CHECK-LABEL: test_x86_sse2_sub_sd: -; CHECK: ## BB#0: -; CHECK-NEXT: vsubsd %xmm1, %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse2_sub_sd: +; AVX: ## BB#0: +; AVX-NEXT: vsubsd %xmm1, %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse2_sub_sd: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vsubsd %xmm1, %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <2 x double> @llvm.x86.sse2.sub.sd(<2 x double> %a0, <2 x double> %a1) ; <<2 x double>> [#uses=1] ret <2 x double> %res } @@ -913,14 +1338,23 @@ declare <2 x double> @llvm.x86.sse2.sub.sd(<2 x double>, <2 x double>) nounwind define i32 @test_x86_sse2_ucomieq_sd(<2 x double> %a0, <2 x double> %a1) { -; CHECK-LABEL: test_x86_sse2_ucomieq_sd: -; CHECK: ## BB#0: -; CHECK-NEXT: vucomisd %xmm1, %xmm0 -; CHECK-NEXT: setnp %al -; CHECK-NEXT: sete %cl -; CHECK-NEXT: andb %al, %cl -; CHECK-NEXT: movzbl %cl, %eax -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse2_ucomieq_sd: +; AVX: ## BB#0: +; AVX-NEXT: vucomisd %xmm1, %xmm0 +; AVX-NEXT: setnp %al +; AVX-NEXT: sete %cl +; AVX-NEXT: andb %al, %cl +; AVX-NEXT: movzbl %cl, %eax +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse2_ucomieq_sd: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vucomisd %xmm1, %xmm0 +; AVX512VL-NEXT: setnp %al +; AVX512VL-NEXT: sete %cl +; AVX512VL-NEXT: andb %al, %cl +; AVX512VL-NEXT: movzbl %cl, %eax +; AVX512VL-NEXT: retl %res = call i32 @llvm.x86.sse2.ucomieq.sd(<2 x double> %a0, <2 x double> %a1) ; [#uses=1] ret i32 %res } @@ -928,12 +1362,19 @@ declare i32 @llvm.x86.sse2.ucomieq.sd(<2 x double>, <2 x double>) nounwind readn define i32 @test_x86_sse2_ucomige_sd(<2 x double> %a0, <2 x double> %a1) { -; CHECK-LABEL: test_x86_sse2_ucomige_sd: -; CHECK: ## BB#0: -; CHECK-NEXT: vucomisd %xmm1, %xmm0 -; CHECK-NEXT: setae %al -; CHECK-NEXT: movzbl %al, %eax -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse2_ucomige_sd: +; AVX: ## BB#0: +; AVX-NEXT: vucomisd %xmm1, %xmm0 +; AVX-NEXT: setae %al +; AVX-NEXT: movzbl %al, %eax +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse2_ucomige_sd: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vucomisd %xmm1, %xmm0 +; AVX512VL-NEXT: setae %al +; AVX512VL-NEXT: movzbl %al, %eax +; AVX512VL-NEXT: retl %res = call i32 @llvm.x86.sse2.ucomige.sd(<2 x double> %a0, <2 x double> %a1) ; [#uses=1] ret i32 %res } @@ -941,12 +1382,19 @@ declare i32 @llvm.x86.sse2.ucomige.sd(<2 x double>, <2 x double>) nounwind readn define i32 @test_x86_sse2_ucomigt_sd(<2 x double> %a0, <2 x double> %a1) { -; CHECK-LABEL: test_x86_sse2_ucomigt_sd: -; CHECK: ## BB#0: -; CHECK-NEXT: vucomisd %xmm1, %xmm0 -; CHECK-NEXT: seta %al -; CHECK-NEXT: movzbl %al, %eax -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse2_ucomigt_sd: +; AVX: ## BB#0: +; AVX-NEXT: vucomisd %xmm1, %xmm0 +; AVX-NEXT: seta %al +; AVX-NEXT: movzbl %al, %eax +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse2_ucomigt_sd: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vucomisd %xmm1, %xmm0 +; AVX512VL-NEXT: seta %al +; AVX512VL-NEXT: movzbl %al, %eax +; AVX512VL-NEXT: retl %res = call i32 @llvm.x86.sse2.ucomigt.sd(<2 x double> %a0, <2 x double> %a1) ; [#uses=1] ret i32 %res } @@ -954,12 +1402,19 @@ declare i32 @llvm.x86.sse2.ucomigt.sd(<2 x double>, <2 x double>) nounwind readn define i32 @test_x86_sse2_ucomile_sd(<2 x double> %a0, <2 x double> %a1) { -; CHECK-LABEL: test_x86_sse2_ucomile_sd: -; CHECK: ## BB#0: -; CHECK-NEXT: vucomisd %xmm0, %xmm1 -; CHECK-NEXT: setae %al -; CHECK-NEXT: movzbl %al, %eax -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse2_ucomile_sd: +; AVX: ## BB#0: +; AVX-NEXT: vucomisd %xmm0, %xmm1 +; AVX-NEXT: setae %al +; AVX-NEXT: movzbl %al, %eax +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse2_ucomile_sd: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vucomisd %xmm0, %xmm1 +; AVX512VL-NEXT: setae %al +; AVX512VL-NEXT: movzbl %al, %eax +; AVX512VL-NEXT: retl %res = call i32 @llvm.x86.sse2.ucomile.sd(<2 x double> %a0, <2 x double> %a1) ; [#uses=1] ret i32 %res } @@ -967,12 +1422,19 @@ declare i32 @llvm.x86.sse2.ucomile.sd(<2 x double>, <2 x double>) nounwind readn define i32 @test_x86_sse2_ucomilt_sd(<2 x double> %a0, <2 x double> %a1) { -; CHECK-LABEL: test_x86_sse2_ucomilt_sd: -; CHECK: ## BB#0: -; CHECK-NEXT: vucomisd %xmm0, %xmm1 -; CHECK-NEXT: seta %al -; CHECK-NEXT: movzbl %al, %eax -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse2_ucomilt_sd: +; AVX: ## BB#0: +; AVX-NEXT: vucomisd %xmm0, %xmm1 +; AVX-NEXT: seta %al +; AVX-NEXT: movzbl %al, %eax +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse2_ucomilt_sd: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vucomisd %xmm0, %xmm1 +; AVX512VL-NEXT: seta %al +; AVX512VL-NEXT: movzbl %al, %eax +; AVX512VL-NEXT: retl %res = call i32 @llvm.x86.sse2.ucomilt.sd(<2 x double> %a0, <2 x double> %a1) ; [#uses=1] ret i32 %res } @@ -980,14 +1442,23 @@ declare i32 @llvm.x86.sse2.ucomilt.sd(<2 x double>, <2 x double>) nounwind readn define i32 @test_x86_sse2_ucomineq_sd(<2 x double> %a0, <2 x double> %a1) { -; CHECK-LABEL: test_x86_sse2_ucomineq_sd: -; CHECK: ## BB#0: -; CHECK-NEXT: vucomisd %xmm1, %xmm0 -; CHECK-NEXT: setp %al -; CHECK-NEXT: setne %cl -; CHECK-NEXT: orb %al, %cl -; CHECK-NEXT: movzbl %cl, %eax -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse2_ucomineq_sd: +; AVX: ## BB#0: +; AVX-NEXT: vucomisd %xmm1, %xmm0 +; AVX-NEXT: setp %al +; AVX-NEXT: setne %cl +; AVX-NEXT: orb %al, %cl +; AVX-NEXT: movzbl %cl, %eax +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse2_ucomineq_sd: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vucomisd %xmm1, %xmm0 +; AVX512VL-NEXT: setp %al +; AVX512VL-NEXT: setne %cl +; AVX512VL-NEXT: orb %al, %cl +; AVX512VL-NEXT: movzbl %cl, %eax +; AVX512VL-NEXT: retl %res = call i32 @llvm.x86.sse2.ucomineq.sd(<2 x double> %a0, <2 x double> %a1) ; [#uses=1] ret i32 %res } @@ -995,10 +1466,15 @@ declare i32 @llvm.x86.sse2.ucomineq.sd(<2 x double>, <2 x double>) nounwind read define <2 x double> @test_x86_sse3_addsub_pd(<2 x double> %a0, <2 x double> %a1) { -; CHECK-LABEL: test_x86_sse3_addsub_pd: -; CHECK: ## BB#0: -; CHECK-NEXT: vaddsubpd %xmm1, %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse3_addsub_pd: +; AVX: ## BB#0: +; AVX-NEXT: vaddsubpd %xmm1, %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse3_addsub_pd: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vaddsubpd %xmm1, %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <2 x double> @llvm.x86.sse3.addsub.pd(<2 x double> %a0, <2 x double> %a1) ; <<2 x double>> [#uses=1] ret <2 x double> %res } @@ -1006,10 +1482,15 @@ declare <2 x double> @llvm.x86.sse3.addsub.pd(<2 x double>, <2 x double>) nounwi define <4 x float> @test_x86_sse3_addsub_ps(<4 x float> %a0, <4 x float> %a1) { -; CHECK-LABEL: test_x86_sse3_addsub_ps: -; CHECK: ## BB#0: -; CHECK-NEXT: vaddsubps %xmm1, %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse3_addsub_ps: +; AVX: ## BB#0: +; AVX-NEXT: vaddsubps %xmm1, %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse3_addsub_ps: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vaddsubps %xmm1, %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <4 x float> @llvm.x86.sse3.addsub.ps(<4 x float> %a0, <4 x float> %a1) ; <<4 x float>> [#uses=1] ret <4 x float> %res } @@ -1017,10 +1498,15 @@ declare <4 x float> @llvm.x86.sse3.addsub.ps(<4 x float>, <4 x float>) nounwind define <2 x double> @test_x86_sse3_hadd_pd(<2 x double> %a0, <2 x double> %a1) { -; CHECK-LABEL: test_x86_sse3_hadd_pd: -; CHECK: ## BB#0: -; CHECK-NEXT: vhaddpd %xmm1, %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse3_hadd_pd: +; AVX: ## BB#0: +; AVX-NEXT: vhaddpd %xmm1, %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse3_hadd_pd: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vhaddpd %xmm1, %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <2 x double> @llvm.x86.sse3.hadd.pd(<2 x double> %a0, <2 x double> %a1) ; <<2 x double>> [#uses=1] ret <2 x double> %res } @@ -1028,10 +1514,15 @@ declare <2 x double> @llvm.x86.sse3.hadd.pd(<2 x double>, <2 x double>) nounwind define <4 x float> @test_x86_sse3_hadd_ps(<4 x float> %a0, <4 x float> %a1) { -; CHECK-LABEL: test_x86_sse3_hadd_ps: -; CHECK: ## BB#0: -; CHECK-NEXT: vhaddps %xmm1, %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse3_hadd_ps: +; AVX: ## BB#0: +; AVX-NEXT: vhaddps %xmm1, %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse3_hadd_ps: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vhaddps %xmm1, %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <4 x float> @llvm.x86.sse3.hadd.ps(<4 x float> %a0, <4 x float> %a1) ; <<4 x float>> [#uses=1] ret <4 x float> %res } @@ -1039,10 +1530,15 @@ declare <4 x float> @llvm.x86.sse3.hadd.ps(<4 x float>, <4 x float>) nounwind re define <2 x double> @test_x86_sse3_hsub_pd(<2 x double> %a0, <2 x double> %a1) { -; CHECK-LABEL: test_x86_sse3_hsub_pd: -; CHECK: ## BB#0: -; CHECK-NEXT: vhsubpd %xmm1, %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse3_hsub_pd: +; AVX: ## BB#0: +; AVX-NEXT: vhsubpd %xmm1, %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse3_hsub_pd: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vhsubpd %xmm1, %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <2 x double> @llvm.x86.sse3.hsub.pd(<2 x double> %a0, <2 x double> %a1) ; <<2 x double>> [#uses=1] ret <2 x double> %res } @@ -1050,10 +1546,15 @@ declare <2 x double> @llvm.x86.sse3.hsub.pd(<2 x double>, <2 x double>) nounwind define <4 x float> @test_x86_sse3_hsub_ps(<4 x float> %a0, <4 x float> %a1) { -; CHECK-LABEL: test_x86_sse3_hsub_ps: -; CHECK: ## BB#0: -; CHECK-NEXT: vhsubps %xmm1, %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse3_hsub_ps: +; AVX: ## BB#0: +; AVX-NEXT: vhsubps %xmm1, %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse3_hsub_ps: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vhsubps %xmm1, %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <4 x float> @llvm.x86.sse3.hsub.ps(<4 x float> %a0, <4 x float> %a1) ; <<4 x float>> [#uses=1] ret <4 x float> %res } @@ -1061,11 +1562,17 @@ declare <4 x float> @llvm.x86.sse3.hsub.ps(<4 x float>, <4 x float>) nounwind re define <16 x i8> @test_x86_sse3_ldu_dq(i8* %a0) { -; CHECK-LABEL: test_x86_sse3_ldu_dq: -; CHECK: ## BB#0: -; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax -; CHECK-NEXT: vlddqu (%eax), %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse3_ldu_dq: +; AVX: ## BB#0: +; AVX-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX-NEXT: vlddqu (%eax), %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse3_ldu_dq: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX512VL-NEXT: vlddqu (%eax), %xmm0 +; AVX512VL-NEXT: retl %res = call <16 x i8> @llvm.x86.sse3.ldu.dq(i8* %a0) ; <<16 x i8>> [#uses=1] ret <16 x i8> %res } @@ -1073,10 +1580,15 @@ declare <16 x i8> @llvm.x86.sse3.ldu.dq(i8*) nounwind readonly define <2 x double> @test_x86_sse41_blendvpd(<2 x double> %a0, <2 x double> %a1, <2 x double> %a2) { -; CHECK-LABEL: test_x86_sse41_blendvpd: -; CHECK: ## BB#0: -; CHECK-NEXT: vblendvpd %xmm2, %xmm1, %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse41_blendvpd: +; AVX: ## BB#0: +; AVX-NEXT: vblendvpd %xmm2, %xmm1, %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse41_blendvpd: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vblendvpd %xmm2, %xmm1, %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <2 x double> @llvm.x86.sse41.blendvpd(<2 x double> %a0, <2 x double> %a1, <2 x double> %a2) ; <<2 x double>> [#uses=1] ret <2 x double> %res } @@ -1084,10 +1596,15 @@ declare <2 x double> @llvm.x86.sse41.blendvpd(<2 x double>, <2 x double>, <2 x d define <4 x float> @test_x86_sse41_blendvps(<4 x float> %a0, <4 x float> %a1, <4 x float> %a2) { -; CHECK-LABEL: test_x86_sse41_blendvps: -; CHECK: ## BB#0: -; CHECK-NEXT: vblendvps %xmm2, %xmm1, %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse41_blendvps: +; AVX: ## BB#0: +; AVX-NEXT: vblendvps %xmm2, %xmm1, %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse41_blendvps: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vblendvps %xmm2, %xmm1, %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <4 x float> @llvm.x86.sse41.blendvps(<4 x float> %a0, <4 x float> %a1, <4 x float> %a2) ; <<4 x float>> [#uses=1] ret <4 x float> %res } @@ -1095,10 +1612,15 @@ declare <4 x float> @llvm.x86.sse41.blendvps(<4 x float>, <4 x float>, <4 x floa define <2 x double> @test_x86_sse41_dppd(<2 x double> %a0, <2 x double> %a1) { -; CHECK-LABEL: test_x86_sse41_dppd: -; CHECK: ## BB#0: -; CHECK-NEXT: vdppd $7, %xmm1, %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse41_dppd: +; AVX: ## BB#0: +; AVX-NEXT: vdppd $7, %xmm1, %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse41_dppd: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vdppd $7, %xmm1, %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <2 x double> @llvm.x86.sse41.dppd(<2 x double> %a0, <2 x double> %a1, i8 7) ; <<2 x double>> [#uses=1] ret <2 x double> %res } @@ -1106,10 +1628,15 @@ declare <2 x double> @llvm.x86.sse41.dppd(<2 x double>, <2 x double>, i8) nounwi define <4 x float> @test_x86_sse41_dpps(<4 x float> %a0, <4 x float> %a1) { -; CHECK-LABEL: test_x86_sse41_dpps: -; CHECK: ## BB#0: -; CHECK-NEXT: vdpps $7, %xmm1, %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse41_dpps: +; AVX: ## BB#0: +; AVX-NEXT: vdpps $7, %xmm1, %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse41_dpps: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vdpps $7, %xmm1, %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <4 x float> @llvm.x86.sse41.dpps(<4 x float> %a0, <4 x float> %a1, i8 7) ; <<4 x float>> [#uses=1] ret <4 x float> %res } @@ -1117,10 +1644,15 @@ declare <4 x float> @llvm.x86.sse41.dpps(<4 x float>, <4 x float>, i8) nounwind define <4 x float> @test_x86_sse41_insertps(<4 x float> %a0, <4 x float> %a1) { -; CHECK-LABEL: test_x86_sse41_insertps: -; CHECK: ## BB#0: -; CHECK-NEXT: vinsertps {{.*#+}} xmm0 = zero,xmm1[0],zero,xmm0[3] -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse41_insertps: +; AVX: ## BB#0: +; AVX-NEXT: vinsertps {{.*#+}} xmm0 = zero,xmm1[0],zero,xmm0[3] +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse41_insertps: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vinsertps {{.*#+}} xmm0 = zero,xmm1[0],zero,xmm0[3] +; AVX512VL-NEXT: retl %res = call <4 x float> @llvm.x86.sse41.insertps(<4 x float> %a0, <4 x float> %a1, i8 21) ; <<4 x float>> [#uses=1] ret <4 x float> %res } @@ -1129,10 +1661,15 @@ declare <4 x float> @llvm.x86.sse41.insertps(<4 x float>, <4 x float>, i8) nounw define <8 x i16> @test_x86_sse41_mpsadbw(<16 x i8> %a0, <16 x i8> %a1) { -; CHECK-LABEL: test_x86_sse41_mpsadbw: -; CHECK: ## BB#0: -; CHECK-NEXT: vmpsadbw $7, %xmm1, %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse41_mpsadbw: +; AVX: ## BB#0: +; AVX-NEXT: vmpsadbw $7, %xmm1, %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse41_mpsadbw: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vmpsadbw $7, %xmm1, %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <8 x i16> @llvm.x86.sse41.mpsadbw(<16 x i8> %a0, <16 x i8> %a1, i8 7) ; <<8 x i16>> [#uses=1] ret <8 x i16> %res } @@ -1140,10 +1677,15 @@ declare <8 x i16> @llvm.x86.sse41.mpsadbw(<16 x i8>, <16 x i8>, i8) nounwind rea define <8 x i16> @test_x86_sse41_packusdw(<4 x i32> %a0, <4 x i32> %a1) { -; CHECK-LABEL: test_x86_sse41_packusdw: -; CHECK: ## BB#0: -; CHECK-NEXT: vpackusdw %xmm1, %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse41_packusdw: +; AVX: ## BB#0: +; AVX-NEXT: vpackusdw %xmm1, %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse41_packusdw: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpackusdw %xmm1, %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <8 x i16> @llvm.x86.sse41.packusdw(<4 x i32> %a0, <4 x i32> %a1) ; <<8 x i16>> [#uses=1] ret <8 x i16> %res } @@ -1151,10 +1693,15 @@ declare <8 x i16> @llvm.x86.sse41.packusdw(<4 x i32>, <4 x i32>) nounwind readno define <16 x i8> @test_x86_sse41_pblendvb(<16 x i8> %a0, <16 x i8> %a1, <16 x i8> %a2) { -; CHECK-LABEL: test_x86_sse41_pblendvb: -; CHECK: ## BB#0: -; CHECK-NEXT: vpblendvb %xmm2, %xmm1, %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse41_pblendvb: +; AVX: ## BB#0: +; AVX-NEXT: vpblendvb %xmm2, %xmm1, %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse41_pblendvb: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpblendvb %xmm2, %xmm1, %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <16 x i8> @llvm.x86.sse41.pblendvb(<16 x i8> %a0, <16 x i8> %a1, <16 x i8> %a2) ; <<16 x i8>> [#uses=1] ret <16 x i8> %res } @@ -1162,10 +1709,15 @@ declare <16 x i8> @llvm.x86.sse41.pblendvb(<16 x i8>, <16 x i8>, <16 x i8>) noun define <8 x i16> @test_x86_sse41_phminposuw(<8 x i16> %a0) { -; CHECK-LABEL: test_x86_sse41_phminposuw: -; CHECK: ## BB#0: -; CHECK-NEXT: vphminposuw %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse41_phminposuw: +; AVX: ## BB#0: +; AVX-NEXT: vphminposuw %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse41_phminposuw: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vphminposuw %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <8 x i16> @llvm.x86.sse41.phminposuw(<8 x i16> %a0) ; <<8 x i16>> [#uses=1] ret <8 x i16> %res } @@ -1173,10 +1725,15 @@ declare <8 x i16> @llvm.x86.sse41.phminposuw(<8 x i16>) nounwind readnone define <16 x i8> @test_x86_sse41_pmaxsb(<16 x i8> %a0, <16 x i8> %a1) { -; CHECK-LABEL: test_x86_sse41_pmaxsb: -; CHECK: ## BB#0: -; CHECK-NEXT: vpmaxsb %xmm1, %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse41_pmaxsb: +; AVX: ## BB#0: +; AVX-NEXT: vpmaxsb %xmm1, %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse41_pmaxsb: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpmaxsb %xmm1, %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <16 x i8> @llvm.x86.sse41.pmaxsb(<16 x i8> %a0, <16 x i8> %a1) ; <<16 x i8>> [#uses=1] ret <16 x i8> %res } @@ -1184,10 +1741,15 @@ declare <16 x i8> @llvm.x86.sse41.pmaxsb(<16 x i8>, <16 x i8>) nounwind readnone define <4 x i32> @test_x86_sse41_pmaxsd(<4 x i32> %a0, <4 x i32> %a1) { -; CHECK-LABEL: test_x86_sse41_pmaxsd: -; CHECK: ## BB#0: -; CHECK-NEXT: vpmaxsd %xmm1, %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse41_pmaxsd: +; AVX: ## BB#0: +; AVX-NEXT: vpmaxsd %xmm1, %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse41_pmaxsd: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpmaxsd %xmm1, %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <4 x i32> @llvm.x86.sse41.pmaxsd(<4 x i32> %a0, <4 x i32> %a1) ; <<4 x i32>> [#uses=1] ret <4 x i32> %res } @@ -1195,10 +1757,15 @@ declare <4 x i32> @llvm.x86.sse41.pmaxsd(<4 x i32>, <4 x i32>) nounwind readnone define <4 x i32> @test_x86_sse41_pmaxud(<4 x i32> %a0, <4 x i32> %a1) { -; CHECK-LABEL: test_x86_sse41_pmaxud: -; CHECK: ## BB#0: -; CHECK-NEXT: vpmaxud %xmm1, %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse41_pmaxud: +; AVX: ## BB#0: +; AVX-NEXT: vpmaxud %xmm1, %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse41_pmaxud: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpmaxud %xmm1, %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <4 x i32> @llvm.x86.sse41.pmaxud(<4 x i32> %a0, <4 x i32> %a1) ; <<4 x i32>> [#uses=1] ret <4 x i32> %res } @@ -1206,10 +1773,15 @@ declare <4 x i32> @llvm.x86.sse41.pmaxud(<4 x i32>, <4 x i32>) nounwind readnone define <8 x i16> @test_x86_sse41_pmaxuw(<8 x i16> %a0, <8 x i16> %a1) { -; CHECK-LABEL: test_x86_sse41_pmaxuw: -; CHECK: ## BB#0: -; CHECK-NEXT: vpmaxuw %xmm1, %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse41_pmaxuw: +; AVX: ## BB#0: +; AVX-NEXT: vpmaxuw %xmm1, %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse41_pmaxuw: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpmaxuw %xmm1, %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <8 x i16> @llvm.x86.sse41.pmaxuw(<8 x i16> %a0, <8 x i16> %a1) ; <<8 x i16>> [#uses=1] ret <8 x i16> %res } @@ -1217,10 +1789,15 @@ declare <8 x i16> @llvm.x86.sse41.pmaxuw(<8 x i16>, <8 x i16>) nounwind readnone define <16 x i8> @test_x86_sse41_pminsb(<16 x i8> %a0, <16 x i8> %a1) { -; CHECK-LABEL: test_x86_sse41_pminsb: -; CHECK: ## BB#0: -; CHECK-NEXT: vpminsb %xmm1, %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse41_pminsb: +; AVX: ## BB#0: +; AVX-NEXT: vpminsb %xmm1, %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse41_pminsb: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpminsb %xmm1, %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <16 x i8> @llvm.x86.sse41.pminsb(<16 x i8> %a0, <16 x i8> %a1) ; <<16 x i8>> [#uses=1] ret <16 x i8> %res } @@ -1228,10 +1805,15 @@ declare <16 x i8> @llvm.x86.sse41.pminsb(<16 x i8>, <16 x i8>) nounwind readnone define <4 x i32> @test_x86_sse41_pminsd(<4 x i32> %a0, <4 x i32> %a1) { -; CHECK-LABEL: test_x86_sse41_pminsd: -; CHECK: ## BB#0: -; CHECK-NEXT: vpminsd %xmm1, %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse41_pminsd: +; AVX: ## BB#0: +; AVX-NEXT: vpminsd %xmm1, %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse41_pminsd: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpminsd %xmm1, %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <4 x i32> @llvm.x86.sse41.pminsd(<4 x i32> %a0, <4 x i32> %a1) ; <<4 x i32>> [#uses=1] ret <4 x i32> %res } @@ -1239,10 +1821,15 @@ declare <4 x i32> @llvm.x86.sse41.pminsd(<4 x i32>, <4 x i32>) nounwind readnone define <4 x i32> @test_x86_sse41_pminud(<4 x i32> %a0, <4 x i32> %a1) { -; CHECK-LABEL: test_x86_sse41_pminud: -; CHECK: ## BB#0: -; CHECK-NEXT: vpminud %xmm1, %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse41_pminud: +; AVX: ## BB#0: +; AVX-NEXT: vpminud %xmm1, %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse41_pminud: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpminud %xmm1, %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <4 x i32> @llvm.x86.sse41.pminud(<4 x i32> %a0, <4 x i32> %a1) ; <<4 x i32>> [#uses=1] ret <4 x i32> %res } @@ -1250,10 +1837,15 @@ declare <4 x i32> @llvm.x86.sse41.pminud(<4 x i32>, <4 x i32>) nounwind readnone define <8 x i16> @test_x86_sse41_pminuw(<8 x i16> %a0, <8 x i16> %a1) { -; CHECK-LABEL: test_x86_sse41_pminuw: -; CHECK: ## BB#0: -; CHECK-NEXT: vpminuw %xmm1, %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse41_pminuw: +; AVX: ## BB#0: +; AVX-NEXT: vpminuw %xmm1, %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse41_pminuw: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpminuw %xmm1, %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <8 x i16> @llvm.x86.sse41.pminuw(<8 x i16> %a0, <8 x i16> %a1) ; <<8 x i16>> [#uses=1] ret <8 x i16> %res } @@ -1261,10 +1853,15 @@ declare <8 x i16> @llvm.x86.sse41.pminuw(<8 x i16>, <8 x i16>) nounwind readnone define <4 x i32> @test_x86_sse41_pmovzxbd(<16 x i8> %a0) { -; CHECK-LABEL: test_x86_sse41_pmovzxbd: -; CHECK: ## BB#0: -; CHECK-NEXT: vpmovzxbd {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse41_pmovzxbd: +; AVX: ## BB#0: +; AVX-NEXT: vpmovzxbd {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse41_pmovzxbd: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpmovzxbd {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero +; AVX512VL-NEXT: retl %res = call <4 x i32> @llvm.x86.sse41.pmovzxbd(<16 x i8> %a0) ; <<4 x i32>> [#uses=1] ret <4 x i32> %res } @@ -1272,10 +1869,15 @@ declare <4 x i32> @llvm.x86.sse41.pmovzxbd(<16 x i8>) nounwind readnone define <2 x i64> @test_x86_sse41_pmovzxbq(<16 x i8> %a0) { -; CHECK-LABEL: test_x86_sse41_pmovzxbq: -; CHECK: ## BB#0: -; CHECK-NEXT: vpmovzxbq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,zero,zero,zero,zero,xmm0[1],zero,zero,zero,zero,zero,zero,zero -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse41_pmovzxbq: +; AVX: ## BB#0: +; AVX-NEXT: vpmovzxbq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,zero,zero,zero,zero,xmm0[1],zero,zero,zero,zero,zero,zero,zero +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse41_pmovzxbq: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpmovzxbq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,zero,zero,zero,zero,xmm0[1],zero,zero,zero,zero,zero,zero,zero +; AVX512VL-NEXT: retl %res = call <2 x i64> @llvm.x86.sse41.pmovzxbq(<16 x i8> %a0) ; <<2 x i64>> [#uses=1] ret <2 x i64> %res } @@ -1283,10 +1885,15 @@ declare <2 x i64> @llvm.x86.sse41.pmovzxbq(<16 x i8>) nounwind readnone define <8 x i16> @test_x86_sse41_pmovzxbw(<16 x i8> %a0) { -; CHECK-LABEL: test_x86_sse41_pmovzxbw: -; CHECK: ## BB#0: -; CHECK-NEXT: vpmovzxbw {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse41_pmovzxbw: +; AVX: ## BB#0: +; AVX-NEXT: vpmovzxbw {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse41_pmovzxbw: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpmovzxbw {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero +; AVX512VL-NEXT: retl %res = call <8 x i16> @llvm.x86.sse41.pmovzxbw(<16 x i8> %a0) ; <<8 x i16>> [#uses=1] ret <8 x i16> %res } @@ -1294,10 +1901,15 @@ declare <8 x i16> @llvm.x86.sse41.pmovzxbw(<16 x i8>) nounwind readnone define <2 x i64> @test_x86_sse41_pmovzxdq(<4 x i32> %a0) { -; CHECK-LABEL: test_x86_sse41_pmovzxdq: -; CHECK: ## BB#0: -; CHECK-NEXT: vpmovzxdq {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse41_pmovzxdq: +; AVX: ## BB#0: +; AVX-NEXT: vpmovzxdq {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse41_pmovzxdq: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpmovzxdq {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero +; AVX512VL-NEXT: retl %res = call <2 x i64> @llvm.x86.sse41.pmovzxdq(<4 x i32> %a0) ; <<2 x i64>> [#uses=1] ret <2 x i64> %res } @@ -1305,10 +1917,15 @@ declare <2 x i64> @llvm.x86.sse41.pmovzxdq(<4 x i32>) nounwind readnone define <4 x i32> @test_x86_sse41_pmovzxwd(<8 x i16> %a0) { -; CHECK-LABEL: test_x86_sse41_pmovzxwd: -; CHECK: ## BB#0: -; CHECK-NEXT: vpmovzxwd {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse41_pmovzxwd: +; AVX: ## BB#0: +; AVX-NEXT: vpmovzxwd {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse41_pmovzxwd: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpmovzxwd {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero +; AVX512VL-NEXT: retl %res = call <4 x i32> @llvm.x86.sse41.pmovzxwd(<8 x i16> %a0) ; <<4 x i32>> [#uses=1] ret <4 x i32> %res } @@ -1316,10 +1933,15 @@ declare <4 x i32> @llvm.x86.sse41.pmovzxwd(<8 x i16>) nounwind readnone define <2 x i64> @test_x86_sse41_pmovzxwq(<8 x i16> %a0) { -; CHECK-LABEL: test_x86_sse41_pmovzxwq: -; CHECK: ## BB#0: -; CHECK-NEXT: vpmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse41_pmovzxwq: +; AVX: ## BB#0: +; AVX-NEXT: vpmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse41_pmovzxwq: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero +; AVX512VL-NEXT: retl %res = call <2 x i64> @llvm.x86.sse41.pmovzxwq(<8 x i16> %a0) ; <<2 x i64>> [#uses=1] ret <2 x i64> %res } @@ -1327,10 +1949,15 @@ declare <2 x i64> @llvm.x86.sse41.pmovzxwq(<8 x i16>) nounwind readnone define <2 x i64> @test_x86_sse41_pmuldq(<4 x i32> %a0, <4 x i32> %a1) { -; CHECK-LABEL: test_x86_sse41_pmuldq: -; CHECK: ## BB#0: -; CHECK-NEXT: vpmuldq %xmm1, %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse41_pmuldq: +; AVX: ## BB#0: +; AVX-NEXT: vpmuldq %xmm1, %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse41_pmuldq: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpmuldq %xmm1, %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <2 x i64> @llvm.x86.sse41.pmuldq(<4 x i32> %a0, <4 x i32> %a1) ; <<2 x i64>> [#uses=1] ret <2 x i64> %res } @@ -1338,12 +1965,19 @@ declare <2 x i64> @llvm.x86.sse41.pmuldq(<4 x i32>, <4 x i32>) nounwind readnone define i32 @test_x86_sse41_ptestc(<2 x i64> %a0, <2 x i64> %a1) { -; CHECK-LABEL: test_x86_sse41_ptestc: -; CHECK: ## BB#0: -; CHECK-NEXT: vptest %xmm1, %xmm0 -; CHECK-NEXT: sbbl %eax, %eax -; CHECK-NEXT: andl $1, %eax -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse41_ptestc: +; AVX: ## BB#0: +; AVX-NEXT: vptest %xmm1, %xmm0 +; AVX-NEXT: sbbl %eax, %eax +; AVX-NEXT: andl $1, %eax +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse41_ptestc: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vptest %xmm1, %xmm0 +; AVX512VL-NEXT: sbbl %eax, %eax +; AVX512VL-NEXT: andl $1, %eax +; AVX512VL-NEXT: retl %res = call i32 @llvm.x86.sse41.ptestc(<2 x i64> %a0, <2 x i64> %a1) ; [#uses=1] ret i32 %res } @@ -1351,12 +1985,19 @@ declare i32 @llvm.x86.sse41.ptestc(<2 x i64>, <2 x i64>) nounwind readnone define i32 @test_x86_sse41_ptestnzc(<2 x i64> %a0, <2 x i64> %a1) { -; CHECK-LABEL: test_x86_sse41_ptestnzc: -; CHECK: ## BB#0: -; CHECK-NEXT: vptest %xmm1, %xmm0 -; CHECK-NEXT: seta %al -; CHECK-NEXT: movzbl %al, %eax -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse41_ptestnzc: +; AVX: ## BB#0: +; AVX-NEXT: vptest %xmm1, %xmm0 +; AVX-NEXT: seta %al +; AVX-NEXT: movzbl %al, %eax +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse41_ptestnzc: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vptest %xmm1, %xmm0 +; AVX512VL-NEXT: seta %al +; AVX512VL-NEXT: movzbl %al, %eax +; AVX512VL-NEXT: retl %res = call i32 @llvm.x86.sse41.ptestnzc(<2 x i64> %a0, <2 x i64> %a1) ; [#uses=1] ret i32 %res } @@ -1364,12 +2005,19 @@ declare i32 @llvm.x86.sse41.ptestnzc(<2 x i64>, <2 x i64>) nounwind readnone define i32 @test_x86_sse41_ptestz(<2 x i64> %a0, <2 x i64> %a1) { -; CHECK-LABEL: test_x86_sse41_ptestz: -; CHECK: ## BB#0: -; CHECK-NEXT: vptest %xmm1, %xmm0 -; CHECK-NEXT: sete %al -; CHECK-NEXT: movzbl %al, %eax -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse41_ptestz: +; AVX: ## BB#0: +; AVX-NEXT: vptest %xmm1, %xmm0 +; AVX-NEXT: sete %al +; AVX-NEXT: movzbl %al, %eax +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse41_ptestz: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vptest %xmm1, %xmm0 +; AVX512VL-NEXT: sete %al +; AVX512VL-NEXT: movzbl %al, %eax +; AVX512VL-NEXT: retl %res = call i32 @llvm.x86.sse41.ptestz(<2 x i64> %a0, <2 x i64> %a1) ; [#uses=1] ret i32 %res } @@ -1377,10 +2025,15 @@ declare i32 @llvm.x86.sse41.ptestz(<2 x i64>, <2 x i64>) nounwind readnone define <2 x double> @test_x86_sse41_round_pd(<2 x double> %a0) { -; CHECK-LABEL: test_x86_sse41_round_pd: -; CHECK: ## BB#0: -; CHECK-NEXT: vroundpd $7, %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse41_round_pd: +; AVX: ## BB#0: +; AVX-NEXT: vroundpd $7, %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse41_round_pd: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vroundpd $7, %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <2 x double> @llvm.x86.sse41.round.pd(<2 x double> %a0, i32 7) ; <<2 x double>> [#uses=1] ret <2 x double> %res } @@ -1388,10 +2041,15 @@ declare <2 x double> @llvm.x86.sse41.round.pd(<2 x double>, i32) nounwind readno define <4 x float> @test_x86_sse41_round_ps(<4 x float> %a0) { -; CHECK-LABEL: test_x86_sse41_round_ps: -; CHECK: ## BB#0: -; CHECK-NEXT: vroundps $7, %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse41_round_ps: +; AVX: ## BB#0: +; AVX-NEXT: vroundps $7, %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse41_round_ps: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vroundps $7, %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <4 x float> @llvm.x86.sse41.round.ps(<4 x float> %a0, i32 7) ; <<4 x float>> [#uses=1] ret <4 x float> %res } @@ -1399,10 +2057,15 @@ declare <4 x float> @llvm.x86.sse41.round.ps(<4 x float>, i32) nounwind readnone define <2 x double> @test_x86_sse41_round_sd(<2 x double> %a0, <2 x double> %a1) { -; CHECK-LABEL: test_x86_sse41_round_sd: -; CHECK: ## BB#0: -; CHECK-NEXT: vroundsd $7, %xmm1, %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse41_round_sd: +; AVX: ## BB#0: +; AVX-NEXT: vroundsd $7, %xmm1, %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse41_round_sd: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vroundsd $7, %xmm1, %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <2 x double> @llvm.x86.sse41.round.sd(<2 x double> %a0, <2 x double> %a1, i32 7) ; <<2 x double>> [#uses=1] ret <2 x double> %res } @@ -1410,10 +2073,15 @@ declare <2 x double> @llvm.x86.sse41.round.sd(<2 x double>, <2 x double>, i32) n define <4 x float> @test_x86_sse41_round_ss(<4 x float> %a0, <4 x float> %a1) { -; CHECK-LABEL: test_x86_sse41_round_ss: -; CHECK: ## BB#0: -; CHECK-NEXT: vroundss $7, %xmm1, %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse41_round_ss: +; AVX: ## BB#0: +; AVX-NEXT: vroundss $7, %xmm1, %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse41_round_ss: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vroundss $7, %xmm1, %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <4 x float> @llvm.x86.sse41.round.ss(<4 x float> %a0, <4 x float> %a1, i32 7) ; <<4 x float>> [#uses=1] ret <4 x float> %res } @@ -1421,13 +2089,21 @@ declare <4 x float> @llvm.x86.sse41.round.ss(<4 x float>, <4 x float>, i32) noun define i32 @test_x86_sse42_pcmpestri128(<16 x i8> %a0, <16 x i8> %a2) { -; CHECK-LABEL: test_x86_sse42_pcmpestri128: -; CHECK: ## BB#0: -; CHECK-NEXT: movl $7, %eax -; CHECK-NEXT: movl $7, %edx -; CHECK-NEXT: vpcmpestri $7, %xmm1, %xmm0 -; CHECK-NEXT: movl %ecx, %eax -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse42_pcmpestri128: +; AVX: ## BB#0: +; AVX-NEXT: movl $7, %eax +; AVX-NEXT: movl $7, %edx +; AVX-NEXT: vpcmpestri $7, %xmm1, %xmm0 +; AVX-NEXT: movl %ecx, %eax +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse42_pcmpestri128: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: movl $7, %eax +; AVX512VL-NEXT: movl $7, %edx +; AVX512VL-NEXT: vpcmpestri $7, %xmm1, %xmm0 +; AVX512VL-NEXT: movl %ecx, %eax +; AVX512VL-NEXT: retl %res = call i32 @llvm.x86.sse42.pcmpestri128(<16 x i8> %a0, i32 7, <16 x i8> %a2, i32 7, i8 7) ; [#uses=1] ret i32 %res } @@ -1435,16 +2111,27 @@ declare i32 @llvm.x86.sse42.pcmpestri128(<16 x i8>, i32, <16 x i8>, i32, i8) nou define i32 @test_x86_sse42_pcmpestri128_load(<16 x i8>* %a0, <16 x i8>* %a2) { -; CHECK-LABEL: test_x86_sse42_pcmpestri128_load: -; CHECK: ## BB#0: -; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx -; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax -; CHECK-NEXT: vmovdqa (%eax), %xmm0 -; CHECK-NEXT: movl $7, %eax -; CHECK-NEXT: movl $7, %edx -; CHECK-NEXT: vpcmpestri $7, (%ecx), %xmm0 -; CHECK-NEXT: movl %ecx, %eax -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse42_pcmpestri128_load: +; AVX: ## BB#0: +; AVX-NEXT: movl {{[0-9]+}}(%esp), %ecx +; AVX-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX-NEXT: vmovdqa (%eax), %xmm0 +; AVX-NEXT: movl $7, %eax +; AVX-NEXT: movl $7, %edx +; AVX-NEXT: vpcmpestri $7, (%ecx), %xmm0 +; AVX-NEXT: movl %ecx, %eax +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse42_pcmpestri128_load: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %ecx +; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX512VL-NEXT: vmovdqa64 (%eax), %xmm0 +; AVX512VL-NEXT: movl $7, %eax +; AVX512VL-NEXT: movl $7, %edx +; AVX512VL-NEXT: vpcmpestri $7, (%ecx), %xmm0 +; AVX512VL-NEXT: movl %ecx, %eax +; AVX512VL-NEXT: retl %1 = load <16 x i8>, <16 x i8>* %a0 %2 = load <16 x i8>, <16 x i8>* %a2 %res = call i32 @llvm.x86.sse42.pcmpestri128(<16 x i8> %1, i32 7, <16 x i8> %2, i32 7, i8 7) ; [#uses=1] @@ -1453,14 +2140,23 @@ define i32 @test_x86_sse42_pcmpestri128_load(<16 x i8>* %a0, <16 x i8>* %a2) { define i32 @test_x86_sse42_pcmpestria128(<16 x i8> %a0, <16 x i8> %a2) { -; CHECK-LABEL: test_x86_sse42_pcmpestria128: -; CHECK: ## BB#0: -; CHECK-NEXT: movl $7, %eax -; CHECK-NEXT: movl $7, %edx -; CHECK-NEXT: vpcmpestri $7, %xmm1, %xmm0 -; CHECK-NEXT: seta %al -; CHECK-NEXT: movzbl %al, %eax -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse42_pcmpestria128: +; AVX: ## BB#0: +; AVX-NEXT: movl $7, %eax +; AVX-NEXT: movl $7, %edx +; AVX-NEXT: vpcmpestri $7, %xmm1, %xmm0 +; AVX-NEXT: seta %al +; AVX-NEXT: movzbl %al, %eax +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse42_pcmpestria128: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: movl $7, %eax +; AVX512VL-NEXT: movl $7, %edx +; AVX512VL-NEXT: vpcmpestri $7, %xmm1, %xmm0 +; AVX512VL-NEXT: seta %al +; AVX512VL-NEXT: movzbl %al, %eax +; AVX512VL-NEXT: retl %res = call i32 @llvm.x86.sse42.pcmpestria128(<16 x i8> %a0, i32 7, <16 x i8> %a2, i32 7, i8 7) ; [#uses=1] ret i32 %res } @@ -1468,14 +2164,23 @@ declare i32 @llvm.x86.sse42.pcmpestria128(<16 x i8>, i32, <16 x i8>, i32, i8) no define i32 @test_x86_sse42_pcmpestric128(<16 x i8> %a0, <16 x i8> %a2) { -; CHECK-LABEL: test_x86_sse42_pcmpestric128: -; CHECK: ## BB#0: -; CHECK-NEXT: movl $7, %eax -; CHECK-NEXT: movl $7, %edx -; CHECK-NEXT: vpcmpestri $7, %xmm1, %xmm0 -; CHECK-NEXT: sbbl %eax, %eax -; CHECK-NEXT: andl $1, %eax -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse42_pcmpestric128: +; AVX: ## BB#0: +; AVX-NEXT: movl $7, %eax +; AVX-NEXT: movl $7, %edx +; AVX-NEXT: vpcmpestri $7, %xmm1, %xmm0 +; AVX-NEXT: sbbl %eax, %eax +; AVX-NEXT: andl $1, %eax +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse42_pcmpestric128: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: movl $7, %eax +; AVX512VL-NEXT: movl $7, %edx +; AVX512VL-NEXT: vpcmpestri $7, %xmm1, %xmm0 +; AVX512VL-NEXT: sbbl %eax, %eax +; AVX512VL-NEXT: andl $1, %eax +; AVX512VL-NEXT: retl %res = call i32 @llvm.x86.sse42.pcmpestric128(<16 x i8> %a0, i32 7, <16 x i8> %a2, i32 7, i8 7) ; [#uses=1] ret i32 %res } @@ -1483,14 +2188,23 @@ declare i32 @llvm.x86.sse42.pcmpestric128(<16 x i8>, i32, <16 x i8>, i32, i8) no define i32 @test_x86_sse42_pcmpestrio128(<16 x i8> %a0, <16 x i8> %a2) { -; CHECK-LABEL: test_x86_sse42_pcmpestrio128: -; CHECK: ## BB#0: -; CHECK-NEXT: movl $7, %eax -; CHECK-NEXT: movl $7, %edx -; CHECK-NEXT: vpcmpestri $7, %xmm1, %xmm0 -; CHECK-NEXT: seto %al -; CHECK-NEXT: movzbl %al, %eax -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse42_pcmpestrio128: +; AVX: ## BB#0: +; AVX-NEXT: movl $7, %eax +; AVX-NEXT: movl $7, %edx +; AVX-NEXT: vpcmpestri $7, %xmm1, %xmm0 +; AVX-NEXT: seto %al +; AVX-NEXT: movzbl %al, %eax +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse42_pcmpestrio128: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: movl $7, %eax +; AVX512VL-NEXT: movl $7, %edx +; AVX512VL-NEXT: vpcmpestri $7, %xmm1, %xmm0 +; AVX512VL-NEXT: seto %al +; AVX512VL-NEXT: movzbl %al, %eax +; AVX512VL-NEXT: retl %res = call i32 @llvm.x86.sse42.pcmpestrio128(<16 x i8> %a0, i32 7, <16 x i8> %a2, i32 7, i8 7) ; [#uses=1] ret i32 %res } @@ -1498,14 +2212,23 @@ declare i32 @llvm.x86.sse42.pcmpestrio128(<16 x i8>, i32, <16 x i8>, i32, i8) no define i32 @test_x86_sse42_pcmpestris128(<16 x i8> %a0, <16 x i8> %a2) { -; CHECK-LABEL: test_x86_sse42_pcmpestris128: -; CHECK: ## BB#0: -; CHECK-NEXT: movl $7, %eax -; CHECK-NEXT: movl $7, %edx -; CHECK-NEXT: vpcmpestri $7, %xmm1, %xmm0 -; CHECK-NEXT: sets %al -; CHECK-NEXT: movzbl %al, %eax -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse42_pcmpestris128: +; AVX: ## BB#0: +; AVX-NEXT: movl $7, %eax +; AVX-NEXT: movl $7, %edx +; AVX-NEXT: vpcmpestri $7, %xmm1, %xmm0 +; AVX-NEXT: sets %al +; AVX-NEXT: movzbl %al, %eax +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse42_pcmpestris128: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: movl $7, %eax +; AVX512VL-NEXT: movl $7, %edx +; AVX512VL-NEXT: vpcmpestri $7, %xmm1, %xmm0 +; AVX512VL-NEXT: sets %al +; AVX512VL-NEXT: movzbl %al, %eax +; AVX512VL-NEXT: retl %res = call i32 @llvm.x86.sse42.pcmpestris128(<16 x i8> %a0, i32 7, <16 x i8> %a2, i32 7, i8 7) ; [#uses=1] ret i32 %res } @@ -1513,14 +2236,23 @@ declare i32 @llvm.x86.sse42.pcmpestris128(<16 x i8>, i32, <16 x i8>, i32, i8) no define i32 @test_x86_sse42_pcmpestriz128(<16 x i8> %a0, <16 x i8> %a2) { -; CHECK-LABEL: test_x86_sse42_pcmpestriz128: -; CHECK: ## BB#0: -; CHECK-NEXT: movl $7, %eax -; CHECK-NEXT: movl $7, %edx -; CHECK-NEXT: vpcmpestri $7, %xmm1, %xmm0 -; CHECK-NEXT: sete %al -; CHECK-NEXT: movzbl %al, %eax -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse42_pcmpestriz128: +; AVX: ## BB#0: +; AVX-NEXT: movl $7, %eax +; AVX-NEXT: movl $7, %edx +; AVX-NEXT: vpcmpestri $7, %xmm1, %xmm0 +; AVX-NEXT: sete %al +; AVX-NEXT: movzbl %al, %eax +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse42_pcmpestriz128: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: movl $7, %eax +; AVX512VL-NEXT: movl $7, %edx +; AVX512VL-NEXT: vpcmpestri $7, %xmm1, %xmm0 +; AVX512VL-NEXT: sete %al +; AVX512VL-NEXT: movzbl %al, %eax +; AVX512VL-NEXT: retl %res = call i32 @llvm.x86.sse42.pcmpestriz128(<16 x i8> %a0, i32 7, <16 x i8> %a2, i32 7, i8 7) ; [#uses=1] ret i32 %res } @@ -1528,12 +2260,19 @@ declare i32 @llvm.x86.sse42.pcmpestriz128(<16 x i8>, i32, <16 x i8>, i32, i8) no define <16 x i8> @test_x86_sse42_pcmpestrm128(<16 x i8> %a0, <16 x i8> %a2) { -; CHECK-LABEL: test_x86_sse42_pcmpestrm128: -; CHECK: ## BB#0: -; CHECK-NEXT: movl $7, %eax -; CHECK-NEXT: movl $7, %edx -; CHECK-NEXT: vpcmpestrm $7, %xmm1, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse42_pcmpestrm128: +; AVX: ## BB#0: +; AVX-NEXT: movl $7, %eax +; AVX-NEXT: movl $7, %edx +; AVX-NEXT: vpcmpestrm $7, %xmm1, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse42_pcmpestrm128: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: movl $7, %eax +; AVX512VL-NEXT: movl $7, %edx +; AVX512VL-NEXT: vpcmpestrm $7, %xmm1, %xmm0 +; AVX512VL-NEXT: retl %res = call <16 x i8> @llvm.x86.sse42.pcmpestrm128(<16 x i8> %a0, i32 7, <16 x i8> %a2, i32 7, i8 7) ; <<16 x i8>> [#uses=1] ret <16 x i8> %res } @@ -1541,13 +2280,21 @@ declare <16 x i8> @llvm.x86.sse42.pcmpestrm128(<16 x i8>, i32, <16 x i8>, i32, i define <16 x i8> @test_x86_sse42_pcmpestrm128_load(<16 x i8> %a0, <16 x i8>* %a2) { -; CHECK-LABEL: test_x86_sse42_pcmpestrm128_load: -; CHECK: ## BB#0: -; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx -; CHECK-NEXT: movl $7, %eax -; CHECK-NEXT: movl $7, %edx -; CHECK-NEXT: vpcmpestrm $7, (%ecx), %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse42_pcmpestrm128_load: +; AVX: ## BB#0: +; AVX-NEXT: movl {{[0-9]+}}(%esp), %ecx +; AVX-NEXT: movl $7, %eax +; AVX-NEXT: movl $7, %edx +; AVX-NEXT: vpcmpestrm $7, (%ecx), %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse42_pcmpestrm128_load: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %ecx +; AVX512VL-NEXT: movl $7, %eax +; AVX512VL-NEXT: movl $7, %edx +; AVX512VL-NEXT: vpcmpestrm $7, (%ecx), %xmm0 +; AVX512VL-NEXT: retl %1 = load <16 x i8>, <16 x i8>* %a2 %res = call <16 x i8> @llvm.x86.sse42.pcmpestrm128(<16 x i8> %a0, i32 7, <16 x i8> %1, i32 7, i8 7) ; <<16 x i8>> [#uses=1] ret <16 x i8> %res @@ -1555,11 +2302,17 @@ define <16 x i8> @test_x86_sse42_pcmpestrm128_load(<16 x i8> %a0, <16 x i8>* %a2 define i32 @test_x86_sse42_pcmpistri128(<16 x i8> %a0, <16 x i8> %a1) { -; CHECK-LABEL: test_x86_sse42_pcmpistri128: -; CHECK: ## BB#0: -; CHECK-NEXT: vpcmpistri $7, %xmm1, %xmm0 -; CHECK-NEXT: movl %ecx, %eax -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse42_pcmpistri128: +; AVX: ## BB#0: +; AVX-NEXT: vpcmpistri $7, %xmm1, %xmm0 +; AVX-NEXT: movl %ecx, %eax +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse42_pcmpistri128: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpcmpistri $7, %xmm1, %xmm0 +; AVX512VL-NEXT: movl %ecx, %eax +; AVX512VL-NEXT: retl %res = call i32 @llvm.x86.sse42.pcmpistri128(<16 x i8> %a0, <16 x i8> %a1, i8 7) ; [#uses=1] ret i32 %res } @@ -1567,14 +2320,23 @@ declare i32 @llvm.x86.sse42.pcmpistri128(<16 x i8>, <16 x i8>, i8) nounwind read define i32 @test_x86_sse42_pcmpistri128_load(<16 x i8>* %a0, <16 x i8>* %a1) { -; CHECK-LABEL: test_x86_sse42_pcmpistri128_load: -; CHECK: ## BB#0: -; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax -; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx -; CHECK-NEXT: vmovdqa (%ecx), %xmm0 -; CHECK-NEXT: vpcmpistri $7, (%eax), %xmm0 -; CHECK-NEXT: movl %ecx, %eax -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse42_pcmpistri128_load: +; AVX: ## BB#0: +; AVX-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX-NEXT: movl {{[0-9]+}}(%esp), %ecx +; AVX-NEXT: vmovdqa (%ecx), %xmm0 +; AVX-NEXT: vpcmpistri $7, (%eax), %xmm0 +; AVX-NEXT: movl %ecx, %eax +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse42_pcmpistri128_load: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %ecx +; AVX512VL-NEXT: vmovdqa64 (%ecx), %xmm0 +; AVX512VL-NEXT: vpcmpistri $7, (%eax), %xmm0 +; AVX512VL-NEXT: movl %ecx, %eax +; AVX512VL-NEXT: retl %1 = load <16 x i8>, <16 x i8>* %a0 %2 = load <16 x i8>, <16 x i8>* %a1 %res = call i32 @llvm.x86.sse42.pcmpistri128(<16 x i8> %1, <16 x i8> %2, i8 7) ; [#uses=1] @@ -1583,12 +2345,19 @@ define i32 @test_x86_sse42_pcmpistri128_load(<16 x i8>* %a0, <16 x i8>* %a1) { define i32 @test_x86_sse42_pcmpistria128(<16 x i8> %a0, <16 x i8> %a1) { -; CHECK-LABEL: test_x86_sse42_pcmpistria128: -; CHECK: ## BB#0: -; CHECK-NEXT: vpcmpistri $7, %xmm1, %xmm0 -; CHECK-NEXT: seta %al -; CHECK-NEXT: movzbl %al, %eax -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse42_pcmpistria128: +; AVX: ## BB#0: +; AVX-NEXT: vpcmpistri $7, %xmm1, %xmm0 +; AVX-NEXT: seta %al +; AVX-NEXT: movzbl %al, %eax +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse42_pcmpistria128: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpcmpistri $7, %xmm1, %xmm0 +; AVX512VL-NEXT: seta %al +; AVX512VL-NEXT: movzbl %al, %eax +; AVX512VL-NEXT: retl %res = call i32 @llvm.x86.sse42.pcmpistria128(<16 x i8> %a0, <16 x i8> %a1, i8 7) ; [#uses=1] ret i32 %res } @@ -1596,12 +2365,19 @@ declare i32 @llvm.x86.sse42.pcmpistria128(<16 x i8>, <16 x i8>, i8) nounwind rea define i32 @test_x86_sse42_pcmpistric128(<16 x i8> %a0, <16 x i8> %a1) { -; CHECK-LABEL: test_x86_sse42_pcmpistric128: -; CHECK: ## BB#0: -; CHECK-NEXT: vpcmpistri $7, %xmm1, %xmm0 -; CHECK-NEXT: sbbl %eax, %eax -; CHECK-NEXT: andl $1, %eax -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse42_pcmpistric128: +; AVX: ## BB#0: +; AVX-NEXT: vpcmpistri $7, %xmm1, %xmm0 +; AVX-NEXT: sbbl %eax, %eax +; AVX-NEXT: andl $1, %eax +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse42_pcmpistric128: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpcmpistri $7, %xmm1, %xmm0 +; AVX512VL-NEXT: sbbl %eax, %eax +; AVX512VL-NEXT: andl $1, %eax +; AVX512VL-NEXT: retl %res = call i32 @llvm.x86.sse42.pcmpistric128(<16 x i8> %a0, <16 x i8> %a1, i8 7) ; [#uses=1] ret i32 %res } @@ -1609,12 +2385,19 @@ declare i32 @llvm.x86.sse42.pcmpistric128(<16 x i8>, <16 x i8>, i8) nounwind rea define i32 @test_x86_sse42_pcmpistrio128(<16 x i8> %a0, <16 x i8> %a1) { -; CHECK-LABEL: test_x86_sse42_pcmpistrio128: -; CHECK: ## BB#0: -; CHECK-NEXT: vpcmpistri $7, %xmm1, %xmm0 -; CHECK-NEXT: seto %al -; CHECK-NEXT: movzbl %al, %eax -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse42_pcmpistrio128: +; AVX: ## BB#0: +; AVX-NEXT: vpcmpistri $7, %xmm1, %xmm0 +; AVX-NEXT: seto %al +; AVX-NEXT: movzbl %al, %eax +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse42_pcmpistrio128: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpcmpistri $7, %xmm1, %xmm0 +; AVX512VL-NEXT: seto %al +; AVX512VL-NEXT: movzbl %al, %eax +; AVX512VL-NEXT: retl %res = call i32 @llvm.x86.sse42.pcmpistrio128(<16 x i8> %a0, <16 x i8> %a1, i8 7) ; [#uses=1] ret i32 %res } @@ -1622,12 +2405,19 @@ declare i32 @llvm.x86.sse42.pcmpistrio128(<16 x i8>, <16 x i8>, i8) nounwind rea define i32 @test_x86_sse42_pcmpistris128(<16 x i8> %a0, <16 x i8> %a1) { -; CHECK-LABEL: test_x86_sse42_pcmpistris128: -; CHECK: ## BB#0: -; CHECK-NEXT: vpcmpistri $7, %xmm1, %xmm0 -; CHECK-NEXT: sets %al -; CHECK-NEXT: movzbl %al, %eax -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse42_pcmpistris128: +; AVX: ## BB#0: +; AVX-NEXT: vpcmpistri $7, %xmm1, %xmm0 +; AVX-NEXT: sets %al +; AVX-NEXT: movzbl %al, %eax +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse42_pcmpistris128: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpcmpistri $7, %xmm1, %xmm0 +; AVX512VL-NEXT: sets %al +; AVX512VL-NEXT: movzbl %al, %eax +; AVX512VL-NEXT: retl %res = call i32 @llvm.x86.sse42.pcmpistris128(<16 x i8> %a0, <16 x i8> %a1, i8 7) ; [#uses=1] ret i32 %res } @@ -1635,12 +2425,19 @@ declare i32 @llvm.x86.sse42.pcmpistris128(<16 x i8>, <16 x i8>, i8) nounwind rea define i32 @test_x86_sse42_pcmpistriz128(<16 x i8> %a0, <16 x i8> %a1) { -; CHECK-LABEL: test_x86_sse42_pcmpistriz128: -; CHECK: ## BB#0: -; CHECK-NEXT: vpcmpistri $7, %xmm1, %xmm0 -; CHECK-NEXT: sete %al -; CHECK-NEXT: movzbl %al, %eax -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse42_pcmpistriz128: +; AVX: ## BB#0: +; AVX-NEXT: vpcmpistri $7, %xmm1, %xmm0 +; AVX-NEXT: sete %al +; AVX-NEXT: movzbl %al, %eax +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse42_pcmpistriz128: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpcmpistri $7, %xmm1, %xmm0 +; AVX512VL-NEXT: sete %al +; AVX512VL-NEXT: movzbl %al, %eax +; AVX512VL-NEXT: retl %res = call i32 @llvm.x86.sse42.pcmpistriz128(<16 x i8> %a0, <16 x i8> %a1, i8 7) ; [#uses=1] ret i32 %res } @@ -1648,10 +2445,15 @@ declare i32 @llvm.x86.sse42.pcmpistriz128(<16 x i8>, <16 x i8>, i8) nounwind rea define <16 x i8> @test_x86_sse42_pcmpistrm128(<16 x i8> %a0, <16 x i8> %a1) { -; CHECK-LABEL: test_x86_sse42_pcmpistrm128: -; CHECK: ## BB#0: -; CHECK-NEXT: vpcmpistrm $7, %xmm1, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse42_pcmpistrm128: +; AVX: ## BB#0: +; AVX-NEXT: vpcmpistrm $7, %xmm1, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse42_pcmpistrm128: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpcmpistrm $7, %xmm1, %xmm0 +; AVX512VL-NEXT: retl %res = call <16 x i8> @llvm.x86.sse42.pcmpistrm128(<16 x i8> %a0, <16 x i8> %a1, i8 7) ; <<16 x i8>> [#uses=1] ret <16 x i8> %res } @@ -1659,11 +2461,17 @@ declare <16 x i8> @llvm.x86.sse42.pcmpistrm128(<16 x i8>, <16 x i8>, i8) nounwin define <16 x i8> @test_x86_sse42_pcmpistrm128_load(<16 x i8> %a0, <16 x i8>* %a1) { -; CHECK-LABEL: test_x86_sse42_pcmpistrm128_load: -; CHECK: ## BB#0: -; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax -; CHECK-NEXT: vpcmpistrm $7, (%eax), %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse42_pcmpistrm128_load: +; AVX: ## BB#0: +; AVX-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX-NEXT: vpcmpistrm $7, (%eax), %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse42_pcmpistrm128_load: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX512VL-NEXT: vpcmpistrm $7, (%eax), %xmm0 +; AVX512VL-NEXT: retl %1 = load <16 x i8>, <16 x i8>* %a1 %res = call <16 x i8> @llvm.x86.sse42.pcmpistrm128(<16 x i8> %a0, <16 x i8> %1, i8 7) ; <<16 x i8>> [#uses=1] ret <16 x i8> %res @@ -1671,10 +2479,15 @@ define <16 x i8> @test_x86_sse42_pcmpistrm128_load(<16 x i8> %a0, <16 x i8>* %a1 define <4 x float> @test_x86_sse_add_ss(<4 x float> %a0, <4 x float> %a1) { -; CHECK-LABEL: test_x86_sse_add_ss: -; CHECK: ## BB#0: -; CHECK-NEXT: vaddss %xmm1, %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse_add_ss: +; AVX: ## BB#0: +; AVX-NEXT: vaddss %xmm1, %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse_add_ss: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vaddss %xmm1, %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <4 x float> @llvm.x86.sse.add.ss(<4 x float> %a0, <4 x float> %a1) ; <<4 x float>> [#uses=1] ret <4 x float> %res } @@ -1682,10 +2495,15 @@ declare <4 x float> @llvm.x86.sse.add.ss(<4 x float>, <4 x float>) nounwind read define <4 x float> @test_x86_sse_cmp_ps(<4 x float> %a0, <4 x float> %a1) { -; CHECK-LABEL: test_x86_sse_cmp_ps: -; CHECK: ## BB#0: -; CHECK-NEXT: vcmpordps %xmm1, %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse_cmp_ps: +; AVX: ## BB#0: +; AVX-NEXT: vcmpordps %xmm1, %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse_cmp_ps: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vcmpordps %xmm1, %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <4 x float> @llvm.x86.sse.cmp.ps(<4 x float> %a0, <4 x float> %a1, i8 7) ; <<4 x float>> [#uses=1] ret <4 x float> %res } @@ -1693,10 +2511,15 @@ declare <4 x float> @llvm.x86.sse.cmp.ps(<4 x float>, <4 x float>, i8) nounwind define <4 x float> @test_x86_sse_cmp_ss(<4 x float> %a0, <4 x float> %a1) { -; CHECK-LABEL: test_x86_sse_cmp_ss: -; CHECK: ## BB#0: -; CHECK-NEXT: vcmpordss %xmm1, %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse_cmp_ss: +; AVX: ## BB#0: +; AVX-NEXT: vcmpordss %xmm1, %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse_cmp_ss: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vcmpordss %xmm1, %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <4 x float> @llvm.x86.sse.cmp.ss(<4 x float> %a0, <4 x float> %a1, i8 7) ; <<4 x float>> [#uses=1] ret <4 x float> %res } @@ -1704,14 +2527,23 @@ declare <4 x float> @llvm.x86.sse.cmp.ss(<4 x float>, <4 x float>, i8) nounwind define i32 @test_x86_sse_comieq_ss(<4 x float> %a0, <4 x float> %a1) { -; CHECK-LABEL: test_x86_sse_comieq_ss: -; CHECK: ## BB#0: -; CHECK-NEXT: vcomiss %xmm1, %xmm0 -; CHECK-NEXT: setnp %al -; CHECK-NEXT: sete %cl -; CHECK-NEXT: andb %al, %cl -; CHECK-NEXT: movzbl %cl, %eax -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse_comieq_ss: +; AVX: ## BB#0: +; AVX-NEXT: vcomiss %xmm1, %xmm0 +; AVX-NEXT: setnp %al +; AVX-NEXT: sete %cl +; AVX-NEXT: andb %al, %cl +; AVX-NEXT: movzbl %cl, %eax +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse_comieq_ss: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vcomiss %xmm1, %xmm0 +; AVX512VL-NEXT: setnp %al +; AVX512VL-NEXT: sete %cl +; AVX512VL-NEXT: andb %al, %cl +; AVX512VL-NEXT: movzbl %cl, %eax +; AVX512VL-NEXT: retl %res = call i32 @llvm.x86.sse.comieq.ss(<4 x float> %a0, <4 x float> %a1) ; [#uses=1] ret i32 %res } @@ -1719,12 +2551,19 @@ declare i32 @llvm.x86.sse.comieq.ss(<4 x float>, <4 x float>) nounwind readnone define i32 @test_x86_sse_comige_ss(<4 x float> %a0, <4 x float> %a1) { -; CHECK-LABEL: test_x86_sse_comige_ss: -; CHECK: ## BB#0: -; CHECK-NEXT: vcomiss %xmm1, %xmm0 -; CHECK-NEXT: setae %al -; CHECK-NEXT: movzbl %al, %eax -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse_comige_ss: +; AVX: ## BB#0: +; AVX-NEXT: vcomiss %xmm1, %xmm0 +; AVX-NEXT: setae %al +; AVX-NEXT: movzbl %al, %eax +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse_comige_ss: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vcomiss %xmm1, %xmm0 +; AVX512VL-NEXT: setae %al +; AVX512VL-NEXT: movzbl %al, %eax +; AVX512VL-NEXT: retl %res = call i32 @llvm.x86.sse.comige.ss(<4 x float> %a0, <4 x float> %a1) ; [#uses=1] ret i32 %res } @@ -1732,12 +2571,19 @@ declare i32 @llvm.x86.sse.comige.ss(<4 x float>, <4 x float>) nounwind readnone define i32 @test_x86_sse_comigt_ss(<4 x float> %a0, <4 x float> %a1) { -; CHECK-LABEL: test_x86_sse_comigt_ss: -; CHECK: ## BB#0: -; CHECK-NEXT: vcomiss %xmm1, %xmm0 -; CHECK-NEXT: seta %al -; CHECK-NEXT: movzbl %al, %eax -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse_comigt_ss: +; AVX: ## BB#0: +; AVX-NEXT: vcomiss %xmm1, %xmm0 +; AVX-NEXT: seta %al +; AVX-NEXT: movzbl %al, %eax +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse_comigt_ss: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vcomiss %xmm1, %xmm0 +; AVX512VL-NEXT: seta %al +; AVX512VL-NEXT: movzbl %al, %eax +; AVX512VL-NEXT: retl %res = call i32 @llvm.x86.sse.comigt.ss(<4 x float> %a0, <4 x float> %a1) ; [#uses=1] ret i32 %res } @@ -1745,12 +2591,19 @@ declare i32 @llvm.x86.sse.comigt.ss(<4 x float>, <4 x float>) nounwind readnone define i32 @test_x86_sse_comile_ss(<4 x float> %a0, <4 x float> %a1) { -; CHECK-LABEL: test_x86_sse_comile_ss: -; CHECK: ## BB#0: -; CHECK-NEXT: vcomiss %xmm0, %xmm1 -; CHECK-NEXT: setae %al -; CHECK-NEXT: movzbl %al, %eax -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse_comile_ss: +; AVX: ## BB#0: +; AVX-NEXT: vcomiss %xmm0, %xmm1 +; AVX-NEXT: setae %al +; AVX-NEXT: movzbl %al, %eax +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse_comile_ss: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vcomiss %xmm0, %xmm1 +; AVX512VL-NEXT: setae %al +; AVX512VL-NEXT: movzbl %al, %eax +; AVX512VL-NEXT: retl %res = call i32 @llvm.x86.sse.comile.ss(<4 x float> %a0, <4 x float> %a1) ; [#uses=1] ret i32 %res } @@ -1758,12 +2611,19 @@ declare i32 @llvm.x86.sse.comile.ss(<4 x float>, <4 x float>) nounwind readnone define i32 @test_x86_sse_comilt_ss(<4 x float> %a0, <4 x float> %a1) { -; CHECK-LABEL: test_x86_sse_comilt_ss: -; CHECK: ## BB#0: -; CHECK-NEXT: vcomiss %xmm0, %xmm1 -; CHECK-NEXT: seta %al -; CHECK-NEXT: movzbl %al, %eax -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse_comilt_ss: +; AVX: ## BB#0: +; AVX-NEXT: vcomiss %xmm0, %xmm1 +; AVX-NEXT: seta %al +; AVX-NEXT: movzbl %al, %eax +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse_comilt_ss: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vcomiss %xmm0, %xmm1 +; AVX512VL-NEXT: seta %al +; AVX512VL-NEXT: movzbl %al, %eax +; AVX512VL-NEXT: retl %res = call i32 @llvm.x86.sse.comilt.ss(<4 x float> %a0, <4 x float> %a1) ; [#uses=1] ret i32 %res } @@ -1771,14 +2631,23 @@ declare i32 @llvm.x86.sse.comilt.ss(<4 x float>, <4 x float>) nounwind readnone define i32 @test_x86_sse_comineq_ss(<4 x float> %a0, <4 x float> %a1) { -; CHECK-LABEL: test_x86_sse_comineq_ss: -; CHECK: ## BB#0: -; CHECK-NEXT: vcomiss %xmm1, %xmm0 -; CHECK-NEXT: setp %al -; CHECK-NEXT: setne %cl -; CHECK-NEXT: orb %al, %cl -; CHECK-NEXT: movzbl %cl, %eax -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse_comineq_ss: +; AVX: ## BB#0: +; AVX-NEXT: vcomiss %xmm1, %xmm0 +; AVX-NEXT: setp %al +; AVX-NEXT: setne %cl +; AVX-NEXT: orb %al, %cl +; AVX-NEXT: movzbl %cl, %eax +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse_comineq_ss: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vcomiss %xmm1, %xmm0 +; AVX512VL-NEXT: setp %al +; AVX512VL-NEXT: setne %cl +; AVX512VL-NEXT: orb %al, %cl +; AVX512VL-NEXT: movzbl %cl, %eax +; AVX512VL-NEXT: retl %res = call i32 @llvm.x86.sse.comineq.ss(<4 x float> %a0, <4 x float> %a1) ; [#uses=1] ret i32 %res } @@ -1786,11 +2655,17 @@ declare i32 @llvm.x86.sse.comineq.ss(<4 x float>, <4 x float>) nounwind readnone define <4 x float> @test_x86_sse_cvtsi2ss(<4 x float> %a0) { -; CHECK-LABEL: test_x86_sse_cvtsi2ss: -; CHECK: ## BB#0: -; CHECK-NEXT: movl $7, %eax -; CHECK-NEXT: vcvtsi2ssl %eax, %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse_cvtsi2ss: +; AVX: ## BB#0: +; AVX-NEXT: movl $7, %eax +; AVX-NEXT: vcvtsi2ssl %eax, %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse_cvtsi2ss: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: movl $7, %eax +; AVX512VL-NEXT: vcvtsi2ssl %eax, %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <4 x float> @llvm.x86.sse.cvtsi2ss(<4 x float> %a0, i32 7) ; <<4 x float>> [#uses=1] ret <4 x float> %res } @@ -1798,10 +2673,15 @@ declare <4 x float> @llvm.x86.sse.cvtsi2ss(<4 x float>, i32) nounwind readnone define i32 @test_x86_sse_cvtss2si(<4 x float> %a0) { -; CHECK-LABEL: test_x86_sse_cvtss2si: -; CHECK: ## BB#0: -; CHECK-NEXT: vcvtss2si %xmm0, %eax -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse_cvtss2si: +; AVX: ## BB#0: +; AVX-NEXT: vcvtss2si %xmm0, %eax +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse_cvtss2si: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vcvtss2si %xmm0, %eax +; AVX512VL-NEXT: retl %res = call i32 @llvm.x86.sse.cvtss2si(<4 x float> %a0) ; [#uses=1] ret i32 %res } @@ -1809,10 +2689,15 @@ declare i32 @llvm.x86.sse.cvtss2si(<4 x float>) nounwind readnone define i32 @test_x86_sse_cvttss2si(<4 x float> %a0) { -; CHECK-LABEL: test_x86_sse_cvttss2si: -; CHECK: ## BB#0: -; CHECK-NEXT: vcvttss2si %xmm0, %eax -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse_cvttss2si: +; AVX: ## BB#0: +; AVX-NEXT: vcvttss2si %xmm0, %eax +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse_cvttss2si: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vcvttss2si %xmm0, %eax +; AVX512VL-NEXT: retl %res = call i32 @llvm.x86.sse.cvttss2si(<4 x float> %a0) ; [#uses=1] ret i32 %res } @@ -1820,10 +2705,15 @@ declare i32 @llvm.x86.sse.cvttss2si(<4 x float>) nounwind readnone define <4 x float> @test_x86_sse_div_ss(<4 x float> %a0, <4 x float> %a1) { -; CHECK-LABEL: test_x86_sse_div_ss: -; CHECK: ## BB#0: -; CHECK-NEXT: vdivss %xmm1, %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse_div_ss: +; AVX: ## BB#0: +; AVX-NEXT: vdivss %xmm1, %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse_div_ss: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vdivss %xmm1, %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <4 x float> @llvm.x86.sse.div.ss(<4 x float> %a0, <4 x float> %a1) ; <<4 x float>> [#uses=1] ret <4 x float> %res } @@ -1831,11 +2721,17 @@ declare <4 x float> @llvm.x86.sse.div.ss(<4 x float>, <4 x float>) nounwind read define void @test_x86_sse_ldmxcsr(i8* %a0) { -; CHECK-LABEL: test_x86_sse_ldmxcsr: -; CHECK: ## BB#0: -; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax -; CHECK-NEXT: vldmxcsr (%eax) -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse_ldmxcsr: +; AVX: ## BB#0: +; AVX-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX-NEXT: vldmxcsr (%eax) +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse_ldmxcsr: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX512VL-NEXT: vldmxcsr (%eax) +; AVX512VL-NEXT: retl call void @llvm.x86.sse.ldmxcsr(i8* %a0) ret void } @@ -1844,10 +2740,15 @@ declare void @llvm.x86.sse.ldmxcsr(i8*) nounwind define <4 x float> @test_x86_sse_max_ps(<4 x float> %a0, <4 x float> %a1) { -; CHECK-LABEL: test_x86_sse_max_ps: -; CHECK: ## BB#0: -; CHECK-NEXT: vmaxps %xmm1, %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse_max_ps: +; AVX: ## BB#0: +; AVX-NEXT: vmaxps %xmm1, %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse_max_ps: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vmaxps %xmm1, %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <4 x float> @llvm.x86.sse.max.ps(<4 x float> %a0, <4 x float> %a1) ; <<4 x float>> [#uses=1] ret <4 x float> %res } @@ -1855,10 +2756,15 @@ declare <4 x float> @llvm.x86.sse.max.ps(<4 x float>, <4 x float>) nounwind read define <4 x float> @test_x86_sse_max_ss(<4 x float> %a0, <4 x float> %a1) { -; CHECK-LABEL: test_x86_sse_max_ss: -; CHECK: ## BB#0: -; CHECK-NEXT: vmaxss %xmm1, %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse_max_ss: +; AVX: ## BB#0: +; AVX-NEXT: vmaxss %xmm1, %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse_max_ss: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vmaxss %xmm1, %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <4 x float> @llvm.x86.sse.max.ss(<4 x float> %a0, <4 x float> %a1) ; <<4 x float>> [#uses=1] ret <4 x float> %res } @@ -1866,10 +2772,15 @@ declare <4 x float> @llvm.x86.sse.max.ss(<4 x float>, <4 x float>) nounwind read define <4 x float> @test_x86_sse_min_ps(<4 x float> %a0, <4 x float> %a1) { -; CHECK-LABEL: test_x86_sse_min_ps: -; CHECK: ## BB#0: -; CHECK-NEXT: vminps %xmm1, %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse_min_ps: +; AVX: ## BB#0: +; AVX-NEXT: vminps %xmm1, %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse_min_ps: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vminps %xmm1, %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <4 x float> @llvm.x86.sse.min.ps(<4 x float> %a0, <4 x float> %a1) ; <<4 x float>> [#uses=1] ret <4 x float> %res } @@ -1877,10 +2788,15 @@ declare <4 x float> @llvm.x86.sse.min.ps(<4 x float>, <4 x float>) nounwind read define <4 x float> @test_x86_sse_min_ss(<4 x float> %a0, <4 x float> %a1) { -; CHECK-LABEL: test_x86_sse_min_ss: -; CHECK: ## BB#0: -; CHECK-NEXT: vminss %xmm1, %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse_min_ss: +; AVX: ## BB#0: +; AVX-NEXT: vminss %xmm1, %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse_min_ss: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vminss %xmm1, %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <4 x float> @llvm.x86.sse.min.ss(<4 x float> %a0, <4 x float> %a1) ; <<4 x float>> [#uses=1] ret <4 x float> %res } @@ -1888,10 +2804,15 @@ declare <4 x float> @llvm.x86.sse.min.ss(<4 x float>, <4 x float>) nounwind read define i32 @test_x86_sse_movmsk_ps(<4 x float> %a0) { -; CHECK-LABEL: test_x86_sse_movmsk_ps: -; CHECK: ## BB#0: -; CHECK-NEXT: vmovmskps %xmm0, %eax -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse_movmsk_ps: +; AVX: ## BB#0: +; AVX-NEXT: vmovmskps %xmm0, %eax +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse_movmsk_ps: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vmovmskps %xmm0, %eax +; AVX512VL-NEXT: retl %res = call i32 @llvm.x86.sse.movmsk.ps(<4 x float> %a0) ; [#uses=1] ret i32 %res } @@ -1900,10 +2821,15 @@ declare i32 @llvm.x86.sse.movmsk.ps(<4 x float>) nounwind readnone define <4 x float> @test_x86_sse_mul_ss(<4 x float> %a0, <4 x float> %a1) { -; CHECK-LABEL: test_x86_sse_mul_ss: -; CHECK: ## BB#0: -; CHECK-NEXT: vmulss %xmm1, %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse_mul_ss: +; AVX: ## BB#0: +; AVX-NEXT: vmulss %xmm1, %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse_mul_ss: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vmulss %xmm1, %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <4 x float> @llvm.x86.sse.mul.ss(<4 x float> %a0, <4 x float> %a1) ; <<4 x float>> [#uses=1] ret <4 x float> %res } @@ -1911,10 +2837,15 @@ declare <4 x float> @llvm.x86.sse.mul.ss(<4 x float>, <4 x float>) nounwind read define <4 x float> @test_x86_sse_rcp_ps(<4 x float> %a0) { -; CHECK-LABEL: test_x86_sse_rcp_ps: -; CHECK: ## BB#0: -; CHECK-NEXT: vrcpps %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse_rcp_ps: +; AVX: ## BB#0: +; AVX-NEXT: vrcpps %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse_rcp_ps: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vrcp14ps %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <4 x float> @llvm.x86.sse.rcp.ps(<4 x float> %a0) ; <<4 x float>> [#uses=1] ret <4 x float> %res } @@ -1922,10 +2853,15 @@ declare <4 x float> @llvm.x86.sse.rcp.ps(<4 x float>) nounwind readnone define <4 x float> @test_x86_sse_rcp_ss(<4 x float> %a0) { -; CHECK-LABEL: test_x86_sse_rcp_ss: -; CHECK: ## BB#0: -; CHECK-NEXT: vrcpss %xmm0, %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse_rcp_ss: +; AVX: ## BB#0: +; AVX-NEXT: vrcpss %xmm0, %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse_rcp_ss: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vrcpss %xmm0, %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <4 x float> @llvm.x86.sse.rcp.ss(<4 x float> %a0) ; <<4 x float>> [#uses=1] ret <4 x float> %res } @@ -1933,10 +2869,15 @@ declare <4 x float> @llvm.x86.sse.rcp.ss(<4 x float>) nounwind readnone define <4 x float> @test_x86_sse_rsqrt_ps(<4 x float> %a0) { -; CHECK-LABEL: test_x86_sse_rsqrt_ps: -; CHECK: ## BB#0: -; CHECK-NEXT: vrsqrtps %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse_rsqrt_ps: +; AVX: ## BB#0: +; AVX-NEXT: vrsqrtps %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse_rsqrt_ps: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vrsqrt14ps %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <4 x float> @llvm.x86.sse.rsqrt.ps(<4 x float> %a0) ; <<4 x float>> [#uses=1] ret <4 x float> %res } @@ -1944,10 +2885,15 @@ declare <4 x float> @llvm.x86.sse.rsqrt.ps(<4 x float>) nounwind readnone define <4 x float> @test_x86_sse_rsqrt_ss(<4 x float> %a0) { -; CHECK-LABEL: test_x86_sse_rsqrt_ss: -; CHECK: ## BB#0: -; CHECK-NEXT: vrsqrtss %xmm0, %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse_rsqrt_ss: +; AVX: ## BB#0: +; AVX-NEXT: vrsqrtss %xmm0, %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse_rsqrt_ss: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vrsqrtss %xmm0, %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <4 x float> @llvm.x86.sse.rsqrt.ss(<4 x float> %a0) ; <<4 x float>> [#uses=1] ret <4 x float> %res } @@ -1955,10 +2901,15 @@ declare <4 x float> @llvm.x86.sse.rsqrt.ss(<4 x float>) nounwind readnone define <4 x float> @test_x86_sse_sqrt_ps(<4 x float> %a0) { -; CHECK-LABEL: test_x86_sse_sqrt_ps: -; CHECK: ## BB#0: -; CHECK-NEXT: vsqrtps %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse_sqrt_ps: +; AVX: ## BB#0: +; AVX-NEXT: vsqrtps %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse_sqrt_ps: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vsqrtps %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <4 x float> @llvm.x86.sse.sqrt.ps(<4 x float> %a0) ; <<4 x float>> [#uses=1] ret <4 x float> %res } @@ -1966,10 +2917,15 @@ declare <4 x float> @llvm.x86.sse.sqrt.ps(<4 x float>) nounwind readnone define <4 x float> @test_x86_sse_sqrt_ss(<4 x float> %a0) { -; CHECK-LABEL: test_x86_sse_sqrt_ss: -; CHECK: ## BB#0: -; CHECK-NEXT: vsqrtss %xmm0, %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse_sqrt_ss: +; AVX: ## BB#0: +; AVX-NEXT: vsqrtss %xmm0, %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse_sqrt_ss: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vsqrtss %xmm0, %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <4 x float> @llvm.x86.sse.sqrt.ss(<4 x float> %a0) ; <<4 x float>> [#uses=1] ret <4 x float> %res } @@ -1977,11 +2933,17 @@ declare <4 x float> @llvm.x86.sse.sqrt.ss(<4 x float>) nounwind readnone define void @test_x86_sse_stmxcsr(i8* %a0) { -; CHECK-LABEL: test_x86_sse_stmxcsr: -; CHECK: ## BB#0: -; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax -; CHECK-NEXT: vstmxcsr (%eax) -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse_stmxcsr: +; AVX: ## BB#0: +; AVX-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX-NEXT: vstmxcsr (%eax) +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse_stmxcsr: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX512VL-NEXT: vstmxcsr (%eax) +; AVX512VL-NEXT: retl call void @llvm.x86.sse.stmxcsr(i8* %a0) ret void } @@ -1989,11 +2951,17 @@ declare void @llvm.x86.sse.stmxcsr(i8*) nounwind define void @test_x86_sse_storeu_ps(i8* %a0, <4 x float> %a1) { -; CHECK-LABEL: test_x86_sse_storeu_ps: -; CHECK: ## BB#0: -; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax -; CHECK-NEXT: vmovups %xmm0, (%eax) -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse_storeu_ps: +; AVX: ## BB#0: +; AVX-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX-NEXT: vmovups %xmm0, (%eax) +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse_storeu_ps: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX512VL-NEXT: vmovups %xmm0, (%eax) +; AVX512VL-NEXT: retl call void @llvm.x86.sse.storeu.ps(i8* %a0, <4 x float> %a1) ret void } @@ -2001,10 +2969,15 @@ declare void @llvm.x86.sse.storeu.ps(i8*, <4 x float>) nounwind define <4 x float> @test_x86_sse_sub_ss(<4 x float> %a0, <4 x float> %a1) { -; CHECK-LABEL: test_x86_sse_sub_ss: -; CHECK: ## BB#0: -; CHECK-NEXT: vsubss %xmm1, %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse_sub_ss: +; AVX: ## BB#0: +; AVX-NEXT: vsubss %xmm1, %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse_sub_ss: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vsubss %xmm1, %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <4 x float> @llvm.x86.sse.sub.ss(<4 x float> %a0, <4 x float> %a1) ; <<4 x float>> [#uses=1] ret <4 x float> %res } @@ -2012,14 +2985,23 @@ declare <4 x float> @llvm.x86.sse.sub.ss(<4 x float>, <4 x float>) nounwind read define i32 @test_x86_sse_ucomieq_ss(<4 x float> %a0, <4 x float> %a1) { -; CHECK-LABEL: test_x86_sse_ucomieq_ss: -; CHECK: ## BB#0: -; CHECK-NEXT: vucomiss %xmm1, %xmm0 -; CHECK-NEXT: setnp %al -; CHECK-NEXT: sete %cl -; CHECK-NEXT: andb %al, %cl -; CHECK-NEXT: movzbl %cl, %eax -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse_ucomieq_ss: +; AVX: ## BB#0: +; AVX-NEXT: vucomiss %xmm1, %xmm0 +; AVX-NEXT: setnp %al +; AVX-NEXT: sete %cl +; AVX-NEXT: andb %al, %cl +; AVX-NEXT: movzbl %cl, %eax +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse_ucomieq_ss: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vucomiss %xmm1, %xmm0 +; AVX512VL-NEXT: setnp %al +; AVX512VL-NEXT: sete %cl +; AVX512VL-NEXT: andb %al, %cl +; AVX512VL-NEXT: movzbl %cl, %eax +; AVX512VL-NEXT: retl %res = call i32 @llvm.x86.sse.ucomieq.ss(<4 x float> %a0, <4 x float> %a1) ; [#uses=1] ret i32 %res } @@ -2027,12 +3009,19 @@ declare i32 @llvm.x86.sse.ucomieq.ss(<4 x float>, <4 x float>) nounwind readnone define i32 @test_x86_sse_ucomige_ss(<4 x float> %a0, <4 x float> %a1) { -; CHECK-LABEL: test_x86_sse_ucomige_ss: -; CHECK: ## BB#0: -; CHECK-NEXT: vucomiss %xmm1, %xmm0 -; CHECK-NEXT: setae %al -; CHECK-NEXT: movzbl %al, %eax -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse_ucomige_ss: +; AVX: ## BB#0: +; AVX-NEXT: vucomiss %xmm1, %xmm0 +; AVX-NEXT: setae %al +; AVX-NEXT: movzbl %al, %eax +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse_ucomige_ss: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vucomiss %xmm1, %xmm0 +; AVX512VL-NEXT: setae %al +; AVX512VL-NEXT: movzbl %al, %eax +; AVX512VL-NEXT: retl %res = call i32 @llvm.x86.sse.ucomige.ss(<4 x float> %a0, <4 x float> %a1) ; [#uses=1] ret i32 %res } @@ -2040,12 +3029,19 @@ declare i32 @llvm.x86.sse.ucomige.ss(<4 x float>, <4 x float>) nounwind readnone define i32 @test_x86_sse_ucomigt_ss(<4 x float> %a0, <4 x float> %a1) { -; CHECK-LABEL: test_x86_sse_ucomigt_ss: -; CHECK: ## BB#0: -; CHECK-NEXT: vucomiss %xmm1, %xmm0 -; CHECK-NEXT: seta %al -; CHECK-NEXT: movzbl %al, %eax -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse_ucomigt_ss: +; AVX: ## BB#0: +; AVX-NEXT: vucomiss %xmm1, %xmm0 +; AVX-NEXT: seta %al +; AVX-NEXT: movzbl %al, %eax +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse_ucomigt_ss: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vucomiss %xmm1, %xmm0 +; AVX512VL-NEXT: seta %al +; AVX512VL-NEXT: movzbl %al, %eax +; AVX512VL-NEXT: retl %res = call i32 @llvm.x86.sse.ucomigt.ss(<4 x float> %a0, <4 x float> %a1) ; [#uses=1] ret i32 %res } @@ -2053,12 +3049,19 @@ declare i32 @llvm.x86.sse.ucomigt.ss(<4 x float>, <4 x float>) nounwind readnone define i32 @test_x86_sse_ucomile_ss(<4 x float> %a0, <4 x float> %a1) { -; CHECK-LABEL: test_x86_sse_ucomile_ss: -; CHECK: ## BB#0: -; CHECK-NEXT: vucomiss %xmm0, %xmm1 -; CHECK-NEXT: setae %al -; CHECK-NEXT: movzbl %al, %eax -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse_ucomile_ss: +; AVX: ## BB#0: +; AVX-NEXT: vucomiss %xmm0, %xmm1 +; AVX-NEXT: setae %al +; AVX-NEXT: movzbl %al, %eax +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse_ucomile_ss: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vucomiss %xmm0, %xmm1 +; AVX512VL-NEXT: setae %al +; AVX512VL-NEXT: movzbl %al, %eax +; AVX512VL-NEXT: retl %res = call i32 @llvm.x86.sse.ucomile.ss(<4 x float> %a0, <4 x float> %a1) ; [#uses=1] ret i32 %res } @@ -2066,12 +3069,19 @@ declare i32 @llvm.x86.sse.ucomile.ss(<4 x float>, <4 x float>) nounwind readnone define i32 @test_x86_sse_ucomilt_ss(<4 x float> %a0, <4 x float> %a1) { -; CHECK-LABEL: test_x86_sse_ucomilt_ss: -; CHECK: ## BB#0: -; CHECK-NEXT: vucomiss %xmm0, %xmm1 -; CHECK-NEXT: seta %al -; CHECK-NEXT: movzbl %al, %eax -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse_ucomilt_ss: +; AVX: ## BB#0: +; AVX-NEXT: vucomiss %xmm0, %xmm1 +; AVX-NEXT: seta %al +; AVX-NEXT: movzbl %al, %eax +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse_ucomilt_ss: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vucomiss %xmm0, %xmm1 +; AVX512VL-NEXT: seta %al +; AVX512VL-NEXT: movzbl %al, %eax +; AVX512VL-NEXT: retl %res = call i32 @llvm.x86.sse.ucomilt.ss(<4 x float> %a0, <4 x float> %a1) ; [#uses=1] ret i32 %res } @@ -2079,14 +3089,23 @@ declare i32 @llvm.x86.sse.ucomilt.ss(<4 x float>, <4 x float>) nounwind readnone define i32 @test_x86_sse_ucomineq_ss(<4 x float> %a0, <4 x float> %a1) { -; CHECK-LABEL: test_x86_sse_ucomineq_ss: -; CHECK: ## BB#0: -; CHECK-NEXT: vucomiss %xmm1, %xmm0 -; CHECK-NEXT: setp %al -; CHECK-NEXT: setne %cl -; CHECK-NEXT: orb %al, %cl -; CHECK-NEXT: movzbl %cl, %eax -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_sse_ucomineq_ss: +; AVX: ## BB#0: +; AVX-NEXT: vucomiss %xmm1, %xmm0 +; AVX-NEXT: setp %al +; AVX-NEXT: setne %cl +; AVX-NEXT: orb %al, %cl +; AVX-NEXT: movzbl %cl, %eax +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_sse_ucomineq_ss: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vucomiss %xmm1, %xmm0 +; AVX512VL-NEXT: setp %al +; AVX512VL-NEXT: setne %cl +; AVX512VL-NEXT: orb %al, %cl +; AVX512VL-NEXT: movzbl %cl, %eax +; AVX512VL-NEXT: retl %res = call i32 @llvm.x86.sse.ucomineq.ss(<4 x float> %a0, <4 x float> %a1) ; [#uses=1] ret i32 %res } @@ -2094,10 +3113,15 @@ declare i32 @llvm.x86.sse.ucomineq.ss(<4 x float>, <4 x float>) nounwind readnon define <16 x i8> @test_x86_ssse3_pabs_b_128(<16 x i8> %a0) { -; CHECK-LABEL: test_x86_ssse3_pabs_b_128: -; CHECK: ## BB#0: -; CHECK-NEXT: vpabsb %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_ssse3_pabs_b_128: +; AVX: ## BB#0: +; AVX-NEXT: vpabsb %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_ssse3_pabs_b_128: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpabsb %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <16 x i8> @llvm.x86.ssse3.pabs.b.128(<16 x i8> %a0) ; <<16 x i8>> [#uses=1] ret <16 x i8> %res } @@ -2105,10 +3129,15 @@ declare <16 x i8> @llvm.x86.ssse3.pabs.b.128(<16 x i8>) nounwind readnone define <4 x i32> @test_x86_ssse3_pabs_d_128(<4 x i32> %a0) { -; CHECK-LABEL: test_x86_ssse3_pabs_d_128: -; CHECK: ## BB#0: -; CHECK-NEXT: vpabsd %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_ssse3_pabs_d_128: +; AVX: ## BB#0: +; AVX-NEXT: vpabsd %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_ssse3_pabs_d_128: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpabsd %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <4 x i32> @llvm.x86.ssse3.pabs.d.128(<4 x i32> %a0) ; <<4 x i32>> [#uses=1] ret <4 x i32> %res } @@ -2116,10 +3145,15 @@ declare <4 x i32> @llvm.x86.ssse3.pabs.d.128(<4 x i32>) nounwind readnone define <8 x i16> @test_x86_ssse3_pabs_w_128(<8 x i16> %a0) { -; CHECK-LABEL: test_x86_ssse3_pabs_w_128: -; CHECK: ## BB#0: -; CHECK-NEXT: vpabsw %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_ssse3_pabs_w_128: +; AVX: ## BB#0: +; AVX-NEXT: vpabsw %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_ssse3_pabs_w_128: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpabsw %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <8 x i16> @llvm.x86.ssse3.pabs.w.128(<8 x i16> %a0) ; <<8 x i16>> [#uses=1] ret <8 x i16> %res } @@ -2127,10 +3161,15 @@ declare <8 x i16> @llvm.x86.ssse3.pabs.w.128(<8 x i16>) nounwind readnone define <4 x i32> @test_x86_ssse3_phadd_d_128(<4 x i32> %a0, <4 x i32> %a1) { -; CHECK-LABEL: test_x86_ssse3_phadd_d_128: -; CHECK: ## BB#0: -; CHECK-NEXT: vphaddd %xmm1, %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_ssse3_phadd_d_128: +; AVX: ## BB#0: +; AVX-NEXT: vphaddd %xmm1, %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_ssse3_phadd_d_128: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vphaddd %xmm1, %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <4 x i32> @llvm.x86.ssse3.phadd.d.128(<4 x i32> %a0, <4 x i32> %a1) ; <<4 x i32>> [#uses=1] ret <4 x i32> %res } @@ -2138,10 +3177,15 @@ declare <4 x i32> @llvm.x86.ssse3.phadd.d.128(<4 x i32>, <4 x i32>) nounwind rea define <8 x i16> @test_x86_ssse3_phadd_sw_128(<8 x i16> %a0, <8 x i16> %a1) { -; CHECK-LABEL: test_x86_ssse3_phadd_sw_128: -; CHECK: ## BB#0: -; CHECK-NEXT: vphaddsw %xmm1, %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_ssse3_phadd_sw_128: +; AVX: ## BB#0: +; AVX-NEXT: vphaddsw %xmm1, %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_ssse3_phadd_sw_128: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vphaddsw %xmm1, %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <8 x i16> @llvm.x86.ssse3.phadd.sw.128(<8 x i16> %a0, <8 x i16> %a1) ; <<8 x i16>> [#uses=1] ret <8 x i16> %res } @@ -2149,10 +3193,15 @@ declare <8 x i16> @llvm.x86.ssse3.phadd.sw.128(<8 x i16>, <8 x i16>) nounwind re define <8 x i16> @test_x86_ssse3_phadd_w_128(<8 x i16> %a0, <8 x i16> %a1) { -; CHECK-LABEL: test_x86_ssse3_phadd_w_128: -; CHECK: ## BB#0: -; CHECK-NEXT: vphaddw %xmm1, %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_ssse3_phadd_w_128: +; AVX: ## BB#0: +; AVX-NEXT: vphaddw %xmm1, %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_ssse3_phadd_w_128: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vphaddw %xmm1, %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <8 x i16> @llvm.x86.ssse3.phadd.w.128(<8 x i16> %a0, <8 x i16> %a1) ; <<8 x i16>> [#uses=1] ret <8 x i16> %res } @@ -2160,10 +3209,15 @@ declare <8 x i16> @llvm.x86.ssse3.phadd.w.128(<8 x i16>, <8 x i16>) nounwind rea define <4 x i32> @test_x86_ssse3_phsub_d_128(<4 x i32> %a0, <4 x i32> %a1) { -; CHECK-LABEL: test_x86_ssse3_phsub_d_128: -; CHECK: ## BB#0: -; CHECK-NEXT: vphsubd %xmm1, %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_ssse3_phsub_d_128: +; AVX: ## BB#0: +; AVX-NEXT: vphsubd %xmm1, %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_ssse3_phsub_d_128: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vphsubd %xmm1, %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <4 x i32> @llvm.x86.ssse3.phsub.d.128(<4 x i32> %a0, <4 x i32> %a1) ; <<4 x i32>> [#uses=1] ret <4 x i32> %res } @@ -2171,10 +3225,15 @@ declare <4 x i32> @llvm.x86.ssse3.phsub.d.128(<4 x i32>, <4 x i32>) nounwind rea define <8 x i16> @test_x86_ssse3_phsub_sw_128(<8 x i16> %a0, <8 x i16> %a1) { -; CHECK-LABEL: test_x86_ssse3_phsub_sw_128: -; CHECK: ## BB#0: -; CHECK-NEXT: vphsubsw %xmm1, %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_ssse3_phsub_sw_128: +; AVX: ## BB#0: +; AVX-NEXT: vphsubsw %xmm1, %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_ssse3_phsub_sw_128: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vphsubsw %xmm1, %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <8 x i16> @llvm.x86.ssse3.phsub.sw.128(<8 x i16> %a0, <8 x i16> %a1) ; <<8 x i16>> [#uses=1] ret <8 x i16> %res } @@ -2182,10 +3241,15 @@ declare <8 x i16> @llvm.x86.ssse3.phsub.sw.128(<8 x i16>, <8 x i16>) nounwind re define <8 x i16> @test_x86_ssse3_phsub_w_128(<8 x i16> %a0, <8 x i16> %a1) { -; CHECK-LABEL: test_x86_ssse3_phsub_w_128: -; CHECK: ## BB#0: -; CHECK-NEXT: vphsubw %xmm1, %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_ssse3_phsub_w_128: +; AVX: ## BB#0: +; AVX-NEXT: vphsubw %xmm1, %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_ssse3_phsub_w_128: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vphsubw %xmm1, %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <8 x i16> @llvm.x86.ssse3.phsub.w.128(<8 x i16> %a0, <8 x i16> %a1) ; <<8 x i16>> [#uses=1] ret <8 x i16> %res } @@ -2193,10 +3257,15 @@ declare <8 x i16> @llvm.x86.ssse3.phsub.w.128(<8 x i16>, <8 x i16>) nounwind rea define <8 x i16> @test_x86_ssse3_pmadd_ub_sw_128(<16 x i8> %a0, <16 x i8> %a1) { -; CHECK-LABEL: test_x86_ssse3_pmadd_ub_sw_128: -; CHECK: ## BB#0: -; CHECK-NEXT: vpmaddubsw %xmm1, %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_ssse3_pmadd_ub_sw_128: +; AVX: ## BB#0: +; AVX-NEXT: vpmaddubsw %xmm1, %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_ssse3_pmadd_ub_sw_128: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpmaddubsw %xmm1, %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <8 x i16> @llvm.x86.ssse3.pmadd.ub.sw.128(<16 x i8> %a0, <16 x i8> %a1) ; <<8 x i16>> [#uses=1] ret <8 x i16> %res } @@ -2204,10 +3273,15 @@ declare <8 x i16> @llvm.x86.ssse3.pmadd.ub.sw.128(<16 x i8>, <16 x i8>) nounwind define <8 x i16> @test_x86_ssse3_pmul_hr_sw_128(<8 x i16> %a0, <8 x i16> %a1) { -; CHECK-LABEL: test_x86_ssse3_pmul_hr_sw_128: -; CHECK: ## BB#0: -; CHECK-NEXT: vpmulhrsw %xmm1, %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_ssse3_pmul_hr_sw_128: +; AVX: ## BB#0: +; AVX-NEXT: vpmulhrsw %xmm1, %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_ssse3_pmul_hr_sw_128: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpmulhrsw %xmm1, %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <8 x i16> @llvm.x86.ssse3.pmul.hr.sw.128(<8 x i16> %a0, <8 x i16> %a1) ; <<8 x i16>> [#uses=1] ret <8 x i16> %res } @@ -2215,10 +3289,15 @@ declare <8 x i16> @llvm.x86.ssse3.pmul.hr.sw.128(<8 x i16>, <8 x i16>) nounwind define <16 x i8> @test_x86_ssse3_pshuf_b_128(<16 x i8> %a0, <16 x i8> %a1) { -; CHECK-LABEL: test_x86_ssse3_pshuf_b_128: -; CHECK: ## BB#0: -; CHECK-NEXT: vpshufb %xmm1, %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_ssse3_pshuf_b_128: +; AVX: ## BB#0: +; AVX-NEXT: vpshufb %xmm1, %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_ssse3_pshuf_b_128: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpshufb %xmm1, %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %a0, <16 x i8> %a1) ; <<16 x i8>> [#uses=1] ret <16 x i8> %res } @@ -2226,10 +3305,15 @@ declare <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8>, <16 x i8>) nounwind rea define <16 x i8> @test_x86_ssse3_psign_b_128(<16 x i8> %a0, <16 x i8> %a1) { -; CHECK-LABEL: test_x86_ssse3_psign_b_128: -; CHECK: ## BB#0: -; CHECK-NEXT: vpsignb %xmm1, %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_ssse3_psign_b_128: +; AVX: ## BB#0: +; AVX-NEXT: vpsignb %xmm1, %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_ssse3_psign_b_128: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpsignb %xmm1, %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <16 x i8> @llvm.x86.ssse3.psign.b.128(<16 x i8> %a0, <16 x i8> %a1) ; <<16 x i8>> [#uses=1] ret <16 x i8> %res } @@ -2237,10 +3321,15 @@ declare <16 x i8> @llvm.x86.ssse3.psign.b.128(<16 x i8>, <16 x i8>) nounwind rea define <4 x i32> @test_x86_ssse3_psign_d_128(<4 x i32> %a0, <4 x i32> %a1) { -; CHECK-LABEL: test_x86_ssse3_psign_d_128: -; CHECK: ## BB#0: -; CHECK-NEXT: vpsignd %xmm1, %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_ssse3_psign_d_128: +; AVX: ## BB#0: +; AVX-NEXT: vpsignd %xmm1, %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_ssse3_psign_d_128: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpsignd %xmm1, %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <4 x i32> @llvm.x86.ssse3.psign.d.128(<4 x i32> %a0, <4 x i32> %a1) ; <<4 x i32>> [#uses=1] ret <4 x i32> %res } @@ -2248,10 +3337,15 @@ declare <4 x i32> @llvm.x86.ssse3.psign.d.128(<4 x i32>, <4 x i32>) nounwind rea define <8 x i16> @test_x86_ssse3_psign_w_128(<8 x i16> %a0, <8 x i16> %a1) { -; CHECK-LABEL: test_x86_ssse3_psign_w_128: -; CHECK: ## BB#0: -; CHECK-NEXT: vpsignw %xmm1, %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_ssse3_psign_w_128: +; AVX: ## BB#0: +; AVX-NEXT: vpsignw %xmm1, %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_ssse3_psign_w_128: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpsignw %xmm1, %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <8 x i16> @llvm.x86.ssse3.psign.w.128(<8 x i16> %a0, <8 x i16> %a1) ; <<8 x i16>> [#uses=1] ret <8 x i16> %res } @@ -2259,10 +3353,15 @@ declare <8 x i16> @llvm.x86.ssse3.psign.w.128(<8 x i16>, <8 x i16>) nounwind rea define <4 x double> @test_x86_avx_addsub_pd_256(<4 x double> %a0, <4 x double> %a1) { -; CHECK-LABEL: test_x86_avx_addsub_pd_256: -; CHECK: ## BB#0: -; CHECK-NEXT: vaddsubpd %ymm1, %ymm0, %ymm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_avx_addsub_pd_256: +; AVX: ## BB#0: +; AVX-NEXT: vaddsubpd %ymm1, %ymm0, %ymm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx_addsub_pd_256: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vaddsubpd %ymm1, %ymm0, %ymm0 +; AVX512VL-NEXT: retl %res = call <4 x double> @llvm.x86.avx.addsub.pd.256(<4 x double> %a0, <4 x double> %a1) ; <<4 x double>> [#uses=1] ret <4 x double> %res } @@ -2270,10 +3369,15 @@ declare <4 x double> @llvm.x86.avx.addsub.pd.256(<4 x double>, <4 x double>) nou define <8 x float> @test_x86_avx_addsub_ps_256(<8 x float> %a0, <8 x float> %a1) { -; CHECK-LABEL: test_x86_avx_addsub_ps_256: -; CHECK: ## BB#0: -; CHECK-NEXT: vaddsubps %ymm1, %ymm0, %ymm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_avx_addsub_ps_256: +; AVX: ## BB#0: +; AVX-NEXT: vaddsubps %ymm1, %ymm0, %ymm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx_addsub_ps_256: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vaddsubps %ymm1, %ymm0, %ymm0 +; AVX512VL-NEXT: retl %res = call <8 x float> @llvm.x86.avx.addsub.ps.256(<8 x float> %a0, <8 x float> %a1) ; <<8 x float>> [#uses=1] ret <8 x float> %res } @@ -2281,10 +3385,15 @@ declare <8 x float> @llvm.x86.avx.addsub.ps.256(<8 x float>, <8 x float>) nounwi define <4 x double> @test_x86_avx_blendv_pd_256(<4 x double> %a0, <4 x double> %a1, <4 x double> %a2) { -; CHECK-LABEL: test_x86_avx_blendv_pd_256: -; CHECK: ## BB#0: -; CHECK-NEXT: vblendvpd %ymm2, %ymm1, %ymm0, %ymm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_avx_blendv_pd_256: +; AVX: ## BB#0: +; AVX-NEXT: vblendvpd %ymm2, %ymm1, %ymm0, %ymm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx_blendv_pd_256: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vblendvpd %ymm2, %ymm1, %ymm0, %ymm0 +; AVX512VL-NEXT: retl %res = call <4 x double> @llvm.x86.avx.blendv.pd.256(<4 x double> %a0, <4 x double> %a1, <4 x double> %a2) ; <<4 x double>> [#uses=1] ret <4 x double> %res } @@ -2292,10 +3401,15 @@ declare <4 x double> @llvm.x86.avx.blendv.pd.256(<4 x double>, <4 x double>, <4 define <8 x float> @test_x86_avx_blendv_ps_256(<8 x float> %a0, <8 x float> %a1, <8 x float> %a2) { -; CHECK-LABEL: test_x86_avx_blendv_ps_256: -; CHECK: ## BB#0: -; CHECK-NEXT: vblendvps %ymm2, %ymm1, %ymm0, %ymm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_avx_blendv_ps_256: +; AVX: ## BB#0: +; AVX-NEXT: vblendvps %ymm2, %ymm1, %ymm0, %ymm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx_blendv_ps_256: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vblendvps %ymm2, %ymm1, %ymm0, %ymm0 +; AVX512VL-NEXT: retl %res = call <8 x float> @llvm.x86.avx.blendv.ps.256(<8 x float> %a0, <8 x float> %a1, <8 x float> %a2) ; <<8 x float>> [#uses=1] ret <8 x float> %res } @@ -2303,10 +3417,15 @@ declare <8 x float> @llvm.x86.avx.blendv.ps.256(<8 x float>, <8 x float>, <8 x f define <4 x double> @test_x86_avx_cmp_pd_256(<4 x double> %a0, <4 x double> %a1) { -; CHECK-LABEL: test_x86_avx_cmp_pd_256: -; CHECK: ## BB#0: -; CHECK-NEXT: vcmpordpd %ymm1, %ymm0, %ymm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_avx_cmp_pd_256: +; AVX: ## BB#0: +; AVX-NEXT: vcmpordpd %ymm1, %ymm0, %ymm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx_cmp_pd_256: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vcmpordpd %ymm1, %ymm0, %ymm0 +; AVX512VL-NEXT: retl %res = call <4 x double> @llvm.x86.avx.cmp.pd.256(<4 x double> %a0, <4 x double> %a1, i8 7) ; <<4 x double>> [#uses=1] ret <4 x double> %res } @@ -2314,50 +3433,91 @@ declare <4 x double> @llvm.x86.avx.cmp.pd.256(<4 x double>, <4 x double>, i8) no define <8 x float> @test_x86_avx_cmp_ps_256(<8 x float> %a0, <8 x float> %a1) { -; CHECK-LABEL: test_x86_avx_cmp_ps_256: -; CHECK: ## BB#0: -; CHECK-NEXT: vcmpordps %ymm1, %ymm0, %ymm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_avx_cmp_ps_256: +; AVX: ## BB#0: +; AVX-NEXT: vcmpordps %ymm1, %ymm0, %ymm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx_cmp_ps_256: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vcmpordps %ymm1, %ymm0, %ymm0 +; AVX512VL-NEXT: retl %res = call <8 x float> @llvm.x86.avx.cmp.ps.256(<8 x float> %a0, <8 x float> %a1, i8 7) ; <<8 x float>> [#uses=1] ret <8 x float> %res } define <8 x float> @test_x86_avx_cmp_ps_256_pseudo_op(<8 x float> %a0, <8 x float> %a1) { -; CHECK-LABEL: test_x86_avx_cmp_ps_256_pseudo_op: -; CHECK: ## BB#0: -; CHECK-NEXT: vcmpeqps %ymm1, %ymm0, %ymm1 -; CHECK-NEXT: vcmpltps %ymm1, %ymm0, %ymm1 -; CHECK-NEXT: vcmpleps %ymm1, %ymm0, %ymm1 -; CHECK-NEXT: vcmpunordps %ymm1, %ymm0, %ymm1 -; CHECK-NEXT: vcmpneqps %ymm1, %ymm0, %ymm1 -; CHECK-NEXT: vcmpnltps %ymm1, %ymm0, %ymm1 -; CHECK-NEXT: vcmpnleps %ymm1, %ymm0, %ymm1 -; CHECK-NEXT: vcmpordps %ymm1, %ymm0, %ymm1 -; CHECK-NEXT: vcmpeq_uqps %ymm1, %ymm0, %ymm1 -; CHECK-NEXT: vcmpngeps %ymm1, %ymm0, %ymm1 -; CHECK-NEXT: vcmpngtps %ymm1, %ymm0, %ymm1 -; CHECK-NEXT: vcmpfalseps %ymm1, %ymm0, %ymm1 -; CHECK-NEXT: vcmpneq_oqps %ymm1, %ymm0, %ymm1 -; CHECK-NEXT: vcmpgeps %ymm1, %ymm0, %ymm1 -; CHECK-NEXT: vcmpgtps %ymm1, %ymm0, %ymm1 -; CHECK-NEXT: vcmptrueps %ymm1, %ymm0, %ymm1 -; CHECK-NEXT: vcmpeq_osps %ymm1, %ymm0, %ymm1 -; CHECK-NEXT: vcmplt_oqps %ymm1, %ymm0, %ymm1 -; CHECK-NEXT: vcmple_oqps %ymm1, %ymm0, %ymm1 -; CHECK-NEXT: vcmpunord_sps %ymm1, %ymm0, %ymm1 -; CHECK-NEXT: vcmpneq_usps %ymm1, %ymm0, %ymm1 -; CHECK-NEXT: vcmpnlt_uqps %ymm1, %ymm0, %ymm1 -; CHECK-NEXT: vcmpnle_uqps %ymm1, %ymm0, %ymm1 -; CHECK-NEXT: vcmpord_sps %ymm1, %ymm0, %ymm1 -; CHECK-NEXT: vcmpeq_usps %ymm1, %ymm0, %ymm1 -; CHECK-NEXT: vcmpnge_uqps %ymm1, %ymm0, %ymm1 -; CHECK-NEXT: vcmpngt_uqps %ymm1, %ymm0, %ymm1 -; CHECK-NEXT: vcmpfalse_osps %ymm1, %ymm0, %ymm1 -; CHECK-NEXT: vcmpneq_osps %ymm1, %ymm0, %ymm1 -; CHECK-NEXT: vcmpge_oqps %ymm1, %ymm0, %ymm1 -; CHECK-NEXT: vcmpgt_oqps %ymm1, %ymm0, %ymm1 -; CHECK-NEXT: vcmptrue_usps %ymm1, %ymm0, %ymm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_avx_cmp_ps_256_pseudo_op: +; AVX: ## BB#0: +; AVX-NEXT: vcmpeqps %ymm1, %ymm0, %ymm1 +; AVX-NEXT: vcmpltps %ymm1, %ymm0, %ymm1 +; AVX-NEXT: vcmpleps %ymm1, %ymm0, %ymm1 +; AVX-NEXT: vcmpunordps %ymm1, %ymm0, %ymm1 +; AVX-NEXT: vcmpneqps %ymm1, %ymm0, %ymm1 +; AVX-NEXT: vcmpnltps %ymm1, %ymm0, %ymm1 +; AVX-NEXT: vcmpnleps %ymm1, %ymm0, %ymm1 +; AVX-NEXT: vcmpordps %ymm1, %ymm0, %ymm1 +; AVX-NEXT: vcmpeq_uqps %ymm1, %ymm0, %ymm1 +; AVX-NEXT: vcmpngeps %ymm1, %ymm0, %ymm1 +; AVX-NEXT: vcmpngtps %ymm1, %ymm0, %ymm1 +; AVX-NEXT: vcmpfalseps %ymm1, %ymm0, %ymm1 +; AVX-NEXT: vcmpneq_oqps %ymm1, %ymm0, %ymm1 +; AVX-NEXT: vcmpgeps %ymm1, %ymm0, %ymm1 +; AVX-NEXT: vcmpgtps %ymm1, %ymm0, %ymm1 +; AVX-NEXT: vcmptrueps %ymm1, %ymm0, %ymm1 +; AVX-NEXT: vcmpeq_osps %ymm1, %ymm0, %ymm1 +; AVX-NEXT: vcmplt_oqps %ymm1, %ymm0, %ymm1 +; AVX-NEXT: vcmple_oqps %ymm1, %ymm0, %ymm1 +; AVX-NEXT: vcmpunord_sps %ymm1, %ymm0, %ymm1 +; AVX-NEXT: vcmpneq_usps %ymm1, %ymm0, %ymm1 +; AVX-NEXT: vcmpnlt_uqps %ymm1, %ymm0, %ymm1 +; AVX-NEXT: vcmpnle_uqps %ymm1, %ymm0, %ymm1 +; AVX-NEXT: vcmpord_sps %ymm1, %ymm0, %ymm1 +; AVX-NEXT: vcmpeq_usps %ymm1, %ymm0, %ymm1 +; AVX-NEXT: vcmpnge_uqps %ymm1, %ymm0, %ymm1 +; AVX-NEXT: vcmpngt_uqps %ymm1, %ymm0, %ymm1 +; AVX-NEXT: vcmpfalse_osps %ymm1, %ymm0, %ymm1 +; AVX-NEXT: vcmpneq_osps %ymm1, %ymm0, %ymm1 +; AVX-NEXT: vcmpge_oqps %ymm1, %ymm0, %ymm1 +; AVX-NEXT: vcmpgt_oqps %ymm1, %ymm0, %ymm1 +; AVX-NEXT: vcmptrue_usps %ymm1, %ymm0, %ymm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx_cmp_ps_256_pseudo_op: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vcmpeqps %ymm1, %ymm0, %ymm1 +; AVX512VL-NEXT: vcmpltps %ymm1, %ymm0, %ymm1 +; AVX512VL-NEXT: vcmpleps %ymm1, %ymm0, %ymm1 +; AVX512VL-NEXT: vcmpunordps %ymm1, %ymm0, %ymm1 +; AVX512VL-NEXT: vcmpneqps %ymm1, %ymm0, %ymm1 +; AVX512VL-NEXT: vcmpnltps %ymm1, %ymm0, %ymm1 +; AVX512VL-NEXT: vcmpnleps %ymm1, %ymm0, %ymm1 +; AVX512VL-NEXT: vcmpordps %ymm1, %ymm0, %ymm1 +; AVX512VL-NEXT: vcmpeq_uqps %ymm1, %ymm0, %ymm1 +; AVX512VL-NEXT: vcmpngeps %ymm1, %ymm0, %ymm1 +; AVX512VL-NEXT: vcmpngtps %ymm1, %ymm0, %ymm1 +; AVX512VL-NEXT: vcmpfalseps %ymm1, %ymm0, %ymm1 +; AVX512VL-NEXT: vcmpneq_oqps %ymm1, %ymm0, %ymm1 +; AVX512VL-NEXT: vcmpgeps %ymm1, %ymm0, %ymm1 +; AVX512VL-NEXT: vcmpgtps %ymm1, %ymm0, %ymm1 +; AVX512VL-NEXT: vcmptrueps %ymm1, %ymm0, %ymm1 +; AVX512VL-NEXT: vcmpeq_osps %ymm1, %ymm0, %ymm1 +; AVX512VL-NEXT: vcmplt_oqps %ymm1, %ymm0, %ymm1 +; AVX512VL-NEXT: vcmple_oqps %ymm1, %ymm0, %ymm1 +; AVX512VL-NEXT: vcmpunord_sps %ymm1, %ymm0, %ymm1 +; AVX512VL-NEXT: vcmpneq_usps %ymm1, %ymm0, %ymm1 +; AVX512VL-NEXT: vcmpnlt_uqps %ymm1, %ymm0, %ymm1 +; AVX512VL-NEXT: vcmpnle_uqps %ymm1, %ymm0, %ymm1 +; AVX512VL-NEXT: vcmpord_sps %ymm1, %ymm0, %ymm1 +; AVX512VL-NEXT: vcmpeq_usps %ymm1, %ymm0, %ymm1 +; AVX512VL-NEXT: vcmpnge_uqps %ymm1, %ymm0, %ymm1 +; AVX512VL-NEXT: vcmpngt_uqps %ymm1, %ymm0, %ymm1 +; AVX512VL-NEXT: vcmpfalse_osps %ymm1, %ymm0, %ymm1 +; AVX512VL-NEXT: vcmpneq_osps %ymm1, %ymm0, %ymm1 +; AVX512VL-NEXT: vcmpge_oqps %ymm1, %ymm0, %ymm1 +; AVX512VL-NEXT: vcmpgt_oqps %ymm1, %ymm0, %ymm1 +; AVX512VL-NEXT: vcmptrue_usps %ymm1, %ymm0, %ymm0 +; AVX512VL-NEXT: retl %a2 = call <8 x float> @llvm.x86.avx.cmp.ps.256(<8 x float> %a0, <8 x float> %a1, i8 0) ; <<8 x float>> [#uses=1] %a3 = call <8 x float> @llvm.x86.avx.cmp.ps.256(<8 x float> %a0, <8 x float> %a2, i8 1) ; <<8 x float>> [#uses=1] %a4 = call <8 x float> @llvm.x86.avx.cmp.ps.256(<8 x float> %a0, <8 x float> %a3, i8 2) ; <<8 x float>> [#uses=1] @@ -2396,11 +3556,16 @@ declare <8 x float> @llvm.x86.avx.cmp.ps.256(<8 x float>, <8 x float>, i8) nounw define <4 x float> @test_x86_avx_cvt_pd2_ps_256(<4 x double> %a0) { -; CHECK-LABEL: test_x86_avx_cvt_pd2_ps_256: -; CHECK: ## BB#0: -; CHECK-NEXT: vcvtpd2psy %ymm0, %xmm0 -; CHECK-NEXT: vzeroupper -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_avx_cvt_pd2_ps_256: +; AVX: ## BB#0: +; AVX-NEXT: vcvtpd2psy %ymm0, %xmm0 +; AVX-NEXT: vzeroupper +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx_cvt_pd2_ps_256: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vcvtpd2psy %ymm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <4 x float> @llvm.x86.avx.cvt.pd2.ps.256(<4 x double> %a0) ; <<4 x float>> [#uses=1] ret <4 x float> %res } @@ -2408,11 +3573,16 @@ declare <4 x float> @llvm.x86.avx.cvt.pd2.ps.256(<4 x double>) nounwind readnone define <4 x i32> @test_x86_avx_cvt_pd2dq_256(<4 x double> %a0) { -; CHECK-LABEL: test_x86_avx_cvt_pd2dq_256: -; CHECK: ## BB#0: -; CHECK-NEXT: vcvtpd2dqy %ymm0, %xmm0 -; CHECK-NEXT: vzeroupper -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_avx_cvt_pd2dq_256: +; AVX: ## BB#0: +; AVX-NEXT: vcvtpd2dqy %ymm0, %xmm0 +; AVX-NEXT: vzeroupper +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx_cvt_pd2dq_256: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vcvtpd2dqy %ymm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <4 x i32> @llvm.x86.avx.cvt.pd2dq.256(<4 x double> %a0) ; <<4 x i32>> [#uses=1] ret <4 x i32> %res } @@ -2420,10 +3590,15 @@ declare <4 x i32> @llvm.x86.avx.cvt.pd2dq.256(<4 x double>) nounwind readnone define <4 x double> @test_x86_avx_cvt_ps2_pd_256(<4 x float> %a0) { -; CHECK-LABEL: test_x86_avx_cvt_ps2_pd_256: -; CHECK: ## BB#0: -; CHECK-NEXT: vcvtps2pd %xmm0, %ymm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_avx_cvt_ps2_pd_256: +; AVX: ## BB#0: +; AVX-NEXT: vcvtps2pd %xmm0, %ymm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx_cvt_ps2_pd_256: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vcvtps2pd %xmm0, %ymm0 +; AVX512VL-NEXT: retl %res = call <4 x double> @llvm.x86.avx.cvt.ps2.pd.256(<4 x float> %a0) ; <<4 x double>> [#uses=1] ret <4 x double> %res } @@ -2431,10 +3606,15 @@ declare <4 x double> @llvm.x86.avx.cvt.ps2.pd.256(<4 x float>) nounwind readnone define <8 x i32> @test_x86_avx_cvt_ps2dq_256(<8 x float> %a0) { -; CHECK-LABEL: test_x86_avx_cvt_ps2dq_256: -; CHECK: ## BB#0: -; CHECK-NEXT: vcvtps2dq %ymm0, %ymm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_avx_cvt_ps2dq_256: +; AVX: ## BB#0: +; AVX-NEXT: vcvtps2dq %ymm0, %ymm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx_cvt_ps2dq_256: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vcvtps2dq %ymm0, %ymm0 +; AVX512VL-NEXT: retl %res = call <8 x i32> @llvm.x86.avx.cvt.ps2dq.256(<8 x float> %a0) ; <<8 x i32>> [#uses=1] ret <8 x i32> %res } @@ -2442,10 +3622,15 @@ declare <8 x i32> @llvm.x86.avx.cvt.ps2dq.256(<8 x float>) nounwind readnone define <4 x double> @test_x86_avx_cvtdq2_pd_256(<4 x i32> %a0) { -; CHECK-LABEL: test_x86_avx_cvtdq2_pd_256: -; CHECK: ## BB#0: -; CHECK-NEXT: vcvtdq2pd %xmm0, %ymm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_avx_cvtdq2_pd_256: +; AVX: ## BB#0: +; AVX-NEXT: vcvtdq2pd %xmm0, %ymm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx_cvtdq2_pd_256: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vcvtdq2pd %xmm0, %ymm0 +; AVX512VL-NEXT: retl %res = call <4 x double> @llvm.x86.avx.cvtdq2.pd.256(<4 x i32> %a0) ; <<4 x double>> [#uses=1] ret <4 x double> %res } @@ -2453,10 +3638,15 @@ declare <4 x double> @llvm.x86.avx.cvtdq2.pd.256(<4 x i32>) nounwind readnone define <8 x float> @test_x86_avx_cvtdq2_ps_256(<8 x i32> %a0) { -; CHECK-LABEL: test_x86_avx_cvtdq2_ps_256: -; CHECK: ## BB#0: -; CHECK-NEXT: vcvtdq2ps %ymm0, %ymm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_avx_cvtdq2_ps_256: +; AVX: ## BB#0: +; AVX-NEXT: vcvtdq2ps %ymm0, %ymm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx_cvtdq2_ps_256: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vcvtdq2ps %ymm0, %ymm0 +; AVX512VL-NEXT: retl %res = call <8 x float> @llvm.x86.avx.cvtdq2.ps.256(<8 x i32> %a0) ; <<8 x float>> [#uses=1] ret <8 x float> %res } @@ -2464,11 +3654,16 @@ declare <8 x float> @llvm.x86.avx.cvtdq2.ps.256(<8 x i32>) nounwind readnone define <4 x i32> @test_x86_avx_cvtt_pd2dq_256(<4 x double> %a0) { -; CHECK-LABEL: test_x86_avx_cvtt_pd2dq_256: -; CHECK: ## BB#0: -; CHECK-NEXT: vcvttpd2dqy %ymm0, %xmm0 -; CHECK-NEXT: vzeroupper -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_avx_cvtt_pd2dq_256: +; AVX: ## BB#0: +; AVX-NEXT: vcvttpd2dqy %ymm0, %xmm0 +; AVX-NEXT: vzeroupper +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx_cvtt_pd2dq_256: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vcvttpd2dqy %ymm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <4 x i32> @llvm.x86.avx.cvtt.pd2dq.256(<4 x double> %a0) ; <<4 x i32>> [#uses=1] ret <4 x i32> %res } @@ -2476,10 +3671,15 @@ declare <4 x i32> @llvm.x86.avx.cvtt.pd2dq.256(<4 x double>) nounwind readnone define <8 x i32> @test_x86_avx_cvtt_ps2dq_256(<8 x float> %a0) { -; CHECK-LABEL: test_x86_avx_cvtt_ps2dq_256: -; CHECK: ## BB#0: -; CHECK-NEXT: vcvttps2dq %ymm0, %ymm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_avx_cvtt_ps2dq_256: +; AVX: ## BB#0: +; AVX-NEXT: vcvttps2dq %ymm0, %ymm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx_cvtt_ps2dq_256: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vcvttps2dq %ymm0, %ymm0 +; AVX512VL-NEXT: retl %res = call <8 x i32> @llvm.x86.avx.cvtt.ps2dq.256(<8 x float> %a0) ; <<8 x i32>> [#uses=1] ret <8 x i32> %res } @@ -2487,10 +3687,15 @@ declare <8 x i32> @llvm.x86.avx.cvtt.ps2dq.256(<8 x float>) nounwind readnone define <8 x float> @test_x86_avx_dp_ps_256(<8 x float> %a0, <8 x float> %a1) { -; CHECK-LABEL: test_x86_avx_dp_ps_256: -; CHECK: ## BB#0: -; CHECK-NEXT: vdpps $7, %ymm1, %ymm0, %ymm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_avx_dp_ps_256: +; AVX: ## BB#0: +; AVX-NEXT: vdpps $7, %ymm1, %ymm0, %ymm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx_dp_ps_256: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vdpps $7, %ymm1, %ymm0, %ymm0 +; AVX512VL-NEXT: retl %res = call <8 x float> @llvm.x86.avx.dp.ps.256(<8 x float> %a0, <8 x float> %a1, i8 7) ; <<8 x float>> [#uses=1] ret <8 x float> %res } @@ -2498,10 +3703,15 @@ declare <8 x float> @llvm.x86.avx.dp.ps.256(<8 x float>, <8 x float>, i8) nounwi define <4 x double> @test_x86_avx_hadd_pd_256(<4 x double> %a0, <4 x double> %a1) { -; CHECK-LABEL: test_x86_avx_hadd_pd_256: -; CHECK: ## BB#0: -; CHECK-NEXT: vhaddpd %ymm1, %ymm0, %ymm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_avx_hadd_pd_256: +; AVX: ## BB#0: +; AVX-NEXT: vhaddpd %ymm1, %ymm0, %ymm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx_hadd_pd_256: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vhaddpd %ymm1, %ymm0, %ymm0 +; AVX512VL-NEXT: retl %res = call <4 x double> @llvm.x86.avx.hadd.pd.256(<4 x double> %a0, <4 x double> %a1) ; <<4 x double>> [#uses=1] ret <4 x double> %res } @@ -2509,10 +3719,15 @@ declare <4 x double> @llvm.x86.avx.hadd.pd.256(<4 x double>, <4 x double>) nounw define <8 x float> @test_x86_avx_hadd_ps_256(<8 x float> %a0, <8 x float> %a1) { -; CHECK-LABEL: test_x86_avx_hadd_ps_256: -; CHECK: ## BB#0: -; CHECK-NEXT: vhaddps %ymm1, %ymm0, %ymm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_avx_hadd_ps_256: +; AVX: ## BB#0: +; AVX-NEXT: vhaddps %ymm1, %ymm0, %ymm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx_hadd_ps_256: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vhaddps %ymm1, %ymm0, %ymm0 +; AVX512VL-NEXT: retl %res = call <8 x float> @llvm.x86.avx.hadd.ps.256(<8 x float> %a0, <8 x float> %a1) ; <<8 x float>> [#uses=1] ret <8 x float> %res } @@ -2520,10 +3735,15 @@ declare <8 x float> @llvm.x86.avx.hadd.ps.256(<8 x float>, <8 x float>) nounwind define <4 x double> @test_x86_avx_hsub_pd_256(<4 x double> %a0, <4 x double> %a1) { -; CHECK-LABEL: test_x86_avx_hsub_pd_256: -; CHECK: ## BB#0: -; CHECK-NEXT: vhsubpd %ymm1, %ymm0, %ymm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_avx_hsub_pd_256: +; AVX: ## BB#0: +; AVX-NEXT: vhsubpd %ymm1, %ymm0, %ymm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx_hsub_pd_256: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vhsubpd %ymm1, %ymm0, %ymm0 +; AVX512VL-NEXT: retl %res = call <4 x double> @llvm.x86.avx.hsub.pd.256(<4 x double> %a0, <4 x double> %a1) ; <<4 x double>> [#uses=1] ret <4 x double> %res } @@ -2531,10 +3751,15 @@ declare <4 x double> @llvm.x86.avx.hsub.pd.256(<4 x double>, <4 x double>) nounw define <8 x float> @test_x86_avx_hsub_ps_256(<8 x float> %a0, <8 x float> %a1) { -; CHECK-LABEL: test_x86_avx_hsub_ps_256: -; CHECK: ## BB#0: -; CHECK-NEXT: vhsubps %ymm1, %ymm0, %ymm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_avx_hsub_ps_256: +; AVX: ## BB#0: +; AVX-NEXT: vhsubps %ymm1, %ymm0, %ymm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx_hsub_ps_256: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vhsubps %ymm1, %ymm0, %ymm0 +; AVX512VL-NEXT: retl %res = call <8 x float> @llvm.x86.avx.hsub.ps.256(<8 x float> %a0, <8 x float> %a1) ; <<8 x float>> [#uses=1] ret <8 x float> %res } @@ -2542,11 +3767,17 @@ declare <8 x float> @llvm.x86.avx.hsub.ps.256(<8 x float>, <8 x float>) nounwind define <32 x i8> @test_x86_avx_ldu_dq_256(i8* %a0) { -; CHECK-LABEL: test_x86_avx_ldu_dq_256: -; CHECK: ## BB#0: -; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax -; CHECK-NEXT: vlddqu (%eax), %ymm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_avx_ldu_dq_256: +; AVX: ## BB#0: +; AVX-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX-NEXT: vlddqu (%eax), %ymm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx_ldu_dq_256: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX512VL-NEXT: vlddqu (%eax), %ymm0 +; AVX512VL-NEXT: retl %res = call <32 x i8> @llvm.x86.avx.ldu.dq.256(i8* %a0) ; <<32 x i8>> [#uses=1] ret <32 x i8> %res } @@ -2554,11 +3785,17 @@ declare <32 x i8> @llvm.x86.avx.ldu.dq.256(i8*) nounwind readonly define <2 x double> @test_x86_avx_maskload_pd(i8* %a0, <2 x i64> %mask) { -; CHECK-LABEL: test_x86_avx_maskload_pd: -; CHECK: ## BB#0: -; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax -; CHECK-NEXT: vmaskmovpd (%eax), %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_avx_maskload_pd: +; AVX: ## BB#0: +; AVX-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX-NEXT: vmaskmovpd (%eax), %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx_maskload_pd: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX512VL-NEXT: vmaskmovpd (%eax), %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <2 x double> @llvm.x86.avx.maskload.pd(i8* %a0, <2 x i64> %mask) ; <<2 x double>> [#uses=1] ret <2 x double> %res } @@ -2566,11 +3803,17 @@ declare <2 x double> @llvm.x86.avx.maskload.pd(i8*, <2 x i64>) nounwind readonly define <4 x double> @test_x86_avx_maskload_pd_256(i8* %a0, <4 x i64> %mask) { -; CHECK-LABEL: test_x86_avx_maskload_pd_256: -; CHECK: ## BB#0: -; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax -; CHECK-NEXT: vmaskmovpd (%eax), %ymm0, %ymm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_avx_maskload_pd_256: +; AVX: ## BB#0: +; AVX-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX-NEXT: vmaskmovpd (%eax), %ymm0, %ymm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx_maskload_pd_256: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX512VL-NEXT: vmaskmovpd (%eax), %ymm0, %ymm0 +; AVX512VL-NEXT: retl %res = call <4 x double> @llvm.x86.avx.maskload.pd.256(i8* %a0, <4 x i64> %mask) ; <<4 x double>> [#uses=1] ret <4 x double> %res } @@ -2578,11 +3821,17 @@ declare <4 x double> @llvm.x86.avx.maskload.pd.256(i8*, <4 x i64>) nounwind read define <4 x float> @test_x86_avx_maskload_ps(i8* %a0, <4 x i32> %mask) { -; CHECK-LABEL: test_x86_avx_maskload_ps: -; CHECK: ## BB#0: -; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax -; CHECK-NEXT: vmaskmovps (%eax), %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_avx_maskload_ps: +; AVX: ## BB#0: +; AVX-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX-NEXT: vmaskmovps (%eax), %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx_maskload_ps: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX512VL-NEXT: vmaskmovps (%eax), %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <4 x float> @llvm.x86.avx.maskload.ps(i8* %a0, <4 x i32> %mask) ; <<4 x float>> [#uses=1] ret <4 x float> %res } @@ -2590,11 +3839,17 @@ declare <4 x float> @llvm.x86.avx.maskload.ps(i8*, <4 x i32>) nounwind readonly define <8 x float> @test_x86_avx_maskload_ps_256(i8* %a0, <8 x i32> %mask) { -; CHECK-LABEL: test_x86_avx_maskload_ps_256: -; CHECK: ## BB#0: -; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax -; CHECK-NEXT: vmaskmovps (%eax), %ymm0, %ymm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_avx_maskload_ps_256: +; AVX: ## BB#0: +; AVX-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX-NEXT: vmaskmovps (%eax), %ymm0, %ymm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx_maskload_ps_256: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX512VL-NEXT: vmaskmovps (%eax), %ymm0, %ymm0 +; AVX512VL-NEXT: retl %res = call <8 x float> @llvm.x86.avx.maskload.ps.256(i8* %a0, <8 x i32> %mask) ; <<8 x float>> [#uses=1] ret <8 x float> %res } @@ -2602,11 +3857,17 @@ declare <8 x float> @llvm.x86.avx.maskload.ps.256(i8*, <8 x i32>) nounwind reado define void @test_x86_avx_maskstore_pd(i8* %a0, <2 x i64> %mask, <2 x double> %a2) { -; CHECK-LABEL: test_x86_avx_maskstore_pd: -; CHECK: ## BB#0: -; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax -; CHECK-NEXT: vmaskmovpd %xmm1, %xmm0, (%eax) -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_avx_maskstore_pd: +; AVX: ## BB#0: +; AVX-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX-NEXT: vmaskmovpd %xmm1, %xmm0, (%eax) +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx_maskstore_pd: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX512VL-NEXT: vmaskmovpd %xmm1, %xmm0, (%eax) +; AVX512VL-NEXT: retl call void @llvm.x86.avx.maskstore.pd(i8* %a0, <2 x i64> %mask, <2 x double> %a2) ret void } @@ -2614,12 +3875,18 @@ declare void @llvm.x86.avx.maskstore.pd(i8*, <2 x i64>, <2 x double>) nounwind define void @test_x86_avx_maskstore_pd_256(i8* %a0, <4 x i64> %mask, <4 x double> %a2) { -; CHECK-LABEL: test_x86_avx_maskstore_pd_256: -; CHECK: ## BB#0: -; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax -; CHECK-NEXT: vmaskmovpd %ymm1, %ymm0, (%eax) -; CHECK-NEXT: vzeroupper -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_avx_maskstore_pd_256: +; AVX: ## BB#0: +; AVX-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX-NEXT: vmaskmovpd %ymm1, %ymm0, (%eax) +; AVX-NEXT: vzeroupper +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx_maskstore_pd_256: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX512VL-NEXT: vmaskmovpd %ymm1, %ymm0, (%eax) +; AVX512VL-NEXT: retl call void @llvm.x86.avx.maskstore.pd.256(i8* %a0, <4 x i64> %mask, <4 x double> %a2) ret void } @@ -2627,11 +3894,17 @@ declare void @llvm.x86.avx.maskstore.pd.256(i8*, <4 x i64>, <4 x double>) nounwi define void @test_x86_avx_maskstore_ps(i8* %a0, <4 x i32> %mask, <4 x float> %a2) { -; CHECK-LABEL: test_x86_avx_maskstore_ps: -; CHECK: ## BB#0: -; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax -; CHECK-NEXT: vmaskmovps %xmm1, %xmm0, (%eax) -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_avx_maskstore_ps: +; AVX: ## BB#0: +; AVX-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX-NEXT: vmaskmovps %xmm1, %xmm0, (%eax) +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx_maskstore_ps: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX512VL-NEXT: vmaskmovps %xmm1, %xmm0, (%eax) +; AVX512VL-NEXT: retl call void @llvm.x86.avx.maskstore.ps(i8* %a0, <4 x i32> %mask, <4 x float> %a2) ret void } @@ -2639,12 +3912,18 @@ declare void @llvm.x86.avx.maskstore.ps(i8*, <4 x i32>, <4 x float>) nounwind define void @test_x86_avx_maskstore_ps_256(i8* %a0, <8 x i32> %mask, <8 x float> %a2) { -; CHECK-LABEL: test_x86_avx_maskstore_ps_256: -; CHECK: ## BB#0: -; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax -; CHECK-NEXT: vmaskmovps %ymm1, %ymm0, (%eax) -; CHECK-NEXT: vzeroupper -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_avx_maskstore_ps_256: +; AVX: ## BB#0: +; AVX-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX-NEXT: vmaskmovps %ymm1, %ymm0, (%eax) +; AVX-NEXT: vzeroupper +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx_maskstore_ps_256: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX512VL-NEXT: vmaskmovps %ymm1, %ymm0, (%eax) +; AVX512VL-NEXT: retl call void @llvm.x86.avx.maskstore.ps.256(i8* %a0, <8 x i32> %mask, <8 x float> %a2) ret void } @@ -2652,10 +3931,15 @@ declare void @llvm.x86.avx.maskstore.ps.256(i8*, <8 x i32>, <8 x float>) nounwin define <4 x double> @test_x86_avx_max_pd_256(<4 x double> %a0, <4 x double> %a1) { -; CHECK-LABEL: test_x86_avx_max_pd_256: -; CHECK: ## BB#0: -; CHECK-NEXT: vmaxpd %ymm1, %ymm0, %ymm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_avx_max_pd_256: +; AVX: ## BB#0: +; AVX-NEXT: vmaxpd %ymm1, %ymm0, %ymm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx_max_pd_256: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vmaxpd %ymm1, %ymm0, %ymm0 +; AVX512VL-NEXT: retl %res = call <4 x double> @llvm.x86.avx.max.pd.256(<4 x double> %a0, <4 x double> %a1) ; <<4 x double>> [#uses=1] ret <4 x double> %res } @@ -2663,10 +3947,15 @@ declare <4 x double> @llvm.x86.avx.max.pd.256(<4 x double>, <4 x double>) nounwi define <8 x float> @test_x86_avx_max_ps_256(<8 x float> %a0, <8 x float> %a1) { -; CHECK-LABEL: test_x86_avx_max_ps_256: -; CHECK: ## BB#0: -; CHECK-NEXT: vmaxps %ymm1, %ymm0, %ymm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_avx_max_ps_256: +; AVX: ## BB#0: +; AVX-NEXT: vmaxps %ymm1, %ymm0, %ymm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx_max_ps_256: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vmaxps %ymm1, %ymm0, %ymm0 +; AVX512VL-NEXT: retl %res = call <8 x float> @llvm.x86.avx.max.ps.256(<8 x float> %a0, <8 x float> %a1) ; <<8 x float>> [#uses=1] ret <8 x float> %res } @@ -2674,10 +3963,15 @@ declare <8 x float> @llvm.x86.avx.max.ps.256(<8 x float>, <8 x float>) nounwind define <4 x double> @test_x86_avx_min_pd_256(<4 x double> %a0, <4 x double> %a1) { -; CHECK-LABEL: test_x86_avx_min_pd_256: -; CHECK: ## BB#0: -; CHECK-NEXT: vminpd %ymm1, %ymm0, %ymm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_avx_min_pd_256: +; AVX: ## BB#0: +; AVX-NEXT: vminpd %ymm1, %ymm0, %ymm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx_min_pd_256: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vminpd %ymm1, %ymm0, %ymm0 +; AVX512VL-NEXT: retl %res = call <4 x double> @llvm.x86.avx.min.pd.256(<4 x double> %a0, <4 x double> %a1) ; <<4 x double>> [#uses=1] ret <4 x double> %res } @@ -2685,10 +3979,15 @@ declare <4 x double> @llvm.x86.avx.min.pd.256(<4 x double>, <4 x double>) nounwi define <8 x float> @test_x86_avx_min_ps_256(<8 x float> %a0, <8 x float> %a1) { -; CHECK-LABEL: test_x86_avx_min_ps_256: -; CHECK: ## BB#0: -; CHECK-NEXT: vminps %ymm1, %ymm0, %ymm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_avx_min_ps_256: +; AVX: ## BB#0: +; AVX-NEXT: vminps %ymm1, %ymm0, %ymm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx_min_ps_256: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vminps %ymm1, %ymm0, %ymm0 +; AVX512VL-NEXT: retl %res = call <8 x float> @llvm.x86.avx.min.ps.256(<8 x float> %a0, <8 x float> %a1) ; <<8 x float>> [#uses=1] ret <8 x float> %res } @@ -2696,11 +3995,16 @@ declare <8 x float> @llvm.x86.avx.min.ps.256(<8 x float>, <8 x float>) nounwind define i32 @test_x86_avx_movmsk_pd_256(<4 x double> %a0) { -; CHECK-LABEL: test_x86_avx_movmsk_pd_256: -; CHECK: ## BB#0: -; CHECK-NEXT: vmovmskpd %ymm0, %eax -; CHECK-NEXT: vzeroupper -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_avx_movmsk_pd_256: +; AVX: ## BB#0: +; AVX-NEXT: vmovmskpd %ymm0, %eax +; AVX-NEXT: vzeroupper +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx_movmsk_pd_256: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vmovmskpd %ymm0, %eax +; AVX512VL-NEXT: retl %res = call i32 @llvm.x86.avx.movmsk.pd.256(<4 x double> %a0) ; [#uses=1] ret i32 %res } @@ -2708,11 +4012,16 @@ declare i32 @llvm.x86.avx.movmsk.pd.256(<4 x double>) nounwind readnone define i32 @test_x86_avx_movmsk_ps_256(<8 x float> %a0) { -; CHECK-LABEL: test_x86_avx_movmsk_ps_256: -; CHECK: ## BB#0: -; CHECK-NEXT: vmovmskps %ymm0, %eax -; CHECK-NEXT: vzeroupper -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_avx_movmsk_ps_256: +; AVX: ## BB#0: +; AVX-NEXT: vmovmskps %ymm0, %eax +; AVX-NEXT: vzeroupper +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx_movmsk_ps_256: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vmovmskps %ymm0, %eax +; AVX512VL-NEXT: retl %res = call i32 @llvm.x86.avx.movmsk.ps.256(<8 x float> %a0) ; [#uses=1] ret i32 %res } @@ -2725,13 +4034,20 @@ declare i32 @llvm.x86.avx.movmsk.ps.256(<8 x float>) nounwind readnone define i32 @test_x86_avx_ptestc_256(<4 x i64> %a0, <4 x i64> %a1) { -; CHECK-LABEL: test_x86_avx_ptestc_256: -; CHECK: ## BB#0: -; CHECK-NEXT: vptest %ymm1, %ymm0 -; CHECK-NEXT: sbbl %eax, %eax -; CHECK-NEXT: andl $1, %eax -; CHECK-NEXT: vzeroupper -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_avx_ptestc_256: +; AVX: ## BB#0: +; AVX-NEXT: vptest %ymm1, %ymm0 +; AVX-NEXT: sbbl %eax, %eax +; AVX-NEXT: andl $1, %eax +; AVX-NEXT: vzeroupper +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx_ptestc_256: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vptest %ymm1, %ymm0 +; AVX512VL-NEXT: sbbl %eax, %eax +; AVX512VL-NEXT: andl $1, %eax +; AVX512VL-NEXT: retl %res = call i32 @llvm.x86.avx.ptestc.256(<4 x i64> %a0, <4 x i64> %a1) ; [#uses=1] ret i32 %res } @@ -2739,13 +4055,20 @@ declare i32 @llvm.x86.avx.ptestc.256(<4 x i64>, <4 x i64>) nounwind readnone define i32 @test_x86_avx_ptestnzc_256(<4 x i64> %a0, <4 x i64> %a1) { -; CHECK-LABEL: test_x86_avx_ptestnzc_256: -; CHECK: ## BB#0: -; CHECK-NEXT: vptest %ymm1, %ymm0 -; CHECK-NEXT: seta %al -; CHECK-NEXT: movzbl %al, %eax -; CHECK-NEXT: vzeroupper -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_avx_ptestnzc_256: +; AVX: ## BB#0: +; AVX-NEXT: vptest %ymm1, %ymm0 +; AVX-NEXT: seta %al +; AVX-NEXT: movzbl %al, %eax +; AVX-NEXT: vzeroupper +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx_ptestnzc_256: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vptest %ymm1, %ymm0 +; AVX512VL-NEXT: seta %al +; AVX512VL-NEXT: movzbl %al, %eax +; AVX512VL-NEXT: retl %res = call i32 @llvm.x86.avx.ptestnzc.256(<4 x i64> %a0, <4 x i64> %a1) ; [#uses=1] ret i32 %res } @@ -2753,13 +4076,20 @@ declare i32 @llvm.x86.avx.ptestnzc.256(<4 x i64>, <4 x i64>) nounwind readnone define i32 @test_x86_avx_ptestz_256(<4 x i64> %a0, <4 x i64> %a1) { -; CHECK-LABEL: test_x86_avx_ptestz_256: -; CHECK: ## BB#0: -; CHECK-NEXT: vptest %ymm1, %ymm0 -; CHECK-NEXT: sete %al -; CHECK-NEXT: movzbl %al, %eax -; CHECK-NEXT: vzeroupper -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_avx_ptestz_256: +; AVX: ## BB#0: +; AVX-NEXT: vptest %ymm1, %ymm0 +; AVX-NEXT: sete %al +; AVX-NEXT: movzbl %al, %eax +; AVX-NEXT: vzeroupper +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx_ptestz_256: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vptest %ymm1, %ymm0 +; AVX512VL-NEXT: sete %al +; AVX512VL-NEXT: movzbl %al, %eax +; AVX512VL-NEXT: retl %res = call i32 @llvm.x86.avx.ptestz.256(<4 x i64> %a0, <4 x i64> %a1) ; [#uses=1] ret i32 %res } @@ -2767,10 +4097,15 @@ declare i32 @llvm.x86.avx.ptestz.256(<4 x i64>, <4 x i64>) nounwind readnone define <8 x float> @test_x86_avx_rcp_ps_256(<8 x float> %a0) { -; CHECK-LABEL: test_x86_avx_rcp_ps_256: -; CHECK: ## BB#0: -; CHECK-NEXT: vrcpps %ymm0, %ymm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_avx_rcp_ps_256: +; AVX: ## BB#0: +; AVX-NEXT: vrcpps %ymm0, %ymm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx_rcp_ps_256: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vrcp14ps %ymm0, %ymm0 +; AVX512VL-NEXT: retl %res = call <8 x float> @llvm.x86.avx.rcp.ps.256(<8 x float> %a0) ; <<8 x float>> [#uses=1] ret <8 x float> %res } @@ -2778,10 +4113,15 @@ declare <8 x float> @llvm.x86.avx.rcp.ps.256(<8 x float>) nounwind readnone define <4 x double> @test_x86_avx_round_pd_256(<4 x double> %a0) { -; CHECK-LABEL: test_x86_avx_round_pd_256: -; CHECK: ## BB#0: -; CHECK-NEXT: vroundpd $7, %ymm0, %ymm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_avx_round_pd_256: +; AVX: ## BB#0: +; AVX-NEXT: vroundpd $7, %ymm0, %ymm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx_round_pd_256: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vroundpd $7, %ymm0, %ymm0 +; AVX512VL-NEXT: retl %res = call <4 x double> @llvm.x86.avx.round.pd.256(<4 x double> %a0, i32 7) ; <<4 x double>> [#uses=1] ret <4 x double> %res } @@ -2789,10 +4129,15 @@ declare <4 x double> @llvm.x86.avx.round.pd.256(<4 x double>, i32) nounwind read define <8 x float> @test_x86_avx_round_ps_256(<8 x float> %a0) { -; CHECK-LABEL: test_x86_avx_round_ps_256: -; CHECK: ## BB#0: -; CHECK-NEXT: vroundps $7, %ymm0, %ymm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_avx_round_ps_256: +; AVX: ## BB#0: +; AVX-NEXT: vroundps $7, %ymm0, %ymm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx_round_ps_256: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vroundps $7, %ymm0, %ymm0 +; AVX512VL-NEXT: retl %res = call <8 x float> @llvm.x86.avx.round.ps.256(<8 x float> %a0, i32 7) ; <<8 x float>> [#uses=1] ret <8 x float> %res } @@ -2800,10 +4145,15 @@ declare <8 x float> @llvm.x86.avx.round.ps.256(<8 x float>, i32) nounwind readno define <8 x float> @test_x86_avx_rsqrt_ps_256(<8 x float> %a0) { -; CHECK-LABEL: test_x86_avx_rsqrt_ps_256: -; CHECK: ## BB#0: -; CHECK-NEXT: vrsqrtps %ymm0, %ymm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_avx_rsqrt_ps_256: +; AVX: ## BB#0: +; AVX-NEXT: vrsqrtps %ymm0, %ymm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx_rsqrt_ps_256: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vrsqrt14ps %ymm0, %ymm0 +; AVX512VL-NEXT: retl %res = call <8 x float> @llvm.x86.avx.rsqrt.ps.256(<8 x float> %a0) ; <<8 x float>> [#uses=1] ret <8 x float> %res } @@ -2811,10 +4161,15 @@ declare <8 x float> @llvm.x86.avx.rsqrt.ps.256(<8 x float>) nounwind readnone define <4 x double> @test_x86_avx_sqrt_pd_256(<4 x double> %a0) { -; CHECK-LABEL: test_x86_avx_sqrt_pd_256: -; CHECK: ## BB#0: -; CHECK-NEXT: vsqrtpd %ymm0, %ymm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_avx_sqrt_pd_256: +; AVX: ## BB#0: +; AVX-NEXT: vsqrtpd %ymm0, %ymm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx_sqrt_pd_256: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vsqrtpd %ymm0, %ymm0 +; AVX512VL-NEXT: retl %res = call <4 x double> @llvm.x86.avx.sqrt.pd.256(<4 x double> %a0) ; <<4 x double>> [#uses=1] ret <4 x double> %res } @@ -2822,10 +4177,15 @@ declare <4 x double> @llvm.x86.avx.sqrt.pd.256(<4 x double>) nounwind readnone define <8 x float> @test_x86_avx_sqrt_ps_256(<8 x float> %a0) { -; CHECK-LABEL: test_x86_avx_sqrt_ps_256: -; CHECK: ## BB#0: -; CHECK-NEXT: vsqrtps %ymm0, %ymm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_avx_sqrt_ps_256: +; AVX: ## BB#0: +; AVX-NEXT: vsqrtps %ymm0, %ymm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx_sqrt_ps_256: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vsqrtps %ymm0, %ymm0 +; AVX512VL-NEXT: retl %res = call <8 x float> @llvm.x86.avx.sqrt.ps.256(<8 x float> %a0) ; <<8 x float>> [#uses=1] ret <8 x float> %res } @@ -2835,17 +4195,24 @@ declare <8 x float> @llvm.x86.avx.sqrt.ps.256(<8 x float>) nounwind readnone define void @test_x86_avx_storeu_dq_256(i8* %a0, <32 x i8> %a1) { ; FIXME: unfortunately the execution domain fix pass changes this to vmovups and its hard to force with no 256-bit integer instructions ; add operation forces the execution domain. -; CHECK-LABEL: test_x86_avx_storeu_dq_256: -; CHECK: ## BB#0: -; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax -; CHECK-NEXT: vextractf128 $1, %ymm0, %xmm1 -; CHECK-NEXT: vmovdqa {{.*#+}} xmm2 = [1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1] -; CHECK-NEXT: vpaddb %xmm2, %xmm1, %xmm1 -; CHECK-NEXT: vpaddb %xmm2, %xmm0, %xmm0 -; CHECK-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 -; CHECK-NEXT: vmovups %ymm0, (%eax) -; CHECK-NEXT: vzeroupper -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_avx_storeu_dq_256: +; AVX: ## BB#0: +; AVX-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX-NEXT: vextractf128 $1, %ymm0, %xmm1 +; AVX-NEXT: vmovdqa {{.*#+}} xmm2 = [1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1] +; AVX-NEXT: vpaddb %xmm2, %xmm1, %xmm1 +; AVX-NEXT: vpaddb %xmm2, %xmm0, %xmm0 +; AVX-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 +; AVX-NEXT: vmovups %ymm0, (%eax) +; AVX-NEXT: vzeroupper +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx_storeu_dq_256: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX512VL-NEXT: vpaddb LCPI236_0, %ymm0, %ymm0 +; AVX512VL-NEXT: vmovdqu %ymm0, (%eax) +; AVX512VL-NEXT: retl %a2 = add <32 x i8> %a1, call void @llvm.x86.avx.storeu.dq.256(i8* %a0, <32 x i8> %a2) ret void @@ -2855,14 +4222,22 @@ declare void @llvm.x86.avx.storeu.dq.256(i8*, <32 x i8>) nounwind define void @test_x86_avx_storeu_pd_256(i8* %a0, <4 x double> %a1) { ; add operation forces the execution domain. -; CHECK-LABEL: test_x86_avx_storeu_pd_256: -; CHECK: ## BB#0: -; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax -; CHECK-NEXT: vxorpd %ymm1, %ymm1, %ymm1 -; CHECK-NEXT: vaddpd %ymm1, %ymm0, %ymm0 -; CHECK-NEXT: vmovupd %ymm0, (%eax) -; CHECK-NEXT: vzeroupper -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_avx_storeu_pd_256: +; AVX: ## BB#0: +; AVX-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX-NEXT: vxorpd %ymm1, %ymm1, %ymm1 +; AVX-NEXT: vaddpd %ymm1, %ymm0, %ymm0 +; AVX-NEXT: vmovupd %ymm0, (%eax) +; AVX-NEXT: vzeroupper +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx_storeu_pd_256: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX512VL-NEXT: vpxord %ymm1, %ymm1, %ymm1 +; AVX512VL-NEXT: vaddpd %ymm1, %ymm0, %ymm0 +; AVX512VL-NEXT: vmovups %ymm0, (%eax) +; AVX512VL-NEXT: retl %a2 = fadd <4 x double> %a1, call void @llvm.x86.avx.storeu.pd.256(i8* %a0, <4 x double> %a2) ret void @@ -2871,12 +4246,18 @@ declare void @llvm.x86.avx.storeu.pd.256(i8*, <4 x double>) nounwind define void @test_x86_avx_storeu_ps_256(i8* %a0, <8 x float> %a1) { -; CHECK-LABEL: test_x86_avx_storeu_ps_256: -; CHECK: ## BB#0: -; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax -; CHECK-NEXT: vmovups %ymm0, (%eax) -; CHECK-NEXT: vzeroupper -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_avx_storeu_ps_256: +; AVX: ## BB#0: +; AVX-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX-NEXT: vmovups %ymm0, (%eax) +; AVX-NEXT: vzeroupper +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx_storeu_ps_256: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX512VL-NEXT: vmovups %ymm0, (%eax) +; AVX512VL-NEXT: retl call void @llvm.x86.avx.storeu.ps.256(i8* %a0, <8 x float> %a1) ret void } @@ -2884,11 +4265,17 @@ declare void @llvm.x86.avx.storeu.ps.256(i8*, <8 x float>) nounwind define <4 x double> @test_x86_avx_vbroadcastf128_pd_256(i8* %a0) { -; CHECK-LABEL: test_x86_avx_vbroadcastf128_pd_256: -; CHECK: ## BB#0: -; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax -; CHECK-NEXT: vbroadcastf128 (%eax), %ymm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_avx_vbroadcastf128_pd_256: +; AVX: ## BB#0: +; AVX-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX-NEXT: vbroadcastf128 (%eax), %ymm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx_vbroadcastf128_pd_256: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX512VL-NEXT: vbroadcastf128 (%eax), %ymm0 +; AVX512VL-NEXT: retl %res = call <4 x double> @llvm.x86.avx.vbroadcastf128.pd.256(i8* %a0) ; <<4 x double>> [#uses=1] ret <4 x double> %res } @@ -2896,11 +4283,17 @@ declare <4 x double> @llvm.x86.avx.vbroadcastf128.pd.256(i8*) nounwind readonly define <8 x float> @test_x86_avx_vbroadcastf128_ps_256(i8* %a0) { -; CHECK-LABEL: test_x86_avx_vbroadcastf128_ps_256: -; CHECK: ## BB#0: -; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax -; CHECK-NEXT: vbroadcastf128 (%eax), %ymm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_avx_vbroadcastf128_ps_256: +; AVX: ## BB#0: +; AVX-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX-NEXT: vbroadcastf128 (%eax), %ymm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx_vbroadcastf128_ps_256: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX512VL-NEXT: vbroadcastf128 (%eax), %ymm0 +; AVX512VL-NEXT: retl %res = call <8 x float> @llvm.x86.avx.vbroadcastf128.ps.256(i8* %a0) ; <<8 x float>> [#uses=1] ret <8 x float> %res } @@ -2908,10 +4301,15 @@ declare <8 x float> @llvm.x86.avx.vbroadcastf128.ps.256(i8*) nounwind readonly define <4 x double> @test_x86_avx_vperm2f128_pd_256(<4 x double> %a0, <4 x double> %a1) { -; CHECK-LABEL: test_x86_avx_vperm2f128_pd_256: -; CHECK: ## BB#0: -; CHECK-NEXT: vperm2f128 {{.*#+}} ymm0 = ymm1[2,3],ymm0[0,1] -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_avx_vperm2f128_pd_256: +; AVX: ## BB#0: +; AVX-NEXT: vperm2f128 {{.*#+}} ymm0 = ymm1[2,3],ymm0[0,1] +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx_vperm2f128_pd_256: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vperm2f128 {{.*#+}} ymm0 = ymm1[2,3],ymm0[0,1] +; AVX512VL-NEXT: retl %res = call <4 x double> @llvm.x86.avx.vperm2f128.pd.256(<4 x double> %a0, <4 x double> %a1, i8 7) ; <<4 x double>> [#uses=1] ret <4 x double> %res } @@ -2919,10 +4317,15 @@ declare <4 x double> @llvm.x86.avx.vperm2f128.pd.256(<4 x double>, <4 x double>, define <8 x float> @test_x86_avx_vperm2f128_ps_256(<8 x float> %a0, <8 x float> %a1) { -; CHECK-LABEL: test_x86_avx_vperm2f128_ps_256: -; CHECK: ## BB#0: -; CHECK-NEXT: vperm2f128 {{.*#+}} ymm0 = ymm1[2,3],ymm0[0,1] -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_avx_vperm2f128_ps_256: +; AVX: ## BB#0: +; AVX-NEXT: vperm2f128 {{.*#+}} ymm0 = ymm1[2,3],ymm0[0,1] +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx_vperm2f128_ps_256: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vperm2f128 {{.*#+}} ymm0 = ymm1[2,3],ymm0[0,1] +; AVX512VL-NEXT: retl %res = call <8 x float> @llvm.x86.avx.vperm2f128.ps.256(<8 x float> %a0, <8 x float> %a1, i8 7) ; <<8 x float>> [#uses=1] ret <8 x float> %res } @@ -2930,10 +4333,15 @@ declare <8 x float> @llvm.x86.avx.vperm2f128.ps.256(<8 x float>, <8 x float>, i8 define <8 x i32> @test_x86_avx_vperm2f128_si_256(<8 x i32> %a0, <8 x i32> %a1) { -; CHECK-LABEL: test_x86_avx_vperm2f128_si_256: -; CHECK: ## BB#0: -; CHECK-NEXT: vperm2f128 {{.*#+}} ymm0 = ymm1[2,3],ymm0[0,1] -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_avx_vperm2f128_si_256: +; AVX: ## BB#0: +; AVX-NEXT: vperm2f128 {{.*#+}} ymm0 = ymm1[2,3],ymm0[0,1] +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx_vperm2f128_si_256: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vperm2f128 {{.*#+}} ymm0 = ymm1[2,3],ymm0[0,1] +; AVX512VL-NEXT: retl %res = call <8 x i32> @llvm.x86.avx.vperm2f128.si.256(<8 x i32> %a0, <8 x i32> %a1, i8 7) ; <<8 x i32>> [#uses=1] ret <8 x i32> %res } @@ -2941,10 +4349,15 @@ declare <8 x i32> @llvm.x86.avx.vperm2f128.si.256(<8 x i32>, <8 x i32>, i8) noun define <2 x double> @test_x86_avx_vpermil_pd(<2 x double> %a0) { -; CHECK-LABEL: test_x86_avx_vpermil_pd: -; CHECK: ## BB#0: -; CHECK-NEXT: vpermilpd {{.*#+}} xmm0 = xmm0[1,0] -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_avx_vpermil_pd: +; AVX: ## BB#0: +; AVX-NEXT: vpermilpd {{.*#+}} xmm0 = xmm0[1,0] +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx_vpermil_pd: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpermilpd {{.*#+}} xmm0 = xmm0[1,0] +; AVX512VL-NEXT: retl %res = call <2 x double> @llvm.x86.avx.vpermil.pd(<2 x double> %a0, i8 1) ; <<2 x double>> [#uses=1] ret <2 x double> %res } @@ -2952,10 +4365,15 @@ declare <2 x double> @llvm.x86.avx.vpermil.pd(<2 x double>, i8) nounwind readnon define <4 x double> @test_x86_avx_vpermil_pd_256(<4 x double> %a0) { -; CHECK-LABEL: test_x86_avx_vpermil_pd_256: -; CHECK: ## BB#0: -; CHECK-NEXT: vpermilpd {{.*#+}} ymm0 = ymm0[1,1,3,2] -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_avx_vpermil_pd_256: +; AVX: ## BB#0: +; AVX-NEXT: vpermilpd {{.*#+}} ymm0 = ymm0[1,1,3,2] +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx_vpermil_pd_256: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpermilpd {{.*#+}} ymm0 = ymm0[1,1,3,2] +; AVX512VL-NEXT: retl %res = call <4 x double> @llvm.x86.avx.vpermil.pd.256(<4 x double> %a0, i8 7) ; <<4 x double>> [#uses=1] ret <4 x double> %res } @@ -2963,10 +4381,15 @@ declare <4 x double> @llvm.x86.avx.vpermil.pd.256(<4 x double>, i8) nounwind rea define <4 x float> @test_x86_avx_vpermil_ps(<4 x float> %a0) { -; CHECK-LABEL: test_x86_avx_vpermil_ps: -; CHECK: ## BB#0: -; CHECK-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[3,1,0,0] -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_avx_vpermil_ps: +; AVX: ## BB#0: +; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[3,1,0,0] +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx_vpermil_ps: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[3,1,0,0] +; AVX512VL-NEXT: retl %res = call <4 x float> @llvm.x86.avx.vpermil.ps(<4 x float> %a0, i8 7) ; <<4 x float>> [#uses=1] ret <4 x float> %res } @@ -2974,10 +4397,15 @@ declare <4 x float> @llvm.x86.avx.vpermil.ps(<4 x float>, i8) nounwind readnone define <8 x float> @test_x86_avx_vpermil_ps_256(<8 x float> %a0) { -; CHECK-LABEL: test_x86_avx_vpermil_ps_256: -; CHECK: ## BB#0: -; CHECK-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[3,1,0,0,7,5,4,4] -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_avx_vpermil_ps_256: +; AVX: ## BB#0: +; AVX-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[3,1,0,0,7,5,4,4] +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx_vpermil_ps_256: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[3,1,0,0,7,5,4,4] +; AVX512VL-NEXT: retl %res = call <8 x float> @llvm.x86.avx.vpermil.ps.256(<8 x float> %a0, i8 7) ; <<8 x float>> [#uses=1] ret <8 x float> %res } @@ -2985,10 +4413,15 @@ declare <8 x float> @llvm.x86.avx.vpermil.ps.256(<8 x float>, i8) nounwind readn define <2 x double> @test_x86_avx_vpermilvar_pd(<2 x double> %a0, <2 x i64> %a1) { -; CHECK-LABEL: test_x86_avx_vpermilvar_pd: -; CHECK: ## BB#0: -; CHECK-NEXT: vpermilpd %xmm1, %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_avx_vpermilvar_pd: +; AVX: ## BB#0: +; AVX-NEXT: vpermilpd %xmm1, %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx_vpermilvar_pd: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpermilpd %xmm1, %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <2 x double> @llvm.x86.avx.vpermilvar.pd(<2 x double> %a0, <2 x i64> %a1) ; <<2 x double>> [#uses=1] ret <2 x double> %res } @@ -2996,38 +4429,59 @@ declare <2 x double> @llvm.x86.avx.vpermilvar.pd(<2 x double>, <2 x i64>) nounwi define <4 x double> @test_x86_avx_vpermilvar_pd_256(<4 x double> %a0, <4 x i64> %a1) { -; CHECK-LABEL: test_x86_avx_vpermilvar_pd_256: -; CHECK: ## BB#0: -; CHECK-NEXT: vpermilpd %ymm1, %ymm0, %ymm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_avx_vpermilvar_pd_256: +; AVX: ## BB#0: +; AVX-NEXT: vpermilpd %ymm1, %ymm0, %ymm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx_vpermilvar_pd_256: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpermilpd %ymm1, %ymm0, %ymm0 +; AVX512VL-NEXT: retl %res = call <4 x double> @llvm.x86.avx.vpermilvar.pd.256(<4 x double> %a0, <4 x i64> %a1) ; <<4 x double>> [#uses=1] ret <4 x double> %res } declare <4 x double> @llvm.x86.avx.vpermilvar.pd.256(<4 x double>, <4 x i64>) nounwind readnone define <4 x double> @test_x86_avx_vpermilvar_pd_256_2(<4 x double> %a0) { -; CHECK-LABEL: test_x86_avx_vpermilvar_pd_256_2: -; CHECK: ## BB#0: -; CHECK-NEXT: vpermilpd {{.*#+}} ymm0 = ymm0[1,0,2,3] -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_avx_vpermilvar_pd_256_2: +; AVX: ## BB#0: +; AVX-NEXT: vpermilpd {{.*#+}} ymm0 = ymm0[1,0,2,3] +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx_vpermilvar_pd_256_2: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpermilpd LCPI250_0, %ymm0, %ymm0 +; AVX512VL-NEXT: retl %res = call <4 x double> @llvm.x86.avx.vpermilvar.pd.256(<4 x double> %a0, <4 x i64> ) ; <<4 x double>> [#uses=1] ret <4 x double> %res } define <4 x float> @test_x86_avx_vpermilvar_ps(<4 x float> %a0, <4 x i32> %a1) { -; CHECK-LABEL: test_x86_avx_vpermilvar_ps: -; CHECK: ## BB#0: -; CHECK-NEXT: vpermilps %xmm1, %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_avx_vpermilvar_ps: +; AVX: ## BB#0: +; AVX-NEXT: vpermilps %xmm1, %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx_vpermilvar_ps: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpermilps %xmm1, %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <4 x float> @llvm.x86.avx.vpermilvar.ps(<4 x float> %a0, <4 x i32> %a1) ; <<4 x float>> [#uses=1] ret <4 x float> %res } define <4 x float> @test_x86_avx_vpermilvar_ps_load(<4 x float> %a0, <4 x i32>* %a1) { -; CHECK-LABEL: test_x86_avx_vpermilvar_ps_load: -; CHECK: ## BB#0: -; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax -; CHECK-NEXT: vpermilps (%eax), %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_avx_vpermilvar_ps_load: +; AVX: ## BB#0: +; AVX-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX-NEXT: vpermilps (%eax), %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx_vpermilvar_ps_load: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX512VL-NEXT: vpermilps (%eax), %xmm0, %xmm0 +; AVX512VL-NEXT: retl %a2 = load <4 x i32>, <4 x i32>* %a1 %res = call <4 x float> @llvm.x86.avx.vpermilvar.ps(<4 x float> %a0, <4 x i32> %a2) ; <<4 x float>> [#uses=1] ret <4 x float> %res @@ -3036,10 +4490,15 @@ declare <4 x float> @llvm.x86.avx.vpermilvar.ps(<4 x float>, <4 x i32>) nounwind define <8 x float> @test_x86_avx_vpermilvar_ps_256(<8 x float> %a0, <8 x i32> %a1) { -; CHECK-LABEL: test_x86_avx_vpermilvar_ps_256: -; CHECK: ## BB#0: -; CHECK-NEXT: vpermilps %ymm1, %ymm0, %ymm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_avx_vpermilvar_ps_256: +; AVX: ## BB#0: +; AVX-NEXT: vpermilps %ymm1, %ymm0, %ymm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx_vpermilvar_ps_256: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpermilps %ymm1, %ymm0, %ymm0 +; AVX512VL-NEXT: retl %res = call <8 x float> @llvm.x86.avx.vpermilvar.ps.256(<8 x float> %a0, <8 x i32> %a1) ; <<8 x float>> [#uses=1] ret <8 x float> %res } @@ -3047,12 +4506,19 @@ declare <8 x float> @llvm.x86.avx.vpermilvar.ps.256(<8 x float>, <8 x i32>) noun define i32 @test_x86_avx_vtestc_pd(<2 x double> %a0, <2 x double> %a1) { -; CHECK-LABEL: test_x86_avx_vtestc_pd: -; CHECK: ## BB#0: -; CHECK-NEXT: vtestpd %xmm1, %xmm0 -; CHECK-NEXT: sbbl %eax, %eax -; CHECK-NEXT: andl $1, %eax -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_avx_vtestc_pd: +; AVX: ## BB#0: +; AVX-NEXT: vtestpd %xmm1, %xmm0 +; AVX-NEXT: sbbl %eax, %eax +; AVX-NEXT: andl $1, %eax +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx_vtestc_pd: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vtestpd %xmm1, %xmm0 +; AVX512VL-NEXT: sbbl %eax, %eax +; AVX512VL-NEXT: andl $1, %eax +; AVX512VL-NEXT: retl %res = call i32 @llvm.x86.avx.vtestc.pd(<2 x double> %a0, <2 x double> %a1) ; [#uses=1] ret i32 %res } @@ -3060,13 +4526,20 @@ declare i32 @llvm.x86.avx.vtestc.pd(<2 x double>, <2 x double>) nounwind readnon define i32 @test_x86_avx_vtestc_pd_256(<4 x double> %a0, <4 x double> %a1) { -; CHECK-LABEL: test_x86_avx_vtestc_pd_256: -; CHECK: ## BB#0: -; CHECK-NEXT: vtestpd %ymm1, %ymm0 -; CHECK-NEXT: sbbl %eax, %eax -; CHECK-NEXT: andl $1, %eax -; CHECK-NEXT: vzeroupper -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_avx_vtestc_pd_256: +; AVX: ## BB#0: +; AVX-NEXT: vtestpd %ymm1, %ymm0 +; AVX-NEXT: sbbl %eax, %eax +; AVX-NEXT: andl $1, %eax +; AVX-NEXT: vzeroupper +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx_vtestc_pd_256: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vtestpd %ymm1, %ymm0 +; AVX512VL-NEXT: sbbl %eax, %eax +; AVX512VL-NEXT: andl $1, %eax +; AVX512VL-NEXT: retl %res = call i32 @llvm.x86.avx.vtestc.pd.256(<4 x double> %a0, <4 x double> %a1) ; [#uses=1] ret i32 %res } @@ -3074,12 +4547,19 @@ declare i32 @llvm.x86.avx.vtestc.pd.256(<4 x double>, <4 x double>) nounwind rea define i32 @test_x86_avx_vtestc_ps(<4 x float> %a0, <4 x float> %a1) { -; CHECK-LABEL: test_x86_avx_vtestc_ps: -; CHECK: ## BB#0: -; CHECK-NEXT: vtestps %xmm1, %xmm0 -; CHECK-NEXT: sbbl %eax, %eax -; CHECK-NEXT: andl $1, %eax -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_avx_vtestc_ps: +; AVX: ## BB#0: +; AVX-NEXT: vtestps %xmm1, %xmm0 +; AVX-NEXT: sbbl %eax, %eax +; AVX-NEXT: andl $1, %eax +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx_vtestc_ps: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vtestps %xmm1, %xmm0 +; AVX512VL-NEXT: sbbl %eax, %eax +; AVX512VL-NEXT: andl $1, %eax +; AVX512VL-NEXT: retl %res = call i32 @llvm.x86.avx.vtestc.ps(<4 x float> %a0, <4 x float> %a1) ; [#uses=1] ret i32 %res } @@ -3087,13 +4567,20 @@ declare i32 @llvm.x86.avx.vtestc.ps(<4 x float>, <4 x float>) nounwind readnone define i32 @test_x86_avx_vtestc_ps_256(<8 x float> %a0, <8 x float> %a1) { -; CHECK-LABEL: test_x86_avx_vtestc_ps_256: -; CHECK: ## BB#0: -; CHECK-NEXT: vtestps %ymm1, %ymm0 -; CHECK-NEXT: sbbl %eax, %eax -; CHECK-NEXT: andl $1, %eax -; CHECK-NEXT: vzeroupper -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_avx_vtestc_ps_256: +; AVX: ## BB#0: +; AVX-NEXT: vtestps %ymm1, %ymm0 +; AVX-NEXT: sbbl %eax, %eax +; AVX-NEXT: andl $1, %eax +; AVX-NEXT: vzeroupper +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx_vtestc_ps_256: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vtestps %ymm1, %ymm0 +; AVX512VL-NEXT: sbbl %eax, %eax +; AVX512VL-NEXT: andl $1, %eax +; AVX512VL-NEXT: retl %res = call i32 @llvm.x86.avx.vtestc.ps.256(<8 x float> %a0, <8 x float> %a1) ; [#uses=1] ret i32 %res } @@ -3101,12 +4588,19 @@ declare i32 @llvm.x86.avx.vtestc.ps.256(<8 x float>, <8 x float>) nounwind readn define i32 @test_x86_avx_vtestnzc_pd(<2 x double> %a0, <2 x double> %a1) { -; CHECK-LABEL: test_x86_avx_vtestnzc_pd: -; CHECK: ## BB#0: -; CHECK-NEXT: vtestpd %xmm1, %xmm0 -; CHECK-NEXT: seta %al -; CHECK-NEXT: movzbl %al, %eax -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_avx_vtestnzc_pd: +; AVX: ## BB#0: +; AVX-NEXT: vtestpd %xmm1, %xmm0 +; AVX-NEXT: seta %al +; AVX-NEXT: movzbl %al, %eax +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx_vtestnzc_pd: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vtestpd %xmm1, %xmm0 +; AVX512VL-NEXT: seta %al +; AVX512VL-NEXT: movzbl %al, %eax +; AVX512VL-NEXT: retl %res = call i32 @llvm.x86.avx.vtestnzc.pd(<2 x double> %a0, <2 x double> %a1) ; [#uses=1] ret i32 %res } @@ -3114,13 +4608,20 @@ declare i32 @llvm.x86.avx.vtestnzc.pd(<2 x double>, <2 x double>) nounwind readn define i32 @test_x86_avx_vtestnzc_pd_256(<4 x double> %a0, <4 x double> %a1) { -; CHECK-LABEL: test_x86_avx_vtestnzc_pd_256: -; CHECK: ## BB#0: -; CHECK-NEXT: vtestpd %ymm1, %ymm0 -; CHECK-NEXT: seta %al -; CHECK-NEXT: movzbl %al, %eax -; CHECK-NEXT: vzeroupper -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_avx_vtestnzc_pd_256: +; AVX: ## BB#0: +; AVX-NEXT: vtestpd %ymm1, %ymm0 +; AVX-NEXT: seta %al +; AVX-NEXT: movzbl %al, %eax +; AVX-NEXT: vzeroupper +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx_vtestnzc_pd_256: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vtestpd %ymm1, %ymm0 +; AVX512VL-NEXT: seta %al +; AVX512VL-NEXT: movzbl %al, %eax +; AVX512VL-NEXT: retl %res = call i32 @llvm.x86.avx.vtestnzc.pd.256(<4 x double> %a0, <4 x double> %a1) ; [#uses=1] ret i32 %res } @@ -3128,12 +4629,19 @@ declare i32 @llvm.x86.avx.vtestnzc.pd.256(<4 x double>, <4 x double>) nounwind r define i32 @test_x86_avx_vtestnzc_ps(<4 x float> %a0, <4 x float> %a1) { -; CHECK-LABEL: test_x86_avx_vtestnzc_ps: -; CHECK: ## BB#0: -; CHECK-NEXT: vtestps %xmm1, %xmm0 -; CHECK-NEXT: seta %al -; CHECK-NEXT: movzbl %al, %eax -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_avx_vtestnzc_ps: +; AVX: ## BB#0: +; AVX-NEXT: vtestps %xmm1, %xmm0 +; AVX-NEXT: seta %al +; AVX-NEXT: movzbl %al, %eax +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx_vtestnzc_ps: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vtestps %xmm1, %xmm0 +; AVX512VL-NEXT: seta %al +; AVX512VL-NEXT: movzbl %al, %eax +; AVX512VL-NEXT: retl %res = call i32 @llvm.x86.avx.vtestnzc.ps(<4 x float> %a0, <4 x float> %a1) ; [#uses=1] ret i32 %res } @@ -3141,13 +4649,20 @@ declare i32 @llvm.x86.avx.vtestnzc.ps(<4 x float>, <4 x float>) nounwind readnon define i32 @test_x86_avx_vtestnzc_ps_256(<8 x float> %a0, <8 x float> %a1) { -; CHECK-LABEL: test_x86_avx_vtestnzc_ps_256: -; CHECK: ## BB#0: -; CHECK-NEXT: vtestps %ymm1, %ymm0 -; CHECK-NEXT: seta %al -; CHECK-NEXT: movzbl %al, %eax -; CHECK-NEXT: vzeroupper -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_avx_vtestnzc_ps_256: +; AVX: ## BB#0: +; AVX-NEXT: vtestps %ymm1, %ymm0 +; AVX-NEXT: seta %al +; AVX-NEXT: movzbl %al, %eax +; AVX-NEXT: vzeroupper +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx_vtestnzc_ps_256: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vtestps %ymm1, %ymm0 +; AVX512VL-NEXT: seta %al +; AVX512VL-NEXT: movzbl %al, %eax +; AVX512VL-NEXT: retl %res = call i32 @llvm.x86.avx.vtestnzc.ps.256(<8 x float> %a0, <8 x float> %a1) ; [#uses=1] ret i32 %res } @@ -3155,12 +4670,19 @@ declare i32 @llvm.x86.avx.vtestnzc.ps.256(<8 x float>, <8 x float>) nounwind rea define i32 @test_x86_avx_vtestz_pd(<2 x double> %a0, <2 x double> %a1) { -; CHECK-LABEL: test_x86_avx_vtestz_pd: -; CHECK: ## BB#0: -; CHECK-NEXT: vtestpd %xmm1, %xmm0 -; CHECK-NEXT: sete %al -; CHECK-NEXT: movzbl %al, %eax -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_avx_vtestz_pd: +; AVX: ## BB#0: +; AVX-NEXT: vtestpd %xmm1, %xmm0 +; AVX-NEXT: sete %al +; AVX-NEXT: movzbl %al, %eax +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx_vtestz_pd: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vtestpd %xmm1, %xmm0 +; AVX512VL-NEXT: sete %al +; AVX512VL-NEXT: movzbl %al, %eax +; AVX512VL-NEXT: retl %res = call i32 @llvm.x86.avx.vtestz.pd(<2 x double> %a0, <2 x double> %a1) ; [#uses=1] ret i32 %res } @@ -3168,13 +4690,20 @@ declare i32 @llvm.x86.avx.vtestz.pd(<2 x double>, <2 x double>) nounwind readnon define i32 @test_x86_avx_vtestz_pd_256(<4 x double> %a0, <4 x double> %a1) { -; CHECK-LABEL: test_x86_avx_vtestz_pd_256: -; CHECK: ## BB#0: -; CHECK-NEXT: vtestpd %ymm1, %ymm0 -; CHECK-NEXT: sete %al -; CHECK-NEXT: movzbl %al, %eax -; CHECK-NEXT: vzeroupper -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_avx_vtestz_pd_256: +; AVX: ## BB#0: +; AVX-NEXT: vtestpd %ymm1, %ymm0 +; AVX-NEXT: sete %al +; AVX-NEXT: movzbl %al, %eax +; AVX-NEXT: vzeroupper +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx_vtestz_pd_256: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vtestpd %ymm1, %ymm0 +; AVX512VL-NEXT: sete %al +; AVX512VL-NEXT: movzbl %al, %eax +; AVX512VL-NEXT: retl %res = call i32 @llvm.x86.avx.vtestz.pd.256(<4 x double> %a0, <4 x double> %a1) ; [#uses=1] ret i32 %res } @@ -3182,12 +4711,19 @@ declare i32 @llvm.x86.avx.vtestz.pd.256(<4 x double>, <4 x double>) nounwind rea define i32 @test_x86_avx_vtestz_ps(<4 x float> %a0, <4 x float> %a1) { -; CHECK-LABEL: test_x86_avx_vtestz_ps: -; CHECK: ## BB#0: -; CHECK-NEXT: vtestps %xmm1, %xmm0 -; CHECK-NEXT: sete %al -; CHECK-NEXT: movzbl %al, %eax -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_avx_vtestz_ps: +; AVX: ## BB#0: +; AVX-NEXT: vtestps %xmm1, %xmm0 +; AVX-NEXT: sete %al +; AVX-NEXT: movzbl %al, %eax +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx_vtestz_ps: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vtestps %xmm1, %xmm0 +; AVX512VL-NEXT: sete %al +; AVX512VL-NEXT: movzbl %al, %eax +; AVX512VL-NEXT: retl %res = call i32 @llvm.x86.avx.vtestz.ps(<4 x float> %a0, <4 x float> %a1) ; [#uses=1] ret i32 %res } @@ -3195,13 +4731,20 @@ declare i32 @llvm.x86.avx.vtestz.ps(<4 x float>, <4 x float>) nounwind readnone define i32 @test_x86_avx_vtestz_ps_256(<8 x float> %a0, <8 x float> %a1) { -; CHECK-LABEL: test_x86_avx_vtestz_ps_256: -; CHECK: ## BB#0: -; CHECK-NEXT: vtestps %ymm1, %ymm0 -; CHECK-NEXT: sete %al -; CHECK-NEXT: movzbl %al, %eax -; CHECK-NEXT: vzeroupper -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_avx_vtestz_ps_256: +; AVX: ## BB#0: +; AVX-NEXT: vtestps %ymm1, %ymm0 +; AVX-NEXT: sete %al +; AVX-NEXT: movzbl %al, %eax +; AVX-NEXT: vzeroupper +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx_vtestz_ps_256: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vtestps %ymm1, %ymm0 +; AVX512VL-NEXT: sete %al +; AVX512VL-NEXT: movzbl %al, %eax +; AVX512VL-NEXT: retl %res = call i32 @llvm.x86.avx.vtestz.ps.256(<8 x float> %a0, <8 x float> %a1) ; [#uses=1] ret i32 %res } @@ -3209,11 +4752,16 @@ declare i32 @llvm.x86.avx.vtestz.ps.256(<8 x float>, <8 x float>) nounwind readn define void @test_x86_avx_vzeroall() { -; CHECK-LABEL: test_x86_avx_vzeroall: -; CHECK: ## BB#0: -; CHECK-NEXT: vzeroall -; CHECK-NEXT: vzeroupper -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_avx_vzeroall: +; AVX: ## BB#0: +; AVX-NEXT: vzeroall +; AVX-NEXT: vzeroupper +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx_vzeroall: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vzeroall +; AVX512VL-NEXT: retl call void @llvm.x86.avx.vzeroall() ret void } @@ -3221,11 +4769,16 @@ declare void @llvm.x86.avx.vzeroall() nounwind define void @test_x86_avx_vzeroupper() { -; CHECK-LABEL: test_x86_avx_vzeroupper: -; CHECK: ## BB#0: -; CHECK-NEXT: vzeroupper -; CHECK-NEXT: vzeroupper -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_avx_vzeroupper: +; AVX: ## BB#0: +; AVX-NEXT: vzeroupper +; AVX-NEXT: vzeroupper +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx_vzeroupper: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vzeroupper +; AVX512VL-NEXT: retl call void @llvm.x86.avx.vzeroupper() ret void } @@ -3234,113 +4787,175 @@ declare void @llvm.x86.avx.vzeroupper() nounwind ; Make sure instructions with no AVX equivalents, but are associated with SSEX feature flags still work define void @monitor(i8* %P, i32 %E, i32 %H) nounwind { -; CHECK-LABEL: monitor: -; CHECK: ## BB#0: -; CHECK-NEXT: movl {{[0-9]+}}(%esp), %edx -; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx -; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax -; CHECK-NEXT: leal (%eax), %eax -; CHECK-NEXT: monitor -; CHECK-NEXT: retl +; AVX-LABEL: monitor: +; AVX: ## BB#0: +; AVX-NEXT: movl {{[0-9]+}}(%esp), %edx +; AVX-NEXT: movl {{[0-9]+}}(%esp), %ecx +; AVX-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX-NEXT: leal (%eax), %eax +; AVX-NEXT: monitor +; AVX-NEXT: retl +; +; AVX512VL-LABEL: monitor: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %edx +; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %ecx +; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX512VL-NEXT: leal (%eax), %eax +; AVX512VL-NEXT: monitor +; AVX512VL-NEXT: retl tail call void @llvm.x86.sse3.monitor(i8* %P, i32 %E, i32 %H) ret void } declare void @llvm.x86.sse3.monitor(i8*, i32, i32) nounwind define void @mwait(i32 %E, i32 %H) nounwind { -; CHECK-LABEL: mwait: -; CHECK: ## BB#0: -; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx -; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax -; CHECK-NEXT: mwait -; CHECK-NEXT: retl +; AVX-LABEL: mwait: +; AVX: ## BB#0: +; AVX-NEXT: movl {{[0-9]+}}(%esp), %ecx +; AVX-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX-NEXT: mwait +; AVX-NEXT: retl +; +; AVX512VL-LABEL: mwait: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %ecx +; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX512VL-NEXT: mwait +; AVX512VL-NEXT: retl tail call void @llvm.x86.sse3.mwait(i32 %E, i32 %H) ret void } declare void @llvm.x86.sse3.mwait(i32, i32) nounwind define void @sfence() nounwind { -; CHECK-LABEL: sfence: -; CHECK: ## BB#0: -; CHECK-NEXT: sfence -; CHECK-NEXT: retl +; AVX-LABEL: sfence: +; AVX: ## BB#0: +; AVX-NEXT: sfence +; AVX-NEXT: retl +; +; AVX512VL-LABEL: sfence: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: sfence +; AVX512VL-NEXT: retl tail call void @llvm.x86.sse.sfence() ret void } declare void @llvm.x86.sse.sfence() nounwind define void @lfence() nounwind { -; CHECK-LABEL: lfence: -; CHECK: ## BB#0: -; CHECK-NEXT: lfence -; CHECK-NEXT: retl +; AVX-LABEL: lfence: +; AVX: ## BB#0: +; AVX-NEXT: lfence +; AVX-NEXT: retl +; +; AVX512VL-LABEL: lfence: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: lfence +; AVX512VL-NEXT: retl tail call void @llvm.x86.sse2.lfence() ret void } declare void @llvm.x86.sse2.lfence() nounwind define void @mfence() nounwind { -; CHECK-LABEL: mfence: -; CHECK: ## BB#0: -; CHECK-NEXT: mfence -; CHECK-NEXT: retl +; AVX-LABEL: mfence: +; AVX: ## BB#0: +; AVX-NEXT: mfence +; AVX-NEXT: retl +; +; AVX512VL-LABEL: mfence: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: mfence +; AVX512VL-NEXT: retl tail call void @llvm.x86.sse2.mfence() ret void } declare void @llvm.x86.sse2.mfence() nounwind define void @clflush(i8* %p) nounwind { -; CHECK-LABEL: clflush: -; CHECK: ## BB#0: -; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax -; CHECK-NEXT: clflush (%eax) -; CHECK-NEXT: retl +; AVX-LABEL: clflush: +; AVX: ## BB#0: +; AVX-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX-NEXT: clflush (%eax) +; AVX-NEXT: retl +; +; AVX512VL-LABEL: clflush: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX512VL-NEXT: clflush (%eax) +; AVX512VL-NEXT: retl tail call void @llvm.x86.sse2.clflush(i8* %p) ret void } declare void @llvm.x86.sse2.clflush(i8*) nounwind define i32 @crc32_32_8(i32 %a, i8 %b) nounwind { -; CHECK-LABEL: crc32_32_8: -; CHECK: ## BB#0: -; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax -; CHECK-NEXT: crc32b {{[0-9]+}}(%esp), %eax -; CHECK-NEXT: retl +; AVX-LABEL: crc32_32_8: +; AVX: ## BB#0: +; AVX-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX-NEXT: crc32b {{[0-9]+}}(%esp), %eax +; AVX-NEXT: retl +; +; AVX512VL-LABEL: crc32_32_8: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX512VL-NEXT: crc32b {{[0-9]+}}(%esp), %eax +; AVX512VL-NEXT: retl %tmp = call i32 @llvm.x86.sse42.crc32.32.8(i32 %a, i8 %b) ret i32 %tmp } declare i32 @llvm.x86.sse42.crc32.32.8(i32, i8) nounwind define i32 @crc32_32_16(i32 %a, i16 %b) nounwind { -; CHECK-LABEL: crc32_32_16: -; CHECK: ## BB#0: -; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax -; CHECK-NEXT: crc32w {{[0-9]+}}(%esp), %eax -; CHECK-NEXT: retl +; AVX-LABEL: crc32_32_16: +; AVX: ## BB#0: +; AVX-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX-NEXT: crc32w {{[0-9]+}}(%esp), %eax +; AVX-NEXT: retl +; +; AVX512VL-LABEL: crc32_32_16: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX512VL-NEXT: crc32w {{[0-9]+}}(%esp), %eax +; AVX512VL-NEXT: retl %tmp = call i32 @llvm.x86.sse42.crc32.32.16(i32 %a, i16 %b) ret i32 %tmp } declare i32 @llvm.x86.sse42.crc32.32.16(i32, i16) nounwind define i32 @crc32_32_32(i32 %a, i32 %b) nounwind { -; CHECK-LABEL: crc32_32_32: -; CHECK: ## BB#0: -; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax -; CHECK-NEXT: crc32l {{[0-9]+}}(%esp), %eax -; CHECK-NEXT: retl +; AVX-LABEL: crc32_32_32: +; AVX: ## BB#0: +; AVX-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX-NEXT: crc32l {{[0-9]+}}(%esp), %eax +; AVX-NEXT: retl +; +; AVX512VL-LABEL: crc32_32_32: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX512VL-NEXT: crc32l {{[0-9]+}}(%esp), %eax +; AVX512VL-NEXT: retl %tmp = call i32 @llvm.x86.sse42.crc32.32.32(i32 %a, i32 %b) ret i32 %tmp } declare i32 @llvm.x86.sse42.crc32.32.32(i32, i32) nounwind define void @movnt_dq(i8* %p, <2 x i64> %a1) nounwind { -; CHECK-LABEL: movnt_dq: -; CHECK: ## BB#0: -; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax -; CHECK-NEXT: vpaddq LCPI277_0, %xmm0, %xmm0 -; CHECK-NEXT: vmovntdq %ymm0, (%eax) -; CHECK-NEXT: vzeroupper -; CHECK-NEXT: retl +; AVX-LABEL: movnt_dq: +; AVX: ## BB#0: +; AVX-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX-NEXT: vpaddq LCPI277_0, %xmm0, %xmm0 +; AVX-NEXT: vmovntdq %ymm0, (%eax) +; AVX-NEXT: vzeroupper +; AVX-NEXT: retl +; +; AVX512VL-LABEL: movnt_dq: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX512VL-NEXT: vpaddq LCPI277_0, %xmm0, %xmm0 +; AVX512VL-NEXT: vmovntdq %ymm0, (%eax) +; AVX512VL-NEXT: retl %a2 = add <2 x i64> %a1, %a3 = shufflevector <2 x i64> %a2, <2 x i64> undef, <4 x i32> tail call void @llvm.x86.avx.movnt.dq.256(i8* %p, <4 x i64> %a3) nounwind @@ -3349,12 +4964,18 @@ define void @movnt_dq(i8* %p, <2 x i64> %a1) nounwind { declare void @llvm.x86.avx.movnt.dq.256(i8*, <4 x i64>) nounwind define void @movnt_ps(i8* %p, <8 x float> %a) nounwind { -; CHECK-LABEL: movnt_ps: -; CHECK: ## BB#0: -; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax -; CHECK-NEXT: vmovntps %ymm0, (%eax) -; CHECK-NEXT: vzeroupper -; CHECK-NEXT: retl +; AVX-LABEL: movnt_ps: +; AVX: ## BB#0: +; AVX-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX-NEXT: vmovntps %ymm0, (%eax) +; AVX-NEXT: vzeroupper +; AVX-NEXT: retl +; +; AVX512VL-LABEL: movnt_ps: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX512VL-NEXT: vmovntps %ymm0, (%eax) +; AVX512VL-NEXT: retl tail call void @llvm.x86.avx.movnt.ps.256(i8* %p, <8 x float> %a) nounwind ret void } @@ -3362,14 +4983,22 @@ declare void @llvm.x86.avx.movnt.ps.256(i8*, <8 x float>) nounwind define void @movnt_pd(i8* %p, <4 x double> %a1) nounwind { ; add operation forces the execution domain. -; CHECK-LABEL: movnt_pd: -; CHECK: ## BB#0: -; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax -; CHECK-NEXT: vxorpd %ymm1, %ymm1, %ymm1 -; CHECK-NEXT: vaddpd %ymm1, %ymm0, %ymm0 -; CHECK-NEXT: vmovntpd %ymm0, (%eax) -; CHECK-NEXT: vzeroupper -; CHECK-NEXT: retl +; AVX-LABEL: movnt_pd: +; AVX: ## BB#0: +; AVX-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX-NEXT: vxorpd %ymm1, %ymm1, %ymm1 +; AVX-NEXT: vaddpd %ymm1, %ymm0, %ymm0 +; AVX-NEXT: vmovntpd %ymm0, (%eax) +; AVX-NEXT: vzeroupper +; AVX-NEXT: retl +; +; AVX512VL-LABEL: movnt_pd: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX512VL-NEXT: vpxord %ymm1, %ymm1, %ymm1 +; AVX512VL-NEXT: vaddpd %ymm1, %ymm0, %ymm0 +; AVX512VL-NEXT: vmovntpd %ymm0, (%eax) +; AVX512VL-NEXT: retl %a2 = fadd <4 x double> %a1, tail call void @llvm.x86.avx.movnt.pd.256(i8* %p, <4 x double> %a2) nounwind ret void @@ -3379,10 +5008,15 @@ declare void @llvm.x86.avx.movnt.pd.256(i8*, <4 x double>) nounwind ; Check for pclmulqdq define <2 x i64> @test_x86_pclmulqdq(<2 x i64> %a0, <2 x i64> %a1) { -; CHECK-LABEL: test_x86_pclmulqdq: -; CHECK: ## BB#0: -; CHECK-NEXT: vpclmulqdq $0, %xmm1, %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX-LABEL: test_x86_pclmulqdq: +; AVX: ## BB#0: +; AVX-NEXT: vpclmulqdq $0, %xmm1, %xmm0, %xmm0 +; AVX-NEXT: retl +; +; AVX512VL-LABEL: test_x86_pclmulqdq: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpclmulqdq $0, %xmm1, %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <2 x i64> @llvm.x86.pclmulqdq(<2 x i64> %a0, <2 x i64> %a1, i8 0) ; <<2 x i64>> [#uses=1] ret <2 x i64> %res } diff --git a/test/CodeGen/X86/avx-intrinsics-x86_64.ll b/test/CodeGen/X86/avx-intrinsics-x86_64.ll index 5a466fc3250..252574d84d8 100644 --- a/test/CodeGen/X86/avx-intrinsics-x86_64.ll +++ b/test/CodeGen/X86/avx-intrinsics-x86_64.ll @@ -1,4 +1,5 @@ ; RUN: llc < %s -mtriple=x86_64-apple-darwin -march=x86-64 -mcpu=corei7 -mattr=avx | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-apple-darwin -march=x86-64 -mcpu=corei7 -mattr=avx512vl | FileCheck %s define i64 @test_x86_sse2_cvtsd2si64(<2 x double> %a0) { ; CHECK: vcvtsd2si diff --git a/test/CodeGen/X86/avx2-intrinsics-x86.ll b/test/CodeGen/X86/avx2-intrinsics-x86.ll index 130acfe3597..8e96df2cab5 100644 --- a/test/CodeGen/X86/avx2-intrinsics-x86.ll +++ b/test/CodeGen/X86/avx2-intrinsics-x86.ll @@ -1,11 +1,18 @@ +; NOTE: Assertions have been autogenerated by update_llc_test_checks.py ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py -; RUN: llc < %s -mtriple=i686-apple-darwin -mattr=avx2 | FileCheck %s +; RUN: llc < %s -mtriple=i686-apple-darwin -mattr=avx2 | FileCheck %s --check-prefix=AVX2 +; RUN: llc < %s -mtriple=i686-apple-darwin -mattr=avx512vl | FileCheck %s --check-prefix=AVX512VL define <16 x i16> @test_x86_avx2_packssdw(<8 x i32> %a0, <8 x i32> %a1) { -; CHECK-LABEL: test_x86_avx2_packssdw: -; CHECK: ## BB#0: -; CHECK-NEXT: vpackssdw %ymm1, %ymm0, %ymm0 -; CHECK-NEXT: retl +; AVX2-LABEL: test_x86_avx2_packssdw: +; AVX2: ## BB#0: +; AVX2-NEXT: vpackssdw %ymm1, %ymm0, %ymm0 +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx2_packssdw: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpackssdw %ymm1, %ymm0, %ymm0 +; AVX512VL-NEXT: retl %res = call <16 x i16> @llvm.x86.avx2.packssdw(<8 x i32> %a0, <8 x i32> %a1) ; <<16 x i16>> [#uses=1] ret <16 x i16> %res } @@ -13,10 +20,15 @@ declare <16 x i16> @llvm.x86.avx2.packssdw(<8 x i32>, <8 x i32>) nounwind readno define <32 x i8> @test_x86_avx2_packsswb(<16 x i16> %a0, <16 x i16> %a1) { -; CHECK-LABEL: test_x86_avx2_packsswb: -; CHECK: ## BB#0: -; CHECK-NEXT: vpacksswb %ymm1, %ymm0, %ymm0 -; CHECK-NEXT: retl +; AVX2-LABEL: test_x86_avx2_packsswb: +; AVX2: ## BB#0: +; AVX2-NEXT: vpacksswb %ymm1, %ymm0, %ymm0 +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx2_packsswb: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpacksswb %ymm1, %ymm0, %ymm0 +; AVX512VL-NEXT: retl %res = call <32 x i8> @llvm.x86.avx2.packsswb(<16 x i16> %a0, <16 x i16> %a1) ; <<32 x i8>> [#uses=1] ret <32 x i8> %res } @@ -24,10 +36,15 @@ declare <32 x i8> @llvm.x86.avx2.packsswb(<16 x i16>, <16 x i16>) nounwind readn define <32 x i8> @test_x86_avx2_packuswb(<16 x i16> %a0, <16 x i16> %a1) { -; CHECK-LABEL: test_x86_avx2_packuswb: -; CHECK: ## BB#0: -; CHECK-NEXT: vpackuswb %ymm1, %ymm0, %ymm0 -; CHECK-NEXT: retl +; AVX2-LABEL: test_x86_avx2_packuswb: +; AVX2: ## BB#0: +; AVX2-NEXT: vpackuswb %ymm1, %ymm0, %ymm0 +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx2_packuswb: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpackuswb %ymm1, %ymm0, %ymm0 +; AVX512VL-NEXT: retl %res = call <32 x i8> @llvm.x86.avx2.packuswb(<16 x i16> %a0, <16 x i16> %a1) ; <<32 x i8>> [#uses=1] ret <32 x i8> %res } @@ -35,10 +52,15 @@ declare <32 x i8> @llvm.x86.avx2.packuswb(<16 x i16>, <16 x i16>) nounwind readn define <32 x i8> @test_x86_avx2_padds_b(<32 x i8> %a0, <32 x i8> %a1) { -; CHECK-LABEL: test_x86_avx2_padds_b: -; CHECK: ## BB#0: -; CHECK-NEXT: vpaddsb %ymm1, %ymm0, %ymm0 -; CHECK-NEXT: retl +; AVX2-LABEL: test_x86_avx2_padds_b: +; AVX2: ## BB#0: +; AVX2-NEXT: vpaddsb %ymm1, %ymm0, %ymm0 +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx2_padds_b: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpaddsb %ymm1, %ymm0, %ymm0 +; AVX512VL-NEXT: retl %res = call <32 x i8> @llvm.x86.avx2.padds.b(<32 x i8> %a0, <32 x i8> %a1) ; <<32 x i8>> [#uses=1] ret <32 x i8> %res } @@ -46,10 +68,15 @@ declare <32 x i8> @llvm.x86.avx2.padds.b(<32 x i8>, <32 x i8>) nounwind readnone define <16 x i16> @test_x86_avx2_padds_w(<16 x i16> %a0, <16 x i16> %a1) { -; CHECK-LABEL: test_x86_avx2_padds_w: -; CHECK: ## BB#0: -; CHECK-NEXT: vpaddsw %ymm1, %ymm0, %ymm0 -; CHECK-NEXT: retl +; AVX2-LABEL: test_x86_avx2_padds_w: +; AVX2: ## BB#0: +; AVX2-NEXT: vpaddsw %ymm1, %ymm0, %ymm0 +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx2_padds_w: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpaddsw %ymm1, %ymm0, %ymm0 +; AVX512VL-NEXT: retl %res = call <16 x i16> @llvm.x86.avx2.padds.w(<16 x i16> %a0, <16 x i16> %a1) ; <<16 x i16>> [#uses=1] ret <16 x i16> %res } @@ -57,10 +84,15 @@ declare <16 x i16> @llvm.x86.avx2.padds.w(<16 x i16>, <16 x i16>) nounwind readn define <32 x i8> @test_x86_avx2_paddus_b(<32 x i8> %a0, <32 x i8> %a1) { -; CHECK-LABEL: test_x86_avx2_paddus_b: -; CHECK: ## BB#0: -; CHECK-NEXT: vpaddusb %ymm1, %ymm0, %ymm0 -; CHECK-NEXT: retl +; AVX2-LABEL: test_x86_avx2_paddus_b: +; AVX2: ## BB#0: +; AVX2-NEXT: vpaddusb %ymm1, %ymm0, %ymm0 +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx2_paddus_b: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpaddusb %ymm1, %ymm0, %ymm0 +; AVX512VL-NEXT: retl %res = call <32 x i8> @llvm.x86.avx2.paddus.b(<32 x i8> %a0, <32 x i8> %a1) ; <<32 x i8>> [#uses=1] ret <32 x i8> %res } @@ -68,10 +100,15 @@ declare <32 x i8> @llvm.x86.avx2.paddus.b(<32 x i8>, <32 x i8>) nounwind readnon define <16 x i16> @test_x86_avx2_paddus_w(<16 x i16> %a0, <16 x i16> %a1) { -; CHECK-LABEL: test_x86_avx2_paddus_w: -; CHECK: ## BB#0: -; CHECK-NEXT: vpaddusw %ymm1, %ymm0, %ymm0 -; CHECK-NEXT: retl +; AVX2-LABEL: test_x86_avx2_paddus_w: +; AVX2: ## BB#0: +; AVX2-NEXT: vpaddusw %ymm1, %ymm0, %ymm0 +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx2_paddus_w: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpaddusw %ymm1, %ymm0, %ymm0 +; AVX512VL-NEXT: retl %res = call <16 x i16> @llvm.x86.avx2.paddus.w(<16 x i16> %a0, <16 x i16> %a1) ; <<16 x i16>> [#uses=1] ret <16 x i16> %res } @@ -79,10 +116,15 @@ declare <16 x i16> @llvm.x86.avx2.paddus.w(<16 x i16>, <16 x i16>) nounwind read define <32 x i8> @test_x86_avx2_pavg_b(<32 x i8> %a0, <32 x i8> %a1) { -; CHECK-LABEL: test_x86_avx2_pavg_b: -; CHECK: ## BB#0: -; CHECK-NEXT: vpavgb %ymm1, %ymm0, %ymm0 -; CHECK-NEXT: retl +; AVX2-LABEL: test_x86_avx2_pavg_b: +; AVX2: ## BB#0: +; AVX2-NEXT: vpavgb %ymm1, %ymm0, %ymm0 +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx2_pavg_b: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpavgb %ymm1, %ymm0, %ymm0 +; AVX512VL-NEXT: retl %res = call <32 x i8> @llvm.x86.avx2.pavg.b(<32 x i8> %a0, <32 x i8> %a1) ; <<32 x i8>> [#uses=1] ret <32 x i8> %res } @@ -90,10 +132,15 @@ declare <32 x i8> @llvm.x86.avx2.pavg.b(<32 x i8>, <32 x i8>) nounwind readnone define <16 x i16> @test_x86_avx2_pavg_w(<16 x i16> %a0, <16 x i16> %a1) { -; CHECK-LABEL: test_x86_avx2_pavg_w: -; CHECK: ## BB#0: -; CHECK-NEXT: vpavgw %ymm1, %ymm0, %ymm0 -; CHECK-NEXT: retl +; AVX2-LABEL: test_x86_avx2_pavg_w: +; AVX2: ## BB#0: +; AVX2-NEXT: vpavgw %ymm1, %ymm0, %ymm0 +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx2_pavg_w: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpavgw %ymm1, %ymm0, %ymm0 +; AVX512VL-NEXT: retl %res = call <16 x i16> @llvm.x86.avx2.pavg.w(<16 x i16> %a0, <16 x i16> %a1) ; <<16 x i16>> [#uses=1] ret <16 x i16> %res } @@ -101,10 +148,15 @@ declare <16 x i16> @llvm.x86.avx2.pavg.w(<16 x i16>, <16 x i16>) nounwind readno define <8 x i32> @test_x86_avx2_pmadd_wd(<16 x i16> %a0, <16 x i16> %a1) { -; CHECK-LABEL: test_x86_avx2_pmadd_wd: -; CHECK: ## BB#0: -; CHECK-NEXT: vpmaddwd %ymm1, %ymm0, %ymm0 -; CHECK-NEXT: retl +; AVX2-LABEL: test_x86_avx2_pmadd_wd: +; AVX2: ## BB#0: +; AVX2-NEXT: vpmaddwd %ymm1, %ymm0, %ymm0 +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx2_pmadd_wd: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpmaddwd %ymm1, %ymm0, %ymm0 +; AVX512VL-NEXT: retl %res = call <8 x i32> @llvm.x86.avx2.pmadd.wd(<16 x i16> %a0, <16 x i16> %a1) ; <<8 x i32>> [#uses=1] ret <8 x i32> %res } @@ -112,10 +164,15 @@ declare <8 x i32> @llvm.x86.avx2.pmadd.wd(<16 x i16>, <16 x i16>) nounwind readn define <16 x i16> @test_x86_avx2_pmaxs_w(<16 x i16> %a0, <16 x i16> %a1) { -; CHECK-LABEL: test_x86_avx2_pmaxs_w: -; CHECK: ## BB#0: -; CHECK-NEXT: vpmaxsw %ymm1, %ymm0, %ymm0 -; CHECK-NEXT: retl +; AVX2-LABEL: test_x86_avx2_pmaxs_w: +; AVX2: ## BB#0: +; AVX2-NEXT: vpmaxsw %ymm1, %ymm0, %ymm0 +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx2_pmaxs_w: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpmaxsw %ymm1, %ymm0, %ymm0 +; AVX512VL-NEXT: retl %res = call <16 x i16> @llvm.x86.avx2.pmaxs.w(<16 x i16> %a0, <16 x i16> %a1) ; <<16 x i16>> [#uses=1] ret <16 x i16> %res } @@ -123,10 +180,15 @@ declare <16 x i16> @llvm.x86.avx2.pmaxs.w(<16 x i16>, <16 x i16>) nounwind readn define <32 x i8> @test_x86_avx2_pmaxu_b(<32 x i8> %a0, <32 x i8> %a1) { -; CHECK-LABEL: test_x86_avx2_pmaxu_b: -; CHECK: ## BB#0: -; CHECK-NEXT: vpmaxub %ymm1, %ymm0, %ymm0 -; CHECK-NEXT: retl +; AVX2-LABEL: test_x86_avx2_pmaxu_b: +; AVX2: ## BB#0: +; AVX2-NEXT: vpmaxub %ymm1, %ymm0, %ymm0 +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx2_pmaxu_b: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpmaxub %ymm1, %ymm0, %ymm0 +; AVX512VL-NEXT: retl %res = call <32 x i8> @llvm.x86.avx2.pmaxu.b(<32 x i8> %a0, <32 x i8> %a1) ; <<32 x i8>> [#uses=1] ret <32 x i8> %res } @@ -134,10 +196,15 @@ declare <32 x i8> @llvm.x86.avx2.pmaxu.b(<32 x i8>, <32 x i8>) nounwind readnone define <16 x i16> @test_x86_avx2_pmins_w(<16 x i16> %a0, <16 x i16> %a1) { -; CHECK-LABEL: test_x86_avx2_pmins_w: -; CHECK: ## BB#0: -; CHECK-NEXT: vpminsw %ymm1, %ymm0, %ymm0 -; CHECK-NEXT: retl +; AVX2-LABEL: test_x86_avx2_pmins_w: +; AVX2: ## BB#0: +; AVX2-NEXT: vpminsw %ymm1, %ymm0, %ymm0 +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx2_pmins_w: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpminsw %ymm1, %ymm0, %ymm0 +; AVX512VL-NEXT: retl %res = call <16 x i16> @llvm.x86.avx2.pmins.w(<16 x i16> %a0, <16 x i16> %a1) ; <<16 x i16>> [#uses=1] ret <16 x i16> %res } @@ -145,10 +212,15 @@ declare <16 x i16> @llvm.x86.avx2.pmins.w(<16 x i16>, <16 x i16>) nounwind readn define <32 x i8> @test_x86_avx2_pminu_b(<32 x i8> %a0, <32 x i8> %a1) { -; CHECK-LABEL: test_x86_avx2_pminu_b: -; CHECK: ## BB#0: -; CHECK-NEXT: vpminub %ymm1, %ymm0, %ymm0 -; CHECK-NEXT: retl +; AVX2-LABEL: test_x86_avx2_pminu_b: +; AVX2: ## BB#0: +; AVX2-NEXT: vpminub %ymm1, %ymm0, %ymm0 +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx2_pminu_b: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpminub %ymm1, %ymm0, %ymm0 +; AVX512VL-NEXT: retl %res = call <32 x i8> @llvm.x86.avx2.pminu.b(<32 x i8> %a0, <32 x i8> %a1) ; <<32 x i8>> [#uses=1] ret <32 x i8> %res } @@ -156,11 +228,16 @@ declare <32 x i8> @llvm.x86.avx2.pminu.b(<32 x i8>, <32 x i8>) nounwind readnone define i32 @test_x86_avx2_pmovmskb(<32 x i8> %a0) { -; CHECK-LABEL: test_x86_avx2_pmovmskb: -; CHECK: ## BB#0: -; CHECK-NEXT: vpmovmskb %ymm0, %eax -; CHECK-NEXT: vzeroupper -; CHECK-NEXT: retl +; AVX2-LABEL: test_x86_avx2_pmovmskb: +; AVX2: ## BB#0: +; AVX2-NEXT: vpmovmskb %ymm0, %eax +; AVX2-NEXT: vzeroupper +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx2_pmovmskb: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpmovmskb %ymm0, %eax +; AVX512VL-NEXT: retl %res = call i32 @llvm.x86.avx2.pmovmskb(<32 x i8> %a0) ; [#uses=1] ret i32 %res } @@ -168,10 +245,15 @@ declare i32 @llvm.x86.avx2.pmovmskb(<32 x i8>) nounwind readnone define <16 x i16> @test_x86_avx2_pmulh_w(<16 x i16> %a0, <16 x i16> %a1) { -; CHECK-LABEL: test_x86_avx2_pmulh_w: -; CHECK: ## BB#0: -; CHECK-NEXT: vpmulhw %ymm1, %ymm0, %ymm0 -; CHECK-NEXT: retl +; AVX2-LABEL: test_x86_avx2_pmulh_w: +; AVX2: ## BB#0: +; AVX2-NEXT: vpmulhw %ymm1, %ymm0, %ymm0 +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx2_pmulh_w: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpmulhw %ymm1, %ymm0, %ymm0 +; AVX512VL-NEXT: retl %res = call <16 x i16> @llvm.x86.avx2.pmulh.w(<16 x i16> %a0, <16 x i16> %a1) ; <<16 x i16>> [#uses=1] ret <16 x i16> %res } @@ -179,10 +261,15 @@ declare <16 x i16> @llvm.x86.avx2.pmulh.w(<16 x i16>, <16 x i16>) nounwind readn define <16 x i16> @test_x86_avx2_pmulhu_w(<16 x i16> %a0, <16 x i16> %a1) { -; CHECK-LABEL: test_x86_avx2_pmulhu_w: -; CHECK: ## BB#0: -; CHECK-NEXT: vpmulhuw %ymm1, %ymm0, %ymm0 -; CHECK-NEXT: retl +; AVX2-LABEL: test_x86_avx2_pmulhu_w: +; AVX2: ## BB#0: +; AVX2-NEXT: vpmulhuw %ymm1, %ymm0, %ymm0 +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx2_pmulhu_w: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpmulhuw %ymm1, %ymm0, %ymm0 +; AVX512VL-NEXT: retl %res = call <16 x i16> @llvm.x86.avx2.pmulhu.w(<16 x i16> %a0, <16 x i16> %a1) ; <<16 x i16>> [#uses=1] ret <16 x i16> %res } @@ -190,10 +277,15 @@ declare <16 x i16> @llvm.x86.avx2.pmulhu.w(<16 x i16>, <16 x i16>) nounwind read define <4 x i64> @test_x86_avx2_pmulu_dq(<8 x i32> %a0, <8 x i32> %a1) { -; CHECK-LABEL: test_x86_avx2_pmulu_dq: -; CHECK: ## BB#0: -; CHECK-NEXT: vpmuludq %ymm1, %ymm0, %ymm0 -; CHECK-NEXT: retl +; AVX2-LABEL: test_x86_avx2_pmulu_dq: +; AVX2: ## BB#0: +; AVX2-NEXT: vpmuludq %ymm1, %ymm0, %ymm0 +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx2_pmulu_dq: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpmuludq %ymm1, %ymm0, %ymm0 +; AVX512VL-NEXT: retl %res = call <4 x i64> @llvm.x86.avx2.pmulu.dq(<8 x i32> %a0, <8 x i32> %a1) ; <<4 x i64>> [#uses=1] ret <4 x i64> %res } @@ -201,10 +293,15 @@ declare <4 x i64> @llvm.x86.avx2.pmulu.dq(<8 x i32>, <8 x i32>) nounwind readnon define <4 x i64> @test_x86_avx2_psad_bw(<32 x i8> %a0, <32 x i8> %a1) { -; CHECK-LABEL: test_x86_avx2_psad_bw: -; CHECK: ## BB#0: -; CHECK-NEXT: vpsadbw %ymm1, %ymm0, %ymm0 -; CHECK-NEXT: retl +; AVX2-LABEL: test_x86_avx2_psad_bw: +; AVX2: ## BB#0: +; AVX2-NEXT: vpsadbw %ymm1, %ymm0, %ymm0 +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx2_psad_bw: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpsadbw %ymm1, %ymm0, %ymm0 +; AVX512VL-NEXT: retl %res = call <4 x i64> @llvm.x86.avx2.psad.bw(<32 x i8> %a0, <32 x i8> %a1) ; <<4 x i64>> [#uses=1] ret <4 x i64> %res } @@ -212,10 +309,15 @@ declare <4 x i64> @llvm.x86.avx2.psad.bw(<32 x i8>, <32 x i8>) nounwind readnone define <8 x i32> @test_x86_avx2_psll_d(<8 x i32> %a0, <4 x i32> %a1) { -; CHECK-LABEL: test_x86_avx2_psll_d: -; CHECK: ## BB#0: -; CHECK-NEXT: vpslld %xmm1, %ymm0, %ymm0 -; CHECK-NEXT: retl +; AVX2-LABEL: test_x86_avx2_psll_d: +; AVX2: ## BB#0: +; AVX2-NEXT: vpslld %xmm1, %ymm0, %ymm0 +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx2_psll_d: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpslld %xmm1, %ymm0, %ymm0 +; AVX512VL-NEXT: retl %res = call <8 x i32> @llvm.x86.avx2.psll.d(<8 x i32> %a0, <4 x i32> %a1) ; <<8 x i32>> [#uses=1] ret <8 x i32> %res } @@ -223,10 +325,15 @@ declare <8 x i32> @llvm.x86.avx2.psll.d(<8 x i32>, <4 x i32>) nounwind readnone define <4 x i64> @test_x86_avx2_psll_q(<4 x i64> %a0, <2 x i64> %a1) { -; CHECK-LABEL: test_x86_avx2_psll_q: -; CHECK: ## BB#0: -; CHECK-NEXT: vpsllq %xmm1, %ymm0, %ymm0 -; CHECK-NEXT: retl +; AVX2-LABEL: test_x86_avx2_psll_q: +; AVX2: ## BB#0: +; AVX2-NEXT: vpsllq %xmm1, %ymm0, %ymm0 +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx2_psll_q: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpsllq %xmm1, %ymm0, %ymm0 +; AVX512VL-NEXT: retl %res = call <4 x i64> @llvm.x86.avx2.psll.q(<4 x i64> %a0, <2 x i64> %a1) ; <<4 x i64>> [#uses=1] ret <4 x i64> %res } @@ -234,10 +341,15 @@ declare <4 x i64> @llvm.x86.avx2.psll.q(<4 x i64>, <2 x i64>) nounwind readnone define <16 x i16> @test_x86_avx2_psll_w(<16 x i16> %a0, <8 x i16> %a1) { -; CHECK-LABEL: test_x86_avx2_psll_w: -; CHECK: ## BB#0: -; CHECK-NEXT: vpsllw %xmm1, %ymm0, %ymm0 -; CHECK-NEXT: retl +; AVX2-LABEL: test_x86_avx2_psll_w: +; AVX2: ## BB#0: +; AVX2-NEXT: vpsllw %xmm1, %ymm0, %ymm0 +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx2_psll_w: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpsllw %xmm1, %ymm0, %ymm0 +; AVX512VL-NEXT: retl %res = call <16 x i16> @llvm.x86.avx2.psll.w(<16 x i16> %a0, <8 x i16> %a1) ; <<16 x i16>> [#uses=1] ret <16 x i16> %res } @@ -245,10 +357,15 @@ declare <16 x i16> @llvm.x86.avx2.psll.w(<16 x i16>, <8 x i16>) nounwind readnon define <8 x i32> @test_x86_avx2_pslli_d(<8 x i32> %a0) { -; CHECK-LABEL: test_x86_avx2_pslli_d: -; CHECK: ## BB#0: -; CHECK-NEXT: vpslld $7, %ymm0, %ymm0 -; CHECK-NEXT: retl +; AVX2-LABEL: test_x86_avx2_pslli_d: +; AVX2: ## BB#0: +; AVX2-NEXT: vpslld $7, %ymm0, %ymm0 +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx2_pslli_d: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpslld $7, %ymm0, %ymm0 +; AVX512VL-NEXT: retl %res = call <8 x i32> @llvm.x86.avx2.pslli.d(<8 x i32> %a0, i32 7) ; <<8 x i32>> [#uses=1] ret <8 x i32> %res } @@ -256,10 +373,15 @@ declare <8 x i32> @llvm.x86.avx2.pslli.d(<8 x i32>, i32) nounwind readnone define <4 x i64> @test_x86_avx2_pslli_q(<4 x i64> %a0) { -; CHECK-LABEL: test_x86_avx2_pslli_q: -; CHECK: ## BB#0: -; CHECK-NEXT: vpsllq $7, %ymm0, %ymm0 -; CHECK-NEXT: retl +; AVX2-LABEL: test_x86_avx2_pslli_q: +; AVX2: ## BB#0: +; AVX2-NEXT: vpsllq $7, %ymm0, %ymm0 +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx2_pslli_q: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpsllq $7, %ymm0, %ymm0 +; AVX512VL-NEXT: retl %res = call <4 x i64> @llvm.x86.avx2.pslli.q(<4 x i64> %a0, i32 7) ; <<4 x i64>> [#uses=1] ret <4 x i64> %res } @@ -267,10 +389,15 @@ declare <4 x i64> @llvm.x86.avx2.pslli.q(<4 x i64>, i32) nounwind readnone define <16 x i16> @test_x86_avx2_pslli_w(<16 x i16> %a0) { -; CHECK-LABEL: test_x86_avx2_pslli_w: -; CHECK: ## BB#0: -; CHECK-NEXT: vpsllw $7, %ymm0, %ymm0 -; CHECK-NEXT: retl +; AVX2-LABEL: test_x86_avx2_pslli_w: +; AVX2: ## BB#0: +; AVX2-NEXT: vpsllw $7, %ymm0, %ymm0 +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx2_pslli_w: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpsllw $7, %ymm0, %ymm0 +; AVX512VL-NEXT: retl %res = call <16 x i16> @llvm.x86.avx2.pslli.w(<16 x i16> %a0, i32 7) ; <<16 x i16>> [#uses=1] ret <16 x i16> %res } @@ -278,10 +405,15 @@ declare <16 x i16> @llvm.x86.avx2.pslli.w(<16 x i16>, i32) nounwind readnone define <8 x i32> @test_x86_avx2_psra_d(<8 x i32> %a0, <4 x i32> %a1) { -; CHECK-LABEL: test_x86_avx2_psra_d: -; CHECK: ## BB#0: -; CHECK-NEXT: vpsrad %xmm1, %ymm0, %ymm0 -; CHECK-NEXT: retl +; AVX2-LABEL: test_x86_avx2_psra_d: +; AVX2: ## BB#0: +; AVX2-NEXT: vpsrad %xmm1, %ymm0, %ymm0 +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx2_psra_d: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpsrad %xmm1, %ymm0, %ymm0 +; AVX512VL-NEXT: retl %res = call <8 x i32> @llvm.x86.avx2.psra.d(<8 x i32> %a0, <4 x i32> %a1) ; <<8 x i32>> [#uses=1] ret <8 x i32> %res } @@ -289,10 +421,15 @@ declare <8 x i32> @llvm.x86.avx2.psra.d(<8 x i32>, <4 x i32>) nounwind readnone define <16 x i16> @test_x86_avx2_psra_w(<16 x i16> %a0, <8 x i16> %a1) { -; CHECK-LABEL: test_x86_avx2_psra_w: -; CHECK: ## BB#0: -; CHECK-NEXT: vpsraw %xmm1, %ymm0, %ymm0 -; CHECK-NEXT: retl +; AVX2-LABEL: test_x86_avx2_psra_w: +; AVX2: ## BB#0: +; AVX2-NEXT: vpsraw %xmm1, %ymm0, %ymm0 +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx2_psra_w: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpsraw %xmm1, %ymm0, %ymm0 +; AVX512VL-NEXT: retl %res = call <16 x i16> @llvm.x86.avx2.psra.w(<16 x i16> %a0, <8 x i16> %a1) ; <<16 x i16>> [#uses=1] ret <16 x i16> %res } @@ -300,10 +437,15 @@ declare <16 x i16> @llvm.x86.avx2.psra.w(<16 x i16>, <8 x i16>) nounwind readnon define <8 x i32> @test_x86_avx2_psrai_d(<8 x i32> %a0) { -; CHECK-LABEL: test_x86_avx2_psrai_d: -; CHECK: ## BB#0: -; CHECK-NEXT: vpsrad $7, %ymm0, %ymm0 -; CHECK-NEXT: retl +; AVX2-LABEL: test_x86_avx2_psrai_d: +; AVX2: ## BB#0: +; AVX2-NEXT: vpsrad $7, %ymm0, %ymm0 +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx2_psrai_d: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpsrad $7, %ymm0, %ymm0 +; AVX512VL-NEXT: retl %res = call <8 x i32> @llvm.x86.avx2.psrai.d(<8 x i32> %a0, i32 7) ; <<8 x i32>> [#uses=1] ret <8 x i32> %res } @@ -311,10 +453,15 @@ declare <8 x i32> @llvm.x86.avx2.psrai.d(<8 x i32>, i32) nounwind readnone define <16 x i16> @test_x86_avx2_psrai_w(<16 x i16> %a0) { -; CHECK-LABEL: test_x86_avx2_psrai_w: -; CHECK: ## BB#0: -; CHECK-NEXT: vpsraw $7, %ymm0, %ymm0 -; CHECK-NEXT: retl +; AVX2-LABEL: test_x86_avx2_psrai_w: +; AVX2: ## BB#0: +; AVX2-NEXT: vpsraw $7, %ymm0, %ymm0 +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx2_psrai_w: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpsraw $7, %ymm0, %ymm0 +; AVX512VL-NEXT: retl %res = call <16 x i16> @llvm.x86.avx2.psrai.w(<16 x i16> %a0, i32 7) ; <<16 x i16>> [#uses=1] ret <16 x i16> %res } @@ -322,10 +469,15 @@ declare <16 x i16> @llvm.x86.avx2.psrai.w(<16 x i16>, i32) nounwind readnone define <8 x i32> @test_x86_avx2_psrl_d(<8 x i32> %a0, <4 x i32> %a1) { -; CHECK-LABEL: test_x86_avx2_psrl_d: -; CHECK: ## BB#0: -; CHECK-NEXT: vpsrld %xmm1, %ymm0, %ymm0 -; CHECK-NEXT: retl +; AVX2-LABEL: test_x86_avx2_psrl_d: +; AVX2: ## BB#0: +; AVX2-NEXT: vpsrld %xmm1, %ymm0, %ymm0 +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx2_psrl_d: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpsrld %xmm1, %ymm0, %ymm0 +; AVX512VL-NEXT: retl %res = call <8 x i32> @llvm.x86.avx2.psrl.d(<8 x i32> %a0, <4 x i32> %a1) ; <<8 x i32>> [#uses=1] ret <8 x i32> %res } @@ -333,10 +485,15 @@ declare <8 x i32> @llvm.x86.avx2.psrl.d(<8 x i32>, <4 x i32>) nounwind readnone define <4 x i64> @test_x86_avx2_psrl_q(<4 x i64> %a0, <2 x i64> %a1) { -; CHECK-LABEL: test_x86_avx2_psrl_q: -; CHECK: ## BB#0: -; CHECK-NEXT: vpsrlq %xmm1, %ymm0, %ymm0 -; CHECK-NEXT: retl +; AVX2-LABEL: test_x86_avx2_psrl_q: +; AVX2: ## BB#0: +; AVX2-NEXT: vpsrlq %xmm1, %ymm0, %ymm0 +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx2_psrl_q: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpsrlq %xmm1, %ymm0, %ymm0 +; AVX512VL-NEXT: retl %res = call <4 x i64> @llvm.x86.avx2.psrl.q(<4 x i64> %a0, <2 x i64> %a1) ; <<4 x i64>> [#uses=1] ret <4 x i64> %res } @@ -344,10 +501,15 @@ declare <4 x i64> @llvm.x86.avx2.psrl.q(<4 x i64>, <2 x i64>) nounwind readnone define <16 x i16> @test_x86_avx2_psrl_w(<16 x i16> %a0, <8 x i16> %a1) { -; CHECK-LABEL: test_x86_avx2_psrl_w: -; CHECK: ## BB#0: -; CHECK-NEXT: vpsrlw %xmm1, %ymm0, %ymm0 -; CHECK-NEXT: retl +; AVX2-LABEL: test_x86_avx2_psrl_w: +; AVX2: ## BB#0: +; AVX2-NEXT: vpsrlw %xmm1, %ymm0, %ymm0 +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx2_psrl_w: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpsrlw %xmm1, %ymm0, %ymm0 +; AVX512VL-NEXT: retl %res = call <16 x i16> @llvm.x86.avx2.psrl.w(<16 x i16> %a0, <8 x i16> %a1) ; <<16 x i16>> [#uses=1] ret <16 x i16> %res } @@ -355,10 +517,15 @@ declare <16 x i16> @llvm.x86.avx2.psrl.w(<16 x i16>, <8 x i16>) nounwind readnon define <8 x i32> @test_x86_avx2_psrli_d(<8 x i32> %a0) { -; CHECK-LABEL: test_x86_avx2_psrli_d: -; CHECK: ## BB#0: -; CHECK-NEXT: vpsrld $7, %ymm0, %ymm0 -; CHECK-NEXT: retl +; AVX2-LABEL: test_x86_avx2_psrli_d: +; AVX2: ## BB#0: +; AVX2-NEXT: vpsrld $7, %ymm0, %ymm0 +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx2_psrli_d: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpsrld $7, %ymm0, %ymm0 +; AVX512VL-NEXT: retl %res = call <8 x i32> @llvm.x86.avx2.psrli.d(<8 x i32> %a0, i32 7) ; <<8 x i32>> [#uses=1] ret <8 x i32> %res } @@ -366,10 +533,15 @@ declare <8 x i32> @llvm.x86.avx2.psrli.d(<8 x i32>, i32) nounwind readnone define <4 x i64> @test_x86_avx2_psrli_q(<4 x i64> %a0) { -; CHECK-LABEL: test_x86_avx2_psrli_q: -; CHECK: ## BB#0: -; CHECK-NEXT: vpsrlq $7, %ymm0, %ymm0 -; CHECK-NEXT: retl +; AVX2-LABEL: test_x86_avx2_psrli_q: +; AVX2: ## BB#0: +; AVX2-NEXT: vpsrlq $7, %ymm0, %ymm0 +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx2_psrli_q: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpsrlq $7, %ymm0, %ymm0 +; AVX512VL-NEXT: retl %res = call <4 x i64> @llvm.x86.avx2.psrli.q(<4 x i64> %a0, i32 7) ; <<4 x i64>> [#uses=1] ret <4 x i64> %res } @@ -377,10 +549,15 @@ declare <4 x i64> @llvm.x86.avx2.psrli.q(<4 x i64>, i32) nounwind readnone define <16 x i16> @test_x86_avx2_psrli_w(<16 x i16> %a0) { -; CHECK-LABEL: test_x86_avx2_psrli_w: -; CHECK: ## BB#0: -; CHECK-NEXT: vpsrlw $7, %ymm0, %ymm0 -; CHECK-NEXT: retl +; AVX2-LABEL: test_x86_avx2_psrli_w: +; AVX2: ## BB#0: +; AVX2-NEXT: vpsrlw $7, %ymm0, %ymm0 +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx2_psrli_w: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpsrlw $7, %ymm0, %ymm0 +; AVX512VL-NEXT: retl %res = call <16 x i16> @llvm.x86.avx2.psrli.w(<16 x i16> %a0, i32 7) ; <<16 x i16>> [#uses=1] ret <16 x i16> %res } @@ -388,10 +565,15 @@ declare <16 x i16> @llvm.x86.avx2.psrli.w(<16 x i16>, i32) nounwind readnone define <32 x i8> @test_x86_avx2_psubs_b(<32 x i8> %a0, <32 x i8> %a1) { -; CHECK-LABEL: test_x86_avx2_psubs_b: -; CHECK: ## BB#0: -; CHECK-NEXT: vpsubsb %ymm1, %ymm0, %ymm0 -; CHECK-NEXT: retl +; AVX2-LABEL: test_x86_avx2_psubs_b: +; AVX2: ## BB#0: +; AVX2-NEXT: vpsubsb %ymm1, %ymm0, %ymm0 +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx2_psubs_b: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpsubsb %ymm1, %ymm0, %ymm0 +; AVX512VL-NEXT: retl %res = call <32 x i8> @llvm.x86.avx2.psubs.b(<32 x i8> %a0, <32 x i8> %a1) ; <<32 x i8>> [#uses=1] ret <32 x i8> %res } @@ -399,10 +581,15 @@ declare <32 x i8> @llvm.x86.avx2.psubs.b(<32 x i8>, <32 x i8>) nounwind readnone define <16 x i16> @test_x86_avx2_psubs_w(<16 x i16> %a0, <16 x i16> %a1) { -; CHECK-LABEL: test_x86_avx2_psubs_w: -; CHECK: ## BB#0: -; CHECK-NEXT: vpsubsw %ymm1, %ymm0, %ymm0 -; CHECK-NEXT: retl +; AVX2-LABEL: test_x86_avx2_psubs_w: +; AVX2: ## BB#0: +; AVX2-NEXT: vpsubsw %ymm1, %ymm0, %ymm0 +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx2_psubs_w: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpsubsw %ymm1, %ymm0, %ymm0 +; AVX512VL-NEXT: retl %res = call <16 x i16> @llvm.x86.avx2.psubs.w(<16 x i16> %a0, <16 x i16> %a1) ; <<16 x i16>> [#uses=1] ret <16 x i16> %res } @@ -410,10 +597,15 @@ declare <16 x i16> @llvm.x86.avx2.psubs.w(<16 x i16>, <16 x i16>) nounwind readn define <32 x i8> @test_x86_avx2_psubus_b(<32 x i8> %a0, <32 x i8> %a1) { -; CHECK-LABEL: test_x86_avx2_psubus_b: -; CHECK: ## BB#0: -; CHECK-NEXT: vpsubusb %ymm1, %ymm0, %ymm0 -; CHECK-NEXT: retl +; AVX2-LABEL: test_x86_avx2_psubus_b: +; AVX2: ## BB#0: +; AVX2-NEXT: vpsubusb %ymm1, %ymm0, %ymm0 +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx2_psubus_b: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpsubusb %ymm1, %ymm0, %ymm0 +; AVX512VL-NEXT: retl %res = call <32 x i8> @llvm.x86.avx2.psubus.b(<32 x i8> %a0, <32 x i8> %a1) ; <<32 x i8>> [#uses=1] ret <32 x i8> %res } @@ -421,10 +613,15 @@ declare <32 x i8> @llvm.x86.avx2.psubus.b(<32 x i8>, <32 x i8>) nounwind readnon define <16 x i16> @test_x86_avx2_psubus_w(<16 x i16> %a0, <16 x i16> %a1) { -; CHECK-LABEL: test_x86_avx2_psubus_w: -; CHECK: ## BB#0: -; CHECK-NEXT: vpsubusw %ymm1, %ymm0, %ymm0 -; CHECK-NEXT: retl +; AVX2-LABEL: test_x86_avx2_psubus_w: +; AVX2: ## BB#0: +; AVX2-NEXT: vpsubusw %ymm1, %ymm0, %ymm0 +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx2_psubus_w: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpsubusw %ymm1, %ymm0, %ymm0 +; AVX512VL-NEXT: retl %res = call <16 x i16> @llvm.x86.avx2.psubus.w(<16 x i16> %a0, <16 x i16> %a1) ; <<16 x i16>> [#uses=1] ret <16 x i16> %res } @@ -432,10 +629,15 @@ declare <16 x i16> @llvm.x86.avx2.psubus.w(<16 x i16>, <16 x i16>) nounwind read define <32 x i8> @test_x86_avx2_pabs_b(<32 x i8> %a0) { -; CHECK-LABEL: test_x86_avx2_pabs_b: -; CHECK: ## BB#0: -; CHECK-NEXT: vpabsb %ymm0, %ymm0 -; CHECK-NEXT: retl +; AVX2-LABEL: test_x86_avx2_pabs_b: +; AVX2: ## BB#0: +; AVX2-NEXT: vpabsb %ymm0, %ymm0 +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx2_pabs_b: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpabsb %ymm0, %ymm0 +; AVX512VL-NEXT: retl %res = call <32 x i8> @llvm.x86.avx2.pabs.b(<32 x i8> %a0) ; <<32 x i8>> [#uses=1] ret <32 x i8> %res } @@ -443,10 +645,15 @@ declare <32 x i8> @llvm.x86.avx2.pabs.b(<32 x i8>) nounwind readnone define <8 x i32> @test_x86_avx2_pabs_d(<8 x i32> %a0) { -; CHECK-LABEL: test_x86_avx2_pabs_d: -; CHECK: ## BB#0: -; CHECK-NEXT: vpabsd %ymm0, %ymm0 -; CHECK-NEXT: retl +; AVX2-LABEL: test_x86_avx2_pabs_d: +; AVX2: ## BB#0: +; AVX2-NEXT: vpabsd %ymm0, %ymm0 +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx2_pabs_d: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpabsd %ymm0, %ymm0 +; AVX512VL-NEXT: retl %res = call <8 x i32> @llvm.x86.avx2.pabs.d(<8 x i32> %a0) ; <<8 x i32>> [#uses=1] ret <8 x i32> %res } @@ -454,10 +661,15 @@ declare <8 x i32> @llvm.x86.avx2.pabs.d(<8 x i32>) nounwind readnone define <16 x i16> @test_x86_avx2_pabs_w(<16 x i16> %a0) { -; CHECK-LABEL: test_x86_avx2_pabs_w: -; CHECK: ## BB#0: -; CHECK-NEXT: vpabsw %ymm0, %ymm0 -; CHECK-NEXT: retl +; AVX2-LABEL: test_x86_avx2_pabs_w: +; AVX2: ## BB#0: +; AVX2-NEXT: vpabsw %ymm0, %ymm0 +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx2_pabs_w: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpabsw %ymm0, %ymm0 +; AVX512VL-NEXT: retl %res = call <16 x i16> @llvm.x86.avx2.pabs.w(<16 x i16> %a0) ; <<16 x i16>> [#uses=1] ret <16 x i16> %res } @@ -465,10 +677,15 @@ declare <16 x i16> @llvm.x86.avx2.pabs.w(<16 x i16>) nounwind readnone define <8 x i32> @test_x86_avx2_phadd_d(<8 x i32> %a0, <8 x i32> %a1) { -; CHECK-LABEL: test_x86_avx2_phadd_d: -; CHECK: ## BB#0: -; CHECK-NEXT: vphaddd %ymm1, %ymm0, %ymm0 -; CHECK-NEXT: retl +; AVX2-LABEL: test_x86_avx2_phadd_d: +; AVX2: ## BB#0: +; AVX2-NEXT: vphaddd %ymm1, %ymm0, %ymm0 +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx2_phadd_d: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vphaddd %ymm1, %ymm0, %ymm0 +; AVX512VL-NEXT: retl %res = call <8 x i32> @llvm.x86.avx2.phadd.d(<8 x i32> %a0, <8 x i32> %a1) ; <<8 x i32>> [#uses=1] ret <8 x i32> %res } @@ -476,10 +693,15 @@ declare <8 x i32> @llvm.x86.avx2.phadd.d(<8 x i32>, <8 x i32>) nounwind readnone define <16 x i16> @test_x86_avx2_phadd_sw(<16 x i16> %a0, <16 x i16> %a1) { -; CHECK-LABEL: test_x86_avx2_phadd_sw: -; CHECK: ## BB#0: -; CHECK-NEXT: vphaddsw %ymm1, %ymm0, %ymm0 -; CHECK-NEXT: retl +; AVX2-LABEL: test_x86_avx2_phadd_sw: +; AVX2: ## BB#0: +; AVX2-NEXT: vphaddsw %ymm1, %ymm0, %ymm0 +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx2_phadd_sw: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vphaddsw %ymm1, %ymm0, %ymm0 +; AVX512VL-NEXT: retl %res = call <16 x i16> @llvm.x86.avx2.phadd.sw(<16 x i16> %a0, <16 x i16> %a1) ; <<16 x i16>> [#uses=1] ret <16 x i16> %res } @@ -487,10 +709,15 @@ declare <16 x i16> @llvm.x86.avx2.phadd.sw(<16 x i16>, <16 x i16>) nounwind read define <16 x i16> @test_x86_avx2_phadd_w(<16 x i16> %a0, <16 x i16> %a1) { -; CHECK-LABEL: test_x86_avx2_phadd_w: -; CHECK: ## BB#0: -; CHECK-NEXT: vphaddw %ymm1, %ymm0, %ymm0 -; CHECK-NEXT: retl +; AVX2-LABEL: test_x86_avx2_phadd_w: +; AVX2: ## BB#0: +; AVX2-NEXT: vphaddw %ymm1, %ymm0, %ymm0 +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx2_phadd_w: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vphaddw %ymm1, %ymm0, %ymm0 +; AVX512VL-NEXT: retl %res = call <16 x i16> @llvm.x86.avx2.phadd.w(<16 x i16> %a0, <16 x i16> %a1) ; <<16 x i16>> [#uses=1] ret <16 x i16> %res } @@ -498,10 +725,15 @@ declare <16 x i16> @llvm.x86.avx2.phadd.w(<16 x i16>, <16 x i16>) nounwind readn define <8 x i32> @test_x86_avx2_phsub_d(<8 x i32> %a0, <8 x i32> %a1) { -; CHECK-LABEL: test_x86_avx2_phsub_d: -; CHECK: ## BB#0: -; CHECK-NEXT: vphsubd %ymm1, %ymm0, %ymm0 -; CHECK-NEXT: retl +; AVX2-LABEL: test_x86_avx2_phsub_d: +; AVX2: ## BB#0: +; AVX2-NEXT: vphsubd %ymm1, %ymm0, %ymm0 +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx2_phsub_d: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vphsubd %ymm1, %ymm0, %ymm0 +; AVX512VL-NEXT: retl %res = call <8 x i32> @llvm.x86.avx2.phsub.d(<8 x i32> %a0, <8 x i32> %a1) ; <<8 x i32>> [#uses=1] ret <8 x i32> %res } @@ -509,10 +741,15 @@ declare <8 x i32> @llvm.x86.avx2.phsub.d(<8 x i32>, <8 x i32>) nounwind readnone define <16 x i16> @test_x86_avx2_phsub_sw(<16 x i16> %a0, <16 x i16> %a1) { -; CHECK-LABEL: test_x86_avx2_phsub_sw: -; CHECK: ## BB#0: -; CHECK-NEXT: vphsubsw %ymm1, %ymm0, %ymm0 -; CHECK-NEXT: retl +; AVX2-LABEL: test_x86_avx2_phsub_sw: +; AVX2: ## BB#0: +; AVX2-NEXT: vphsubsw %ymm1, %ymm0, %ymm0 +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx2_phsub_sw: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vphsubsw %ymm1, %ymm0, %ymm0 +; AVX512VL-NEXT: retl %res = call <16 x i16> @llvm.x86.avx2.phsub.sw(<16 x i16> %a0, <16 x i16> %a1) ; <<16 x i16>> [#uses=1] ret <16 x i16> %res } @@ -520,10 +757,15 @@ declare <16 x i16> @llvm.x86.avx2.phsub.sw(<16 x i16>, <16 x i16>) nounwind read define <16 x i16> @test_x86_avx2_phsub_w(<16 x i16> %a0, <16 x i16> %a1) { -; CHECK-LABEL: test_x86_avx2_phsub_w: -; CHECK: ## BB#0: -; CHECK-NEXT: vphsubw %ymm1, %ymm0, %ymm0 -; CHECK-NEXT: retl +; AVX2-LABEL: test_x86_avx2_phsub_w: +; AVX2: ## BB#0: +; AVX2-NEXT: vphsubw %ymm1, %ymm0, %ymm0 +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx2_phsub_w: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vphsubw %ymm1, %ymm0, %ymm0 +; AVX512VL-NEXT: retl %res = call <16 x i16> @llvm.x86.avx2.phsub.w(<16 x i16> %a0, <16 x i16> %a1) ; <<16 x i16>> [#uses=1] ret <16 x i16> %res } @@ -531,10 +773,15 @@ declare <16 x i16> @llvm.x86.avx2.phsub.w(<16 x i16>, <16 x i16>) nounwind readn define <16 x i16> @test_x86_avx2_pmadd_ub_sw(<32 x i8> %a0, <32 x i8> %a1) { -; CHECK-LABEL: test_x86_avx2_pmadd_ub_sw: -; CHECK: ## BB#0: -; CHECK-NEXT: vpmaddubsw %ymm1, %ymm0, %ymm0 -; CHECK-NEXT: retl +; AVX2-LABEL: test_x86_avx2_pmadd_ub_sw: +; AVX2: ## BB#0: +; AVX2-NEXT: vpmaddubsw %ymm1, %ymm0, %ymm0 +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx2_pmadd_ub_sw: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpmaddubsw %ymm1, %ymm0, %ymm0 +; AVX512VL-NEXT: retl %res = call <16 x i16> @llvm.x86.avx2.pmadd.ub.sw(<32 x i8> %a0, <32 x i8> %a1) ; <<16 x i16>> [#uses=1] ret <16 x i16> %res } @@ -542,10 +789,15 @@ declare <16 x i16> @llvm.x86.avx2.pmadd.ub.sw(<32 x i8>, <32 x i8>) nounwind rea define <16 x i16> @test_x86_avx2_pmul_hr_sw(<16 x i16> %a0, <16 x i16> %a1) { -; CHECK-LABEL: test_x86_avx2_pmul_hr_sw: -; CHECK: ## BB#0: -; CHECK-NEXT: vpmulhrsw %ymm1, %ymm0, %ymm0 -; CHECK-NEXT: retl +; AVX2-LABEL: test_x86_avx2_pmul_hr_sw: +; AVX2: ## BB#0: +; AVX2-NEXT: vpmulhrsw %ymm1, %ymm0, %ymm0 +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx2_pmul_hr_sw: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpmulhrsw %ymm1, %ymm0, %ymm0 +; AVX512VL-NEXT: retl %res = call <16 x i16> @llvm.x86.avx2.pmul.hr.sw(<16 x i16> %a0, <16 x i16> %a1) ; <<16 x i16>> [#uses=1] ret <16 x i16> %res } @@ -553,10 +805,15 @@ declare <16 x i16> @llvm.x86.avx2.pmul.hr.sw(<16 x i16>, <16 x i16>) nounwind re define <32 x i8> @test_x86_avx2_pshuf_b(<32 x i8> %a0, <32 x i8> %a1) { -; CHECK-LABEL: test_x86_avx2_pshuf_b: -; CHECK: ## BB#0: -; CHECK-NEXT: vpshufb %ymm1, %ymm0, %ymm0 -; CHECK-NEXT: retl +; AVX2-LABEL: test_x86_avx2_pshuf_b: +; AVX2: ## BB#0: +; AVX2-NEXT: vpshufb %ymm1, %ymm0, %ymm0 +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx2_pshuf_b: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpshufb %ymm1, %ymm0, %ymm0 +; AVX512VL-NEXT: retl %res = call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %a0, <32 x i8> %a1) ; <<16 x i8>> [#uses=1] ret <32 x i8> %res } @@ -564,10 +821,15 @@ declare <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8>, <32 x i8>) nounwind readnone define <32 x i8> @test_x86_avx2_psign_b(<32 x i8> %a0, <32 x i8> %a1) { -; CHECK-LABEL: test_x86_avx2_psign_b: -; CHECK: ## BB#0: -; CHECK-NEXT: vpsignb %ymm1, %ymm0, %ymm0 -; CHECK-NEXT: retl +; AVX2-LABEL: test_x86_avx2_psign_b: +; AVX2: ## BB#0: +; AVX2-NEXT: vpsignb %ymm1, %ymm0, %ymm0 +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx2_psign_b: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpsignb %ymm1, %ymm0, %ymm0 +; AVX512VL-NEXT: retl %res = call <32 x i8> @llvm.x86.avx2.psign.b(<32 x i8> %a0, <32 x i8> %a1) ; <<32 x i8>> [#uses=1] ret <32 x i8> %res } @@ -575,10 +837,15 @@ declare <32 x i8> @llvm.x86.avx2.psign.b(<32 x i8>, <32 x i8>) nounwind readnone define <8 x i32> @test_x86_avx2_psign_d(<8 x i32> %a0, <8 x i32> %a1) { -; CHECK-LABEL: test_x86_avx2_psign_d: -; CHECK: ## BB#0: -; CHECK-NEXT: vpsignd %ymm1, %ymm0, %ymm0 -; CHECK-NEXT: retl +; AVX2-LABEL: test_x86_avx2_psign_d: +; AVX2: ## BB#0: +; AVX2-NEXT: vpsignd %ymm1, %ymm0, %ymm0 +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx2_psign_d: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpsignd %ymm1, %ymm0, %ymm0 +; AVX512VL-NEXT: retl %res = call <8 x i32> @llvm.x86.avx2.psign.d(<8 x i32> %a0, <8 x i32> %a1) ; <<4 x i32>> [#uses=1] ret <8 x i32> %res } @@ -586,10 +853,15 @@ declare <8 x i32> @llvm.x86.avx2.psign.d(<8 x i32>, <8 x i32>) nounwind readnone define <16 x i16> @test_x86_avx2_psign_w(<16 x i16> %a0, <16 x i16> %a1) { -; CHECK-LABEL: test_x86_avx2_psign_w: -; CHECK: ## BB#0: -; CHECK-NEXT: vpsignw %ymm1, %ymm0, %ymm0 -; CHECK-NEXT: retl +; AVX2-LABEL: test_x86_avx2_psign_w: +; AVX2: ## BB#0: +; AVX2-NEXT: vpsignw %ymm1, %ymm0, %ymm0 +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx2_psign_w: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpsignw %ymm1, %ymm0, %ymm0 +; AVX512VL-NEXT: retl %res = call <16 x i16> @llvm.x86.avx2.psign.w(<16 x i16> %a0, <16 x i16> %a1) ; <<16 x i16>> [#uses=1] ret <16 x i16> %res } @@ -597,11 +869,17 @@ declare <16 x i16> @llvm.x86.avx2.psign.w(<16 x i16>, <16 x i16>) nounwind readn define <4 x i64> @test_x86_avx2_movntdqa(i8* %a0) { -; CHECK-LABEL: test_x86_avx2_movntdqa: -; CHECK: ## BB#0: -; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax -; CHECK-NEXT: vmovntdqa (%eax), %ymm0 -; CHECK-NEXT: retl +; AVX2-LABEL: test_x86_avx2_movntdqa: +; AVX2: ## BB#0: +; AVX2-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX2-NEXT: vmovntdqa (%eax), %ymm0 +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx2_movntdqa: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX512VL-NEXT: vmovntdqa (%eax), %ymm0 +; AVX512VL-NEXT: retl %res = call <4 x i64> @llvm.x86.avx2.movntdqa(i8* %a0) ; <<4 x i64>> [#uses=1] ret <4 x i64> %res } @@ -609,10 +887,15 @@ declare <4 x i64> @llvm.x86.avx2.movntdqa(i8*) nounwind readonly define <16 x i16> @test_x86_avx2_mpsadbw(<32 x i8> %a0, <32 x i8> %a1) { -; CHECK-LABEL: test_x86_avx2_mpsadbw: -; CHECK: ## BB#0: -; CHECK-NEXT: vmpsadbw $7, %ymm1, %ymm0, %ymm0 -; CHECK-NEXT: retl +; AVX2-LABEL: test_x86_avx2_mpsadbw: +; AVX2: ## BB#0: +; AVX2-NEXT: vmpsadbw $7, %ymm1, %ymm0, %ymm0 +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx2_mpsadbw: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vmpsadbw $7, %ymm1, %ymm0, %ymm0 +; AVX512VL-NEXT: retl %res = call <16 x i16> @llvm.x86.avx2.mpsadbw(<32 x i8> %a0, <32 x i8> %a1, i8 7) ; <<16 x i16>> [#uses=1] ret <16 x i16> %res } @@ -620,10 +903,15 @@ declare <16 x i16> @llvm.x86.avx2.mpsadbw(<32 x i8>, <32 x i8>, i8) nounwind rea define <16 x i16> @test_x86_avx2_packusdw(<8 x i32> %a0, <8 x i32> %a1) { -; CHECK-LABEL: test_x86_avx2_packusdw: -; CHECK: ## BB#0: -; CHECK-NEXT: vpackusdw %ymm1, %ymm0, %ymm0 -; CHECK-NEXT: retl +; AVX2-LABEL: test_x86_avx2_packusdw: +; AVX2: ## BB#0: +; AVX2-NEXT: vpackusdw %ymm1, %ymm0, %ymm0 +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx2_packusdw: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpackusdw %ymm1, %ymm0, %ymm0 +; AVX512VL-NEXT: retl %res = call <16 x i16> @llvm.x86.avx2.packusdw(<8 x i32> %a0, <8 x i32> %a1) ; <<16 x i16>> [#uses=1] ret <16 x i16> %res } @@ -631,10 +919,15 @@ declare <16 x i16> @llvm.x86.avx2.packusdw(<8 x i32>, <8 x i32>) nounwind readno define <32 x i8> @test_x86_avx2_pblendvb(<32 x i8> %a0, <32 x i8> %a1, <32 x i8> %a2) { -; CHECK-LABEL: test_x86_avx2_pblendvb: -; CHECK: ## BB#0: -; CHECK-NEXT: vpblendvb %ymm2, %ymm1, %ymm0, %ymm0 -; CHECK-NEXT: retl +; AVX2-LABEL: test_x86_avx2_pblendvb: +; AVX2: ## BB#0: +; AVX2-NEXT: vpblendvb %ymm2, %ymm1, %ymm0, %ymm0 +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx2_pblendvb: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpblendvb %ymm2, %ymm1, %ymm0, %ymm0 +; AVX512VL-NEXT: retl %res = call <32 x i8> @llvm.x86.avx2.pblendvb(<32 x i8> %a0, <32 x i8> %a1, <32 x i8> %a2) ; <<32 x i8>> [#uses=1] ret <32 x i8> %res } @@ -642,10 +935,15 @@ declare <32 x i8> @llvm.x86.avx2.pblendvb(<32 x i8>, <32 x i8>, <32 x i8>) nounw define <16 x i16> @test_x86_avx2_pblendw(<16 x i16> %a0, <16 x i16> %a1) { -; CHECK-LABEL: test_x86_avx2_pblendw: -; CHECK: ## BB#0: -; CHECK-NEXT: vpblendw {{.*#+}} ymm0 = ymm1[0,1,2],ymm0[3,4,5,6,7],ymm1[8,9,10],ymm0[11,12,13,14,15] -; CHECK-NEXT: retl +; AVX2-LABEL: test_x86_avx2_pblendw: +; AVX2: ## BB#0: +; AVX2-NEXT: vpblendw {{.*#+}} ymm0 = ymm1[0,1,2],ymm0[3,4,5,6,7],ymm1[8,9,10],ymm0[11,12,13,14,15] +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx2_pblendw: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpblendw {{.*#+}} ymm0 = ymm1[0,1,2],ymm0[3,4,5,6,7],ymm1[8,9,10],ymm0[11,12,13,14,15] +; AVX512VL-NEXT: retl %res = call <16 x i16> @llvm.x86.avx2.pblendw(<16 x i16> %a0, <16 x i16> %a1, i8 7) ; <<16 x i16>> [#uses=1] ret <16 x i16> %res } @@ -653,10 +951,15 @@ declare <16 x i16> @llvm.x86.avx2.pblendw(<16 x i16>, <16 x i16>, i8) nounwind r define <32 x i8> @test_x86_avx2_pmaxsb(<32 x i8> %a0, <32 x i8> %a1) { -; CHECK-LABEL: test_x86_avx2_pmaxsb: -; CHECK: ## BB#0: -; CHECK-NEXT: vpmaxsb %ymm1, %ymm0, %ymm0 -; CHECK-NEXT: retl +; AVX2-LABEL: test_x86_avx2_pmaxsb: +; AVX2: ## BB#0: +; AVX2-NEXT: vpmaxsb %ymm1, %ymm0, %ymm0 +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx2_pmaxsb: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpmaxsb %ymm1, %ymm0, %ymm0 +; AVX512VL-NEXT: retl %res = call <32 x i8> @llvm.x86.avx2.pmaxs.b(<32 x i8> %a0, <32 x i8> %a1) ; <<32 x i8>> [#uses=1] ret <32 x i8> %res } @@ -664,10 +967,15 @@ declare <32 x i8> @llvm.x86.avx2.pmaxs.b(<32 x i8>, <32 x i8>) nounwind readnone define <8 x i32> @test_x86_avx2_pmaxsd(<8 x i32> %a0, <8 x i32> %a1) { -; CHECK-LABEL: test_x86_avx2_pmaxsd: -; CHECK: ## BB#0: -; CHECK-NEXT: vpmaxsd %ymm1, %ymm0, %ymm0 -; CHECK-NEXT: retl +; AVX2-LABEL: test_x86_avx2_pmaxsd: +; AVX2: ## BB#0: +; AVX2-NEXT: vpmaxsd %ymm1, %ymm0, %ymm0 +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx2_pmaxsd: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpmaxsd %ymm1, %ymm0, %ymm0 +; AVX512VL-NEXT: retl %res = call <8 x i32> @llvm.x86.avx2.pmaxs.d(<8 x i32> %a0, <8 x i32> %a1) ; <<8 x i32>> [#uses=1] ret <8 x i32> %res } @@ -675,10 +983,15 @@ declare <8 x i32> @llvm.x86.avx2.pmaxs.d(<8 x i32>, <8 x i32>) nounwind readnone define <8 x i32> @test_x86_avx2_pmaxud(<8 x i32> %a0, <8 x i32> %a1) { -; CHECK-LABEL: test_x86_avx2_pmaxud: -; CHECK: ## BB#0: -; CHECK-NEXT: vpmaxud %ymm1, %ymm0, %ymm0 -; CHECK-NEXT: retl +; AVX2-LABEL: test_x86_avx2_pmaxud: +; AVX2: ## BB#0: +; AVX2-NEXT: vpmaxud %ymm1, %ymm0, %ymm0 +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx2_pmaxud: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpmaxud %ymm1, %ymm0, %ymm0 +; AVX512VL-NEXT: retl %res = call <8 x i32> @llvm.x86.avx2.pmaxu.d(<8 x i32> %a0, <8 x i32> %a1) ; <<8 x i32>> [#uses=1] ret <8 x i32> %res } @@ -686,10 +999,15 @@ declare <8 x i32> @llvm.x86.avx2.pmaxu.d(<8 x i32>, <8 x i32>) nounwind readnone define <16 x i16> @test_x86_avx2_pmaxuw(<16 x i16> %a0, <16 x i16> %a1) { -; CHECK-LABEL: test_x86_avx2_pmaxuw: -; CHECK: ## BB#0: -; CHECK-NEXT: vpmaxuw %ymm1, %ymm0, %ymm0 -; CHECK-NEXT: retl +; AVX2-LABEL: test_x86_avx2_pmaxuw: +; AVX2: ## BB#0: +; AVX2-NEXT: vpmaxuw %ymm1, %ymm0, %ymm0 +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx2_pmaxuw: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpmaxuw %ymm1, %ymm0, %ymm0 +; AVX512VL-NEXT: retl %res = call <16 x i16> @llvm.x86.avx2.pmaxu.w(<16 x i16> %a0, <16 x i16> %a1) ; <<16 x i16>> [#uses=1] ret <16 x i16> %res } @@ -697,10 +1015,15 @@ declare <16 x i16> @llvm.x86.avx2.pmaxu.w(<16 x i16>, <16 x i16>) nounwind readn define <32 x i8> @test_x86_avx2_pminsb(<32 x i8> %a0, <32 x i8> %a1) { -; CHECK-LABEL: test_x86_avx2_pminsb: -; CHECK: ## BB#0: -; CHECK-NEXT: vpminsb %ymm1, %ymm0, %ymm0 -; CHECK-NEXT: retl +; AVX2-LABEL: test_x86_avx2_pminsb: +; AVX2: ## BB#0: +; AVX2-NEXT: vpminsb %ymm1, %ymm0, %ymm0 +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx2_pminsb: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpminsb %ymm1, %ymm0, %ymm0 +; AVX512VL-NEXT: retl %res = call <32 x i8> @llvm.x86.avx2.pmins.b(<32 x i8> %a0, <32 x i8> %a1) ; <<32 x i8>> [#uses=1] ret <32 x i8> %res } @@ -708,10 +1031,15 @@ declare <32 x i8> @llvm.x86.avx2.pmins.b(<32 x i8>, <32 x i8>) nounwind readnone define <8 x i32> @test_x86_avx2_pminsd(<8 x i32> %a0, <8 x i32> %a1) { -; CHECK-LABEL: test_x86_avx2_pminsd: -; CHECK: ## BB#0: -; CHECK-NEXT: vpminsd %ymm1, %ymm0, %ymm0 -; CHECK-NEXT: retl +; AVX2-LABEL: test_x86_avx2_pminsd: +; AVX2: ## BB#0: +; AVX2-NEXT: vpminsd %ymm1, %ymm0, %ymm0 +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx2_pminsd: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpminsd %ymm1, %ymm0, %ymm0 +; AVX512VL-NEXT: retl %res = call <8 x i32> @llvm.x86.avx2.pmins.d(<8 x i32> %a0, <8 x i32> %a1) ; <<8 x i32>> [#uses=1] ret <8 x i32> %res } @@ -719,10 +1047,15 @@ declare <8 x i32> @llvm.x86.avx2.pmins.d(<8 x i32>, <8 x i32>) nounwind readnone define <8 x i32> @test_x86_avx2_pminud(<8 x i32> %a0, <8 x i32> %a1) { -; CHECK-LABEL: test_x86_avx2_pminud: -; CHECK: ## BB#0: -; CHECK-NEXT: vpminud %ymm1, %ymm0, %ymm0 -; CHECK-NEXT: retl +; AVX2-LABEL: test_x86_avx2_pminud: +; AVX2: ## BB#0: +; AVX2-NEXT: vpminud %ymm1, %ymm0, %ymm0 +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx2_pminud: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpminud %ymm1, %ymm0, %ymm0 +; AVX512VL-NEXT: retl %res = call <8 x i32> @llvm.x86.avx2.pminu.d(<8 x i32> %a0, <8 x i32> %a1) ; <<8 x i32>> [#uses=1] ret <8 x i32> %res } @@ -730,10 +1063,15 @@ declare <8 x i32> @llvm.x86.avx2.pminu.d(<8 x i32>, <8 x i32>) nounwind readnone define <16 x i16> @test_x86_avx2_pminuw(<16 x i16> %a0, <16 x i16> %a1) { -; CHECK-LABEL: test_x86_avx2_pminuw: -; CHECK: ## BB#0: -; CHECK-NEXT: vpminuw %ymm1, %ymm0, %ymm0 -; CHECK-NEXT: retl +; AVX2-LABEL: test_x86_avx2_pminuw: +; AVX2: ## BB#0: +; AVX2-NEXT: vpminuw %ymm1, %ymm0, %ymm0 +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx2_pminuw: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpminuw %ymm1, %ymm0, %ymm0 +; AVX512VL-NEXT: retl %res = call <16 x i16> @llvm.x86.avx2.pminu.w(<16 x i16> %a0, <16 x i16> %a1) ; <<16 x i16>> [#uses=1] ret <16 x i16> %res } @@ -741,10 +1079,15 @@ declare <16 x i16> @llvm.x86.avx2.pminu.w(<16 x i16>, <16 x i16>) nounwind readn define <8 x i32> @test_x86_avx2_pmovsxbd(<16 x i8> %a0) { -; CHECK-LABEL: test_x86_avx2_pmovsxbd: -; CHECK: ## BB#0: -; CHECK-NEXT: vpmovsxbd %xmm0, %ymm0 -; CHECK-NEXT: retl +; AVX2-LABEL: test_x86_avx2_pmovsxbd: +; AVX2: ## BB#0: +; AVX2-NEXT: vpmovsxbd %xmm0, %ymm0 +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx2_pmovsxbd: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpmovsxbd %xmm0, %ymm0 +; AVX512VL-NEXT: retl %res = call <8 x i32> @llvm.x86.avx2.pmovsxbd(<16 x i8> %a0) ; <<8 x i32>> [#uses=1] ret <8 x i32> %res } @@ -752,10 +1095,15 @@ declare <8 x i32> @llvm.x86.avx2.pmovsxbd(<16 x i8>) nounwind readnone define <4 x i64> @test_x86_avx2_pmovsxbq(<16 x i8> %a0) { -; CHECK-LABEL: test_x86_avx2_pmovsxbq: -; CHECK: ## BB#0: -; CHECK-NEXT: vpmovsxbq %xmm0, %ymm0 -; CHECK-NEXT: retl +; AVX2-LABEL: test_x86_avx2_pmovsxbq: +; AVX2: ## BB#0: +; AVX2-NEXT: vpmovsxbq %xmm0, %ymm0 +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx2_pmovsxbq: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpmovsxbq %xmm0, %ymm0 +; AVX512VL-NEXT: retl %res = call <4 x i64> @llvm.x86.avx2.pmovsxbq(<16 x i8> %a0) ; <<4 x i64>> [#uses=1] ret <4 x i64> %res } @@ -763,10 +1111,15 @@ declare <4 x i64> @llvm.x86.avx2.pmovsxbq(<16 x i8>) nounwind readnone define <16 x i16> @test_x86_avx2_pmovsxbw(<16 x i8> %a0) { -; CHECK-LABEL: test_x86_avx2_pmovsxbw: -; CHECK: ## BB#0: -; CHECK-NEXT: vpmovsxbw %xmm0, %ymm0 -; CHECK-NEXT: retl +; AVX2-LABEL: test_x86_avx2_pmovsxbw: +; AVX2: ## BB#0: +; AVX2-NEXT: vpmovsxbw %xmm0, %ymm0 +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx2_pmovsxbw: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpmovsxbw %xmm0, %ymm0 +; AVX512VL-NEXT: retl %res = call <16 x i16> @llvm.x86.avx2.pmovsxbw(<16 x i8> %a0) ; <<8 x i16>> [#uses=1] ret <16 x i16> %res } @@ -774,10 +1127,15 @@ declare <16 x i16> @llvm.x86.avx2.pmovsxbw(<16 x i8>) nounwind readnone define <4 x i64> @test_x86_avx2_pmovsxdq(<4 x i32> %a0) { -; CHECK-LABEL: test_x86_avx2_pmovsxdq: -; CHECK: ## BB#0: -; CHECK-NEXT: vpmovsxdq %xmm0, %ymm0 -; CHECK-NEXT: retl +; AVX2-LABEL: test_x86_avx2_pmovsxdq: +; AVX2: ## BB#0: +; AVX2-NEXT: vpmovsxdq %xmm0, %ymm0 +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx2_pmovsxdq: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpmovsxdq %xmm0, %ymm0 +; AVX512VL-NEXT: retl %res = call <4 x i64> @llvm.x86.avx2.pmovsxdq(<4 x i32> %a0) ; <<4 x i64>> [#uses=1] ret <4 x i64> %res } @@ -785,10 +1143,15 @@ declare <4 x i64> @llvm.x86.avx2.pmovsxdq(<4 x i32>) nounwind readnone define <8 x i32> @test_x86_avx2_pmovsxwd(<8 x i16> %a0) { -; CHECK-LABEL: test_x86_avx2_pmovsxwd: -; CHECK: ## BB#0: -; CHECK-NEXT: vpmovsxwd %xmm0, %ymm0 -; CHECK-NEXT: retl +; AVX2-LABEL: test_x86_avx2_pmovsxwd: +; AVX2: ## BB#0: +; AVX2-NEXT: vpmovsxwd %xmm0, %ymm0 +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx2_pmovsxwd: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpmovsxwd %xmm0, %ymm0 +; AVX512VL-NEXT: retl %res = call <8 x i32> @llvm.x86.avx2.pmovsxwd(<8 x i16> %a0) ; <<8 x i32>> [#uses=1] ret <8 x i32> %res } @@ -796,10 +1159,15 @@ declare <8 x i32> @llvm.x86.avx2.pmovsxwd(<8 x i16>) nounwind readnone define <4 x i64> @test_x86_avx2_pmovsxwq(<8 x i16> %a0) { -; CHECK-LABEL: test_x86_avx2_pmovsxwq: -; CHECK: ## BB#0: -; CHECK-NEXT: vpmovsxwq %xmm0, %ymm0 -; CHECK-NEXT: retl +; AVX2-LABEL: test_x86_avx2_pmovsxwq: +; AVX2: ## BB#0: +; AVX2-NEXT: vpmovsxwq %xmm0, %ymm0 +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx2_pmovsxwq: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpmovsxwq %xmm0, %ymm0 +; AVX512VL-NEXT: retl %res = call <4 x i64> @llvm.x86.avx2.pmovsxwq(<8 x i16> %a0) ; <<4 x i64>> [#uses=1] ret <4 x i64> %res } @@ -807,10 +1175,15 @@ declare <4 x i64> @llvm.x86.avx2.pmovsxwq(<8 x i16>) nounwind readnone define <8 x i32> @test_x86_avx2_pmovzxbd(<16 x i8> %a0) { -; CHECK-LABEL: test_x86_avx2_pmovzxbd: -; CHECK: ## BB#0: -; CHECK-NEXT: vpmovzxbd {{.*#+}} ymm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero -; CHECK-NEXT: retl +; AVX2-LABEL: test_x86_avx2_pmovzxbd: +; AVX2: ## BB#0: +; AVX2-NEXT: vpmovzxbd {{.*#+}} ymm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx2_pmovzxbd: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpmovzxbd {{.*#+}} ymm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero +; AVX512VL-NEXT: retl %res = call <8 x i32> @llvm.x86.avx2.pmovzxbd(<16 x i8> %a0) ; <<8 x i32>> [#uses=1] ret <8 x i32> %res } @@ -818,10 +1191,15 @@ declare <8 x i32> @llvm.x86.avx2.pmovzxbd(<16 x i8>) nounwind readnone define <4 x i64> @test_x86_avx2_pmovzxbq(<16 x i8> %a0) { -; CHECK-LABEL: test_x86_avx2_pmovzxbq: -; CHECK: ## BB#0: -; CHECK-NEXT: vpmovzxbq {{.*#+}} ymm0 = xmm0[0],zero,zero,zero,zero,zero,zero,zero,xmm0[1],zero,zero,zero,zero,zero,zero,zero,xmm0[2],zero,zero,zero,zero,zero,zero,zero,xmm0[3],zero,zero,zero,zero,zero,zero,zero -; CHECK-NEXT: retl +; AVX2-LABEL: test_x86_avx2_pmovzxbq: +; AVX2: ## BB#0: +; AVX2-NEXT: vpmovzxbq {{.*#+}} ymm0 = xmm0[0],zero,zero,zero,zero,zero,zero,zero,xmm0[1],zero,zero,zero,zero,zero,zero,zero,xmm0[2],zero,zero,zero,zero,zero,zero,zero,xmm0[3],zero,zero,zero,zero,zero,zero,zero +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx2_pmovzxbq: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpmovzxbq {{.*#+}} ymm0 = xmm0[0],zero,zero,zero,zero,zero,zero,zero,xmm0[1],zero,zero,zero,zero,zero,zero,zero,xmm0[2],zero,zero,zero,zero,zero,zero,zero,xmm0[3],zero,zero,zero,zero,zero,zero,zero +; AVX512VL-NEXT: retl %res = call <4 x i64> @llvm.x86.avx2.pmovzxbq(<16 x i8> %a0) ; <<4 x i64>> [#uses=1] ret <4 x i64> %res } @@ -829,10 +1207,15 @@ declare <4 x i64> @llvm.x86.avx2.pmovzxbq(<16 x i8>) nounwind readnone define <16 x i16> @test_x86_avx2_pmovzxbw(<16 x i8> %a0) { -; CHECK-LABEL: test_x86_avx2_pmovzxbw: -; CHECK: ## BB#0: -; CHECK-NEXT: vpmovzxbw {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero -; CHECK-NEXT: retl +; AVX2-LABEL: test_x86_avx2_pmovzxbw: +; AVX2: ## BB#0: +; AVX2-NEXT: vpmovzxbw {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx2_pmovzxbw: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpmovzxbw {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero +; AVX512VL-NEXT: retl %res = call <16 x i16> @llvm.x86.avx2.pmovzxbw(<16 x i8> %a0) ; <<16 x i16>> [#uses=1] ret <16 x i16> %res } @@ -840,10 +1223,15 @@ declare <16 x i16> @llvm.x86.avx2.pmovzxbw(<16 x i8>) nounwind readnone define <4 x i64> @test_x86_avx2_pmovzxdq(<4 x i32> %a0) { -; CHECK-LABEL: test_x86_avx2_pmovzxdq: -; CHECK: ## BB#0: -; CHECK-NEXT: vpmovzxdq {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero -; CHECK-NEXT: retl +; AVX2-LABEL: test_x86_avx2_pmovzxdq: +; AVX2: ## BB#0: +; AVX2-NEXT: vpmovzxdq {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx2_pmovzxdq: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpmovzxdq {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero +; AVX512VL-NEXT: retl %res = call <4 x i64> @llvm.x86.avx2.pmovzxdq(<4 x i32> %a0) ; <<4 x i64>> [#uses=1] ret <4 x i64> %res } @@ -851,10 +1239,15 @@ declare <4 x i64> @llvm.x86.avx2.pmovzxdq(<4 x i32>) nounwind readnone define <8 x i32> @test_x86_avx2_pmovzxwd(<8 x i16> %a0) { -; CHECK-LABEL: test_x86_avx2_pmovzxwd: -; CHECK: ## BB#0: -; CHECK-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero -; CHECK-NEXT: retl +; AVX2-LABEL: test_x86_avx2_pmovzxwd: +; AVX2: ## BB#0: +; AVX2-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx2_pmovzxwd: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero +; AVX512VL-NEXT: retl %res = call <8 x i32> @llvm.x86.avx2.pmovzxwd(<8 x i16> %a0) ; <<8 x i32>> [#uses=1] ret <8 x i32> %res } @@ -862,10 +1255,15 @@ declare <8 x i32> @llvm.x86.avx2.pmovzxwd(<8 x i16>) nounwind readnone define <4 x i64> @test_x86_avx2_pmovzxwq(<8 x i16> %a0) { -; CHECK-LABEL: test_x86_avx2_pmovzxwq: -; CHECK: ## BB#0: -; CHECK-NEXT: vpmovzxwq {{.*#+}} ymm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero -; CHECK-NEXT: retl +; AVX2-LABEL: test_x86_avx2_pmovzxwq: +; AVX2: ## BB#0: +; AVX2-NEXT: vpmovzxwq {{.*#+}} ymm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx2_pmovzxwq: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpmovzxwq {{.*#+}} ymm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero +; AVX512VL-NEXT: retl %res = call <4 x i64> @llvm.x86.avx2.pmovzxwq(<8 x i16> %a0) ; <<4 x i64>> [#uses=1] ret <4 x i64> %res } @@ -873,7 +1271,6 @@ declare <4 x i64> @llvm.x86.avx2.pmovzxwq(<8 x i16>) nounwind readnone define <4 x i64> @test_x86_avx2_pmul.dq(<8 x i32> %a0, <8 x i32> %a1) { - ; CHECK: vpmuldq %res = call <4 x i64> @llvm.x86.avx2.pmul.dq(<8 x i32> %a0, <8 x i32> %a1) ; <<2 x i64>> [#uses=1] ret <4 x i64> %res } @@ -881,10 +1278,15 @@ declare <4 x i64> @llvm.x86.avx2.pmul.dq(<8 x i32>, <8 x i32>) nounwind readnone define <4 x i32> @test_x86_avx2_pblendd_128(<4 x i32> %a0, <4 x i32> %a1) { -; CHECK-LABEL: test_x86_avx2_pblendd_128: -; CHECK: ## BB#0: -; CHECK-NEXT: vpblendd {{.*#+}} xmm0 = xmm1[0,1,2],xmm0[3] -; CHECK-NEXT: retl +; AVX2-LABEL: test_x86_avx2_pblendd_128: +; AVX2: ## BB#0: +; AVX2-NEXT: vpblendd {{.*#+}} xmm0 = xmm1[0,1,2],xmm0[3] +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx2_pblendd_128: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpblendd {{.*#+}} xmm0 = xmm1[0,1,2],xmm0[3] +; AVX512VL-NEXT: retl %res = call <4 x i32> @llvm.x86.avx2.pblendd.128(<4 x i32> %a0, <4 x i32> %a1, i8 7) ; <<4 x i32>> [#uses=1] ret <4 x i32> %res } @@ -892,10 +1294,15 @@ declare <4 x i32> @llvm.x86.avx2.pblendd.128(<4 x i32>, <4 x i32>, i8) nounwind define <8 x i32> @test_x86_avx2_pblendd_256(<8 x i32> %a0, <8 x i32> %a1) { -; CHECK-LABEL: test_x86_avx2_pblendd_256: -; CHECK: ## BB#0: -; CHECK-NEXT: vpblendd {{.*#+}} ymm0 = ymm1[0,1,2],ymm0[3,4,5,6,7] -; CHECK-NEXT: retl +; AVX2-LABEL: test_x86_avx2_pblendd_256: +; AVX2: ## BB#0: +; AVX2-NEXT: vpblendd {{.*#+}} ymm0 = ymm1[0,1,2],ymm0[3,4,5,6,7] +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx2_pblendd_256: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpblendd {{.*#+}} ymm0 = ymm1[0,1,2],ymm0[3,4,5,6,7] +; AVX512VL-NEXT: retl %res = call <8 x i32> @llvm.x86.avx2.pblendd.256(<8 x i32> %a0, <8 x i32> %a1, i8 7) ; <<8 x i32>> [#uses=1] ret <8 x i32> %res } @@ -906,10 +1313,15 @@ declare <8 x i32> @llvm.x86.avx2.pblendd.256(<8 x i32>, <8 x i32>, i8) nounwind ; and its lowering. Indeed, the offsets are the first source in ; the instruction. define <8 x i32> @test_x86_avx2_permd(<8 x i32> %a0, <8 x i32> %a1) { -; CHECK-LABEL: test_x86_avx2_permd: -; CHECK: ## BB#0: -; CHECK-NEXT: vpermd %ymm0, %ymm1, %ymm0 -; CHECK-NEXT: retl +; AVX2-LABEL: test_x86_avx2_permd: +; AVX2: ## BB#0: +; AVX2-NEXT: vpermd %ymm0, %ymm1, %ymm0 +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx2_permd: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpermd %ymm0, %ymm1, %ymm0 +; AVX512VL-NEXT: retl %res = call <8 x i32> @llvm.x86.avx2.permd(<8 x i32> %a0, <8 x i32> %a1) ; <<8 x i32>> [#uses=1] ret <8 x i32> %res } @@ -920,10 +1332,15 @@ declare <8 x i32> @llvm.x86.avx2.permd(<8 x i32>, <8 x i32>) nounwind readonly ; and its lowering. Indeed, the offsets are the first source in ; the instruction. define <8 x float> @test_x86_avx2_permps(<8 x float> %a0, <8 x i32> %a1) { -; CHECK-LABEL: test_x86_avx2_permps: -; CHECK: ## BB#0: -; CHECK-NEXT: vpermps %ymm0, %ymm1, %ymm0 -; CHECK-NEXT: retl +; AVX2-LABEL: test_x86_avx2_permps: +; AVX2: ## BB#0: +; AVX2-NEXT: vpermps %ymm0, %ymm1, %ymm0 +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx2_permps: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpermps %ymm0, %ymm1, %ymm0 +; AVX512VL-NEXT: retl %res = call <8 x float> @llvm.x86.avx2.permps(<8 x float> %a0, <8 x i32> %a1) ; <<8 x float>> [#uses=1] ret <8 x float> %res } @@ -931,10 +1348,15 @@ declare <8 x float> @llvm.x86.avx2.permps(<8 x float>, <8 x i32>) nounwind reado define <4 x i64> @test_x86_avx2_vperm2i128(<4 x i64> %a0, <4 x i64> %a1) { -; CHECK-LABEL: test_x86_avx2_vperm2i128: -; CHECK: ## BB#0: -; CHECK-NEXT: vperm2f128 {{.*#+}} ymm0 = ymm0[2,3,0,1] -; CHECK-NEXT: retl +; AVX2-LABEL: test_x86_avx2_vperm2i128: +; AVX2: ## BB#0: +; AVX2-NEXT: vperm2f128 {{.*#+}} ymm0 = ymm0[2,3,0,1] +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx2_vperm2i128: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vperm2f128 {{.*#+}} ymm0 = ymm0[2,3,0,1] +; AVX512VL-NEXT: retl %res = call <4 x i64> @llvm.x86.avx2.vperm2i128(<4 x i64> %a0, <4 x i64> %a1, i8 1) ; <<4 x i64>> [#uses=1] ret <4 x i64> %res } @@ -942,11 +1364,17 @@ declare <4 x i64> @llvm.x86.avx2.vperm2i128(<4 x i64>, <4 x i64>, i8) nounwind r define <2 x i64> @test_x86_avx2_maskload_q(i8* %a0, <2 x i64> %a1) { -; CHECK-LABEL: test_x86_avx2_maskload_q: -; CHECK: ## BB#0: -; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax -; CHECK-NEXT: vpmaskmovq (%eax), %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX2-LABEL: test_x86_avx2_maskload_q: +; AVX2: ## BB#0: +; AVX2-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX2-NEXT: vpmaskmovq (%eax), %xmm0, %xmm0 +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx2_maskload_q: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX512VL-NEXT: vpmaskmovq (%eax), %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <2 x i64> @llvm.x86.avx2.maskload.q(i8* %a0, <2 x i64> %a1) ; <<2 x i64>> [#uses=1] ret <2 x i64> %res } @@ -954,11 +1382,17 @@ declare <2 x i64> @llvm.x86.avx2.maskload.q(i8*, <2 x i64>) nounwind readonly define <4 x i64> @test_x86_avx2_maskload_q_256(i8* %a0, <4 x i64> %a1) { -; CHECK-LABEL: test_x86_avx2_maskload_q_256: -; CHECK: ## BB#0: -; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax -; CHECK-NEXT: vpmaskmovq (%eax), %ymm0, %ymm0 -; CHECK-NEXT: retl +; AVX2-LABEL: test_x86_avx2_maskload_q_256: +; AVX2: ## BB#0: +; AVX2-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX2-NEXT: vpmaskmovq (%eax), %ymm0, %ymm0 +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx2_maskload_q_256: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX512VL-NEXT: vpmaskmovq (%eax), %ymm0, %ymm0 +; AVX512VL-NEXT: retl %res = call <4 x i64> @llvm.x86.avx2.maskload.q.256(i8* %a0, <4 x i64> %a1) ; <<4 x i64>> [#uses=1] ret <4 x i64> %res } @@ -966,11 +1400,17 @@ declare <4 x i64> @llvm.x86.avx2.maskload.q.256(i8*, <4 x i64>) nounwind readonl define <4 x i32> @test_x86_avx2_maskload_d(i8* %a0, <4 x i32> %a1) { -; CHECK-LABEL: test_x86_avx2_maskload_d: -; CHECK: ## BB#0: -; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax -; CHECK-NEXT: vpmaskmovd (%eax), %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX2-LABEL: test_x86_avx2_maskload_d: +; AVX2: ## BB#0: +; AVX2-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX2-NEXT: vpmaskmovd (%eax), %xmm0, %xmm0 +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx2_maskload_d: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX512VL-NEXT: vpmaskmovd (%eax), %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <4 x i32> @llvm.x86.avx2.maskload.d(i8* %a0, <4 x i32> %a1) ; <<4 x i32>> [#uses=1] ret <4 x i32> %res } @@ -978,11 +1418,17 @@ declare <4 x i32> @llvm.x86.avx2.maskload.d(i8*, <4 x i32>) nounwind readonly define <8 x i32> @test_x86_avx2_maskload_d_256(i8* %a0, <8 x i32> %a1) { -; CHECK-LABEL: test_x86_avx2_maskload_d_256: -; CHECK: ## BB#0: -; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax -; CHECK-NEXT: vpmaskmovd (%eax), %ymm0, %ymm0 -; CHECK-NEXT: retl +; AVX2-LABEL: test_x86_avx2_maskload_d_256: +; AVX2: ## BB#0: +; AVX2-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX2-NEXT: vpmaskmovd (%eax), %ymm0, %ymm0 +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx2_maskload_d_256: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX512VL-NEXT: vpmaskmovd (%eax), %ymm0, %ymm0 +; AVX512VL-NEXT: retl %res = call <8 x i32> @llvm.x86.avx2.maskload.d.256(i8* %a0, <8 x i32> %a1) ; <<8 x i32>> [#uses=1] ret <8 x i32> %res } @@ -990,11 +1436,17 @@ declare <8 x i32> @llvm.x86.avx2.maskload.d.256(i8*, <8 x i32>) nounwind readonl define void @test_x86_avx2_maskstore_q(i8* %a0, <2 x i64> %a1, <2 x i64> %a2) { -; CHECK-LABEL: test_x86_avx2_maskstore_q: -; CHECK: ## BB#0: -; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax -; CHECK-NEXT: vpmaskmovq %xmm1, %xmm0, (%eax) -; CHECK-NEXT: retl +; AVX2-LABEL: test_x86_avx2_maskstore_q: +; AVX2: ## BB#0: +; AVX2-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX2-NEXT: vpmaskmovq %xmm1, %xmm0, (%eax) +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx2_maskstore_q: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX512VL-NEXT: vpmaskmovq %xmm1, %xmm0, (%eax) +; AVX512VL-NEXT: retl call void @llvm.x86.avx2.maskstore.q(i8* %a0, <2 x i64> %a1, <2 x i64> %a2) ret void } @@ -1002,12 +1454,18 @@ declare void @llvm.x86.avx2.maskstore.q(i8*, <2 x i64>, <2 x i64>) nounwind define void @test_x86_avx2_maskstore_q_256(i8* %a0, <4 x i64> %a1, <4 x i64> %a2) { -; CHECK-LABEL: test_x86_avx2_maskstore_q_256: -; CHECK: ## BB#0: -; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax -; CHECK-NEXT: vpmaskmovq %ymm1, %ymm0, (%eax) -; CHECK-NEXT: vzeroupper -; CHECK-NEXT: retl +; AVX2-LABEL: test_x86_avx2_maskstore_q_256: +; AVX2: ## BB#0: +; AVX2-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX2-NEXT: vpmaskmovq %ymm1, %ymm0, (%eax) +; AVX2-NEXT: vzeroupper +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx2_maskstore_q_256: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX512VL-NEXT: vpmaskmovq %ymm1, %ymm0, (%eax) +; AVX512VL-NEXT: retl call void @llvm.x86.avx2.maskstore.q.256(i8* %a0, <4 x i64> %a1, <4 x i64> %a2) ret void } @@ -1015,11 +1473,17 @@ declare void @llvm.x86.avx2.maskstore.q.256(i8*, <4 x i64>, <4 x i64>) nounwind define void @test_x86_avx2_maskstore_d(i8* %a0, <4 x i32> %a1, <4 x i32> %a2) { -; CHECK-LABEL: test_x86_avx2_maskstore_d: -; CHECK: ## BB#0: -; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax -; CHECK-NEXT: vpmaskmovd %xmm1, %xmm0, (%eax) -; CHECK-NEXT: retl +; AVX2-LABEL: test_x86_avx2_maskstore_d: +; AVX2: ## BB#0: +; AVX2-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX2-NEXT: vpmaskmovd %xmm1, %xmm0, (%eax) +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx2_maskstore_d: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX512VL-NEXT: vpmaskmovd %xmm1, %xmm0, (%eax) +; AVX512VL-NEXT: retl call void @llvm.x86.avx2.maskstore.d(i8* %a0, <4 x i32> %a1, <4 x i32> %a2) ret void } @@ -1027,12 +1491,18 @@ declare void @llvm.x86.avx2.maskstore.d(i8*, <4 x i32>, <4 x i32>) nounwind define void @test_x86_avx2_maskstore_d_256(i8* %a0, <8 x i32> %a1, <8 x i32> %a2) { -; CHECK-LABEL: test_x86_avx2_maskstore_d_256: -; CHECK: ## BB#0: -; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax -; CHECK-NEXT: vpmaskmovd %ymm1, %ymm0, (%eax) -; CHECK-NEXT: vzeroupper -; CHECK-NEXT: retl +; AVX2-LABEL: test_x86_avx2_maskstore_d_256: +; AVX2: ## BB#0: +; AVX2-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX2-NEXT: vpmaskmovd %ymm1, %ymm0, (%eax) +; AVX2-NEXT: vzeroupper +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx2_maskstore_d_256: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX512VL-NEXT: vpmaskmovd %ymm1, %ymm0, (%eax) +; AVX512VL-NEXT: retl call void @llvm.x86.avx2.maskstore.d.256(i8* %a0, <8 x i32> %a1, <8 x i32> %a2) ret void } @@ -1040,10 +1510,15 @@ declare void @llvm.x86.avx2.maskstore.d.256(i8*, <8 x i32>, <8 x i32>) nounwind define <4 x i32> @test_x86_avx2_psllv_d(<4 x i32> %a0, <4 x i32> %a1) { -; CHECK-LABEL: test_x86_avx2_psllv_d: -; CHECK: ## BB#0: -; CHECK-NEXT: vpsllvd %xmm1, %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX2-LABEL: test_x86_avx2_psllv_d: +; AVX2: ## BB#0: +; AVX2-NEXT: vpsllvd %xmm1, %xmm0, %xmm0 +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx2_psllv_d: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpsllvd %xmm1, %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <4 x i32> @llvm.x86.avx2.psllv.d(<4 x i32> %a0, <4 x i32> %a1) ; <<4 x i32>> [#uses=1] ret <4 x i32> %res } @@ -1051,10 +1526,15 @@ declare <4 x i32> @llvm.x86.avx2.psllv.d(<4 x i32>, <4 x i32>) nounwind readnone define <8 x i32> @test_x86_avx2_psllv_d_256(<8 x i32> %a0, <8 x i32> %a1) { -; CHECK-LABEL: test_x86_avx2_psllv_d_256: -; CHECK: ## BB#0: -; CHECK-NEXT: vpsllvd %ymm1, %ymm0, %ymm0 -; CHECK-NEXT: retl +; AVX2-LABEL: test_x86_avx2_psllv_d_256: +; AVX2: ## BB#0: +; AVX2-NEXT: vpsllvd %ymm1, %ymm0, %ymm0 +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx2_psllv_d_256: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpsllvd %ymm1, %ymm0, %ymm0 +; AVX512VL-NEXT: retl %res = call <8 x i32> @llvm.x86.avx2.psllv.d.256(<8 x i32> %a0, <8 x i32> %a1) ; <<8 x i32>> [#uses=1] ret <8 x i32> %res } @@ -1062,10 +1542,15 @@ declare <8 x i32> @llvm.x86.avx2.psllv.d.256(<8 x i32>, <8 x i32>) nounwind read define <2 x i64> @test_x86_avx2_psllv_q(<2 x i64> %a0, <2 x i64> %a1) { -; CHECK-LABEL: test_x86_avx2_psllv_q: -; CHECK: ## BB#0: -; CHECK-NEXT: vpsllvq %xmm1, %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX2-LABEL: test_x86_avx2_psllv_q: +; AVX2: ## BB#0: +; AVX2-NEXT: vpsllvq %xmm1, %xmm0, %xmm0 +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx2_psllv_q: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpsllvq %xmm1, %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <2 x i64> @llvm.x86.avx2.psllv.q(<2 x i64> %a0, <2 x i64> %a1) ; <<2 x i64>> [#uses=1] ret <2 x i64> %res } @@ -1073,10 +1558,15 @@ declare <2 x i64> @llvm.x86.avx2.psllv.q(<2 x i64>, <2 x i64>) nounwind readnone define <4 x i64> @test_x86_avx2_psllv_q_256(<4 x i64> %a0, <4 x i64> %a1) { -; CHECK-LABEL: test_x86_avx2_psllv_q_256: -; CHECK: ## BB#0: -; CHECK-NEXT: vpsllvq %ymm1, %ymm0, %ymm0 -; CHECK-NEXT: retl +; AVX2-LABEL: test_x86_avx2_psllv_q_256: +; AVX2: ## BB#0: +; AVX2-NEXT: vpsllvq %ymm1, %ymm0, %ymm0 +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx2_psllv_q_256: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpsllvq %ymm1, %ymm0, %ymm0 +; AVX512VL-NEXT: retl %res = call <4 x i64> @llvm.x86.avx2.psllv.q.256(<4 x i64> %a0, <4 x i64> %a1) ; <<4 x i64>> [#uses=1] ret <4 x i64> %res } @@ -1084,10 +1574,15 @@ declare <4 x i64> @llvm.x86.avx2.psllv.q.256(<4 x i64>, <4 x i64>) nounwind read define <4 x i32> @test_x86_avx2_psrlv_d(<4 x i32> %a0, <4 x i32> %a1) { -; CHECK-LABEL: test_x86_avx2_psrlv_d: -; CHECK: ## BB#0: -; CHECK-NEXT: vpsrlvd %xmm1, %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX2-LABEL: test_x86_avx2_psrlv_d: +; AVX2: ## BB#0: +; AVX2-NEXT: vpsrlvd %xmm1, %xmm0, %xmm0 +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx2_psrlv_d: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpsrlvd %xmm1, %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <4 x i32> @llvm.x86.avx2.psrlv.d(<4 x i32> %a0, <4 x i32> %a1) ; <<4 x i32>> [#uses=1] ret <4 x i32> %res } @@ -1095,10 +1590,15 @@ declare <4 x i32> @llvm.x86.avx2.psrlv.d(<4 x i32>, <4 x i32>) nounwind readnone define <8 x i32> @test_x86_avx2_psrlv_d_256(<8 x i32> %a0, <8 x i32> %a1) { -; CHECK-LABEL: test_x86_avx2_psrlv_d_256: -; CHECK: ## BB#0: -; CHECK-NEXT: vpsrlvd %ymm1, %ymm0, %ymm0 -; CHECK-NEXT: retl +; AVX2-LABEL: test_x86_avx2_psrlv_d_256: +; AVX2: ## BB#0: +; AVX2-NEXT: vpsrlvd %ymm1, %ymm0, %ymm0 +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx2_psrlv_d_256: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpsrlvd %ymm1, %ymm0, %ymm0 +; AVX512VL-NEXT: retl %res = call <8 x i32> @llvm.x86.avx2.psrlv.d.256(<8 x i32> %a0, <8 x i32> %a1) ; <<8 x i32>> [#uses=1] ret <8 x i32> %res } @@ -1106,10 +1606,15 @@ declare <8 x i32> @llvm.x86.avx2.psrlv.d.256(<8 x i32>, <8 x i32>) nounwind read define <2 x i64> @test_x86_avx2_psrlv_q(<2 x i64> %a0, <2 x i64> %a1) { -; CHECK-LABEL: test_x86_avx2_psrlv_q: -; CHECK: ## BB#0: -; CHECK-NEXT: vpsrlvq %xmm1, %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX2-LABEL: test_x86_avx2_psrlv_q: +; AVX2: ## BB#0: +; AVX2-NEXT: vpsrlvq %xmm1, %xmm0, %xmm0 +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx2_psrlv_q: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpsrlvq %xmm1, %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <2 x i64> @llvm.x86.avx2.psrlv.q(<2 x i64> %a0, <2 x i64> %a1) ; <<2 x i64>> [#uses=1] ret <2 x i64> %res } @@ -1117,10 +1622,15 @@ declare <2 x i64> @llvm.x86.avx2.psrlv.q(<2 x i64>, <2 x i64>) nounwind readnone define <4 x i64> @test_x86_avx2_psrlv_q_256(<4 x i64> %a0, <4 x i64> %a1) { -; CHECK-LABEL: test_x86_avx2_psrlv_q_256: -; CHECK: ## BB#0: -; CHECK-NEXT: vpsrlvq %ymm1, %ymm0, %ymm0 -; CHECK-NEXT: retl +; AVX2-LABEL: test_x86_avx2_psrlv_q_256: +; AVX2: ## BB#0: +; AVX2-NEXT: vpsrlvq %ymm1, %ymm0, %ymm0 +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx2_psrlv_q_256: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpsrlvq %ymm1, %ymm0, %ymm0 +; AVX512VL-NEXT: retl %res = call <4 x i64> @llvm.x86.avx2.psrlv.q.256(<4 x i64> %a0, <4 x i64> %a1) ; <<4 x i64>> [#uses=1] ret <4 x i64> %res } @@ -1128,10 +1638,15 @@ declare <4 x i64> @llvm.x86.avx2.psrlv.q.256(<4 x i64>, <4 x i64>) nounwind read define <4 x i32> @test_x86_avx2_psrav_d(<4 x i32> %a0, <4 x i32> %a1) { -; CHECK-LABEL: test_x86_avx2_psrav_d: -; CHECK: ## BB#0: -; CHECK-NEXT: vpsravd %xmm1, %xmm0, %xmm0 -; CHECK-NEXT: retl +; AVX2-LABEL: test_x86_avx2_psrav_d: +; AVX2: ## BB#0: +; AVX2-NEXT: vpsravd %xmm1, %xmm0, %xmm0 +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx2_psrav_d: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpsravd %xmm1, %xmm0, %xmm0 +; AVX512VL-NEXT: retl %res = call <4 x i32> @llvm.x86.avx2.psrav.d(<4 x i32> %a0, <4 x i32> %a1) ; <<4 x i32>> [#uses=1] ret <4 x i32> %res } @@ -1139,10 +1654,15 @@ declare <4 x i32> @llvm.x86.avx2.psrav.d(<4 x i32>, <4 x i32>) nounwind readnone define <8 x i32> @test_x86_avx2_psrav_d_256(<8 x i32> %a0, <8 x i32> %a1) { -; CHECK-LABEL: test_x86_avx2_psrav_d_256: -; CHECK: ## BB#0: -; CHECK-NEXT: vpsravd %ymm1, %ymm0, %ymm0 -; CHECK-NEXT: retl +; AVX2-LABEL: test_x86_avx2_psrav_d_256: +; AVX2: ## BB#0: +; AVX2-NEXT: vpsravd %ymm1, %ymm0, %ymm0 +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx2_psrav_d_256: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: vpsravd %ymm1, %ymm0, %ymm0 +; AVX512VL-NEXT: retl %res = call <8 x i32> @llvm.x86.avx2.psrav.d.256(<8 x i32> %a0, <8 x i32> %a1) ; <<8 x i32>> [#uses=1] ret <8 x i32> %res } @@ -1150,14 +1670,21 @@ declare <8 x i32> @llvm.x86.avx2.psrav.d.256(<8 x i32>, <8 x i32>) nounwind read ; This is checked here because the execution dependency fix pass makes it hard to test in AVX mode since we don't have 256-bit integer instructions define void @test_x86_avx_storeu_dq_256(i8* %a0, <32 x i8> %a1) { -; CHECK-LABEL: test_x86_avx_storeu_dq_256: -; CHECK: ## BB#0: -; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax -; CHECK-NEXT: vpaddb LCPI103_0, %ymm0, %ymm0 -; CHECK-NEXT: vmovdqu %ymm0, (%eax) -; CHECK-NEXT: vzeroupper -; CHECK-NEXT: retl ; add operation forces the execution domain. +; AVX2-LABEL: test_x86_avx_storeu_dq_256: +; AVX2: ## BB#0: +; AVX2-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX2-NEXT: vpaddb LCPI103_0, %ymm0, %ymm0 +; AVX2-NEXT: vmovdqu %ymm0, (%eax) +; AVX2-NEXT: vzeroupper +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx_storeu_dq_256: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX512VL-NEXT: vpaddb LCPI103_0, %ymm0, %ymm0 +; AVX512VL-NEXT: vmovdqu %ymm0, (%eax) +; AVX512VL-NEXT: retl %a2 = add <32 x i8> %a1, call void @llvm.x86.avx.storeu.dq.256(i8* %a0, <32 x i8> %a2) ret void @@ -1165,11 +1692,17 @@ define void @test_x86_avx_storeu_dq_256(i8* %a0, <32 x i8> %a1) { declare void @llvm.x86.avx.storeu.dq.256(i8*, <32 x i8>) nounwind define <2 x double> @test_x86_avx2_gather_d_pd(<2 x double> %a0, i8* %a1, <4 x i32> %idx, <2 x double> %mask) { -; CHECK-LABEL: test_x86_avx2_gather_d_pd: -; CHECK: ## BB#0: -; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax -; CHECK-NEXT: vgatherdpd %xmm2, (%eax,%xmm1,2), %xmm0 -; CHECK-NEXT: retl +; AVX2-LABEL: test_x86_avx2_gather_d_pd: +; AVX2: ## BB#0: +; AVX2-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX2-NEXT: vgatherdpd %xmm2, (%eax,%xmm1,2), %xmm0 +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx2_gather_d_pd: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX512VL-NEXT: vgatherdpd %xmm2, (%eax,%xmm1,2), %xmm0 +; AVX512VL-NEXT: retl %res = call <2 x double> @llvm.x86.avx2.gather.d.pd(<2 x double> %a0, i8* %a1, <4 x i32> %idx, <2 x double> %mask, i8 2) ; ret <2 x double> %res @@ -1178,11 +1711,17 @@ declare <2 x double> @llvm.x86.avx2.gather.d.pd(<2 x double>, i8*, <4 x i32>, <2 x double>, i8) nounwind readonly define <4 x double> @test_x86_avx2_gather_d_pd_256(<4 x double> %a0, i8* %a1, <4 x i32> %idx, <4 x double> %mask) { -; CHECK-LABEL: test_x86_avx2_gather_d_pd_256: -; CHECK: ## BB#0: -; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax -; CHECK-NEXT: vgatherdpd %ymm2, (%eax,%xmm1,2), %ymm0 -; CHECK-NEXT: retl +; AVX2-LABEL: test_x86_avx2_gather_d_pd_256: +; AVX2: ## BB#0: +; AVX2-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX2-NEXT: vgatherdpd %ymm2, (%eax,%xmm1,2), %ymm0 +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx2_gather_d_pd_256: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX512VL-NEXT: vgatherdpd %ymm2, (%eax,%xmm1,2), %ymm0 +; AVX512VL-NEXT: retl %res = call <4 x double> @llvm.x86.avx2.gather.d.pd.256(<4 x double> %a0, i8* %a1, <4 x i32> %idx, <4 x double> %mask, i8 2) ; ret <4 x double> %res @@ -1191,11 +1730,17 @@ declare <4 x double> @llvm.x86.avx2.gather.d.pd.256(<4 x double>, i8*, <4 x i32>, <4 x double>, i8) nounwind readonly define <2 x double> @test_x86_avx2_gather_q_pd(<2 x double> %a0, i8* %a1, <2 x i64> %idx, <2 x double> %mask) { -; CHECK-LABEL: test_x86_avx2_gather_q_pd: -; CHECK: ## BB#0: -; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax -; CHECK-NEXT: vgatherqpd %xmm2, (%eax,%xmm1,2), %xmm0 -; CHECK-NEXT: retl +; AVX2-LABEL: test_x86_avx2_gather_q_pd: +; AVX2: ## BB#0: +; AVX2-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX2-NEXT: vgatherqpd %xmm2, (%eax,%xmm1,2), %xmm0 +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx2_gather_q_pd: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX512VL-NEXT: vgatherqpd %xmm2, (%eax,%xmm1,2), %xmm0 +; AVX512VL-NEXT: retl %res = call <2 x double> @llvm.x86.avx2.gather.q.pd(<2 x double> %a0, i8* %a1, <2 x i64> %idx, <2 x double> %mask, i8 2) ; ret <2 x double> %res @@ -1204,11 +1749,17 @@ declare <2 x double> @llvm.x86.avx2.gather.q.pd(<2 x double>, i8*, <2 x i64>, <2 x double>, i8) nounwind readonly define <4 x double> @test_x86_avx2_gather_q_pd_256(<4 x double> %a0, i8* %a1, <4 x i64> %idx, <4 x double> %mask) { -; CHECK-LABEL: test_x86_avx2_gather_q_pd_256: -; CHECK: ## BB#0: -; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax -; CHECK-NEXT: vgatherqpd %ymm2, (%eax,%ymm1,2), %ymm0 -; CHECK-NEXT: retl +; AVX2-LABEL: test_x86_avx2_gather_q_pd_256: +; AVX2: ## BB#0: +; AVX2-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX2-NEXT: vgatherqpd %ymm2, (%eax,%ymm1,2), %ymm0 +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx2_gather_q_pd_256: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX512VL-NEXT: vgatherqpd %ymm2, (%eax,%ymm1,2), %ymm0 +; AVX512VL-NEXT: retl %res = call <4 x double> @llvm.x86.avx2.gather.q.pd.256(<4 x double> %a0, i8* %a1, <4 x i64> %idx, <4 x double> %mask, i8 2) ; ret <4 x double> %res @@ -1217,11 +1768,17 @@ declare <4 x double> @llvm.x86.avx2.gather.q.pd.256(<4 x double>, i8*, <4 x i64>, <4 x double>, i8) nounwind readonly define <4 x float> @test_x86_avx2_gather_d_ps(<4 x float> %a0, i8* %a1, <4 x i32> %idx, <4 x float> %mask) { -; CHECK-LABEL: test_x86_avx2_gather_d_ps: -; CHECK: ## BB#0: -; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax -; CHECK-NEXT: vgatherdps %xmm2, (%eax,%xmm1,2), %xmm0 -; CHECK-NEXT: retl +; AVX2-LABEL: test_x86_avx2_gather_d_ps: +; AVX2: ## BB#0: +; AVX2-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX2-NEXT: vgatherdps %xmm2, (%eax,%xmm1,2), %xmm0 +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx2_gather_d_ps: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX512VL-NEXT: vgatherdps %xmm2, (%eax,%xmm1,2), %xmm0 +; AVX512VL-NEXT: retl %res = call <4 x float> @llvm.x86.avx2.gather.d.ps(<4 x float> %a0, i8* %a1, <4 x i32> %idx, <4 x float> %mask, i8 2) ; ret <4 x float> %res @@ -1230,11 +1787,17 @@ declare <4 x float> @llvm.x86.avx2.gather.d.ps(<4 x float>, i8*, <4 x i32>, <4 x float>, i8) nounwind readonly define <8 x float> @test_x86_avx2_gather_d_ps_256(<8 x float> %a0, i8* %a1, <8 x i32> %idx, <8 x float> %mask) { -; CHECK-LABEL: test_x86_avx2_gather_d_ps_256: -; CHECK: ## BB#0: -; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax -; CHECK-NEXT: vgatherdps %ymm2, (%eax,%ymm1,2), %ymm0 -; CHECK-NEXT: retl +; AVX2-LABEL: test_x86_avx2_gather_d_ps_256: +; AVX2: ## BB#0: +; AVX2-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX2-NEXT: vgatherdps %ymm2, (%eax,%ymm1,2), %ymm0 +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx2_gather_d_ps_256: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX512VL-NEXT: vgatherdps %ymm2, (%eax,%ymm1,2), %ymm0 +; AVX512VL-NEXT: retl %res = call <8 x float> @llvm.x86.avx2.gather.d.ps.256(<8 x float> %a0, i8* %a1, <8 x i32> %idx, <8 x float> %mask, i8 2) ; ret <8 x float> %res @@ -1243,11 +1806,17 @@ declare <8 x float> @llvm.x86.avx2.gather.d.ps.256(<8 x float>, i8*, <8 x i32>, <8 x float>, i8) nounwind readonly define <4 x float> @test_x86_avx2_gather_q_ps(<4 x float> %a0, i8* %a1, <2 x i64> %idx, <4 x float> %mask) { -; CHECK-LABEL: test_x86_avx2_gather_q_ps: -; CHECK: ## BB#0: -; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax -; CHECK-NEXT: vgatherqps %xmm2, (%eax,%xmm1,2), %xmm0 -; CHECK-NEXT: retl +; AVX2-LABEL: test_x86_avx2_gather_q_ps: +; AVX2: ## BB#0: +; AVX2-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX2-NEXT: vgatherqps %xmm2, (%eax,%xmm1,2), %xmm0 +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx2_gather_q_ps: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX512VL-NEXT: vgatherqps %xmm2, (%eax,%xmm1,2), %xmm0 +; AVX512VL-NEXT: retl %res = call <4 x float> @llvm.x86.avx2.gather.q.ps(<4 x float> %a0, i8* %a1, <2 x i64> %idx, <4 x float> %mask, i8 2) ; ret <4 x float> %res @@ -1256,12 +1825,18 @@ declare <4 x float> @llvm.x86.avx2.gather.q.ps(<4 x float>, i8*, <2 x i64>, <4 x float>, i8) nounwind readonly define <4 x float> @test_x86_avx2_gather_q_ps_256(<4 x float> %a0, i8* %a1, <4 x i64> %idx, <4 x float> %mask) { -; CHECK-LABEL: test_x86_avx2_gather_q_ps_256: -; CHECK: ## BB#0: -; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax -; CHECK-NEXT: vgatherqps %xmm2, (%eax,%ymm1,2), %xmm0 -; CHECK-NEXT: vzeroupper -; CHECK-NEXT: retl +; AVX2-LABEL: test_x86_avx2_gather_q_ps_256: +; AVX2: ## BB#0: +; AVX2-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX2-NEXT: vgatherqps %xmm2, (%eax,%ymm1,2), %xmm0 +; AVX2-NEXT: vzeroupper +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx2_gather_q_ps_256: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX512VL-NEXT: vgatherqps %xmm2, (%eax,%ymm1,2), %xmm0 +; AVX512VL-NEXT: retl %res = call <4 x float> @llvm.x86.avx2.gather.q.ps.256(<4 x float> %a0, i8* %a1, <4 x i64> %idx, <4 x float> %mask, i8 2) ; ret <4 x float> %res @@ -1270,11 +1845,17 @@ declare <4 x float> @llvm.x86.avx2.gather.q.ps.256(<4 x float>, i8*, <4 x i64>, <4 x float>, i8) nounwind readonly define <2 x i64> @test_x86_avx2_gather_d_q(<2 x i64> %a0, i8* %a1, <4 x i32> %idx, <2 x i64> %mask) { -; CHECK-LABEL: test_x86_avx2_gather_d_q: -; CHECK: ## BB#0: -; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax -; CHECK-NEXT: vpgatherdq %xmm2, (%eax,%xmm1,2), %xmm0 -; CHECK-NEXT: retl +; AVX2-LABEL: test_x86_avx2_gather_d_q: +; AVX2: ## BB#0: +; AVX2-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX2-NEXT: vpgatherdq %xmm2, (%eax,%xmm1,2), %xmm0 +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx2_gather_d_q: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX512VL-NEXT: vpgatherdq %xmm2, (%eax,%xmm1,2), %xmm0 +; AVX512VL-NEXT: retl %res = call <2 x i64> @llvm.x86.avx2.gather.d.q(<2 x i64> %a0, i8* %a1, <4 x i32> %idx, <2 x i64> %mask, i8 2) ; ret <2 x i64> %res @@ -1283,11 +1864,17 @@ declare <2 x i64> @llvm.x86.avx2.gather.d.q(<2 x i64>, i8*, <4 x i32>, <2 x i64>, i8) nounwind readonly define <4 x i64> @test_x86_avx2_gather_d_q_256(<4 x i64> %a0, i8* %a1, <4 x i32> %idx, <4 x i64> %mask) { -; CHECK-LABEL: test_x86_avx2_gather_d_q_256: -; CHECK: ## BB#0: -; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax -; CHECK-NEXT: vpgatherdq %ymm2, (%eax,%xmm1,2), %ymm0 -; CHECK-NEXT: retl +; AVX2-LABEL: test_x86_avx2_gather_d_q_256: +; AVX2: ## BB#0: +; AVX2-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX2-NEXT: vpgatherdq %ymm2, (%eax,%xmm1,2), %ymm0 +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx2_gather_d_q_256: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX512VL-NEXT: vpgatherdq %ymm2, (%eax,%xmm1,2), %ymm0 +; AVX512VL-NEXT: retl %res = call <4 x i64> @llvm.x86.avx2.gather.d.q.256(<4 x i64> %a0, i8* %a1, <4 x i32> %idx, <4 x i64> %mask, i8 2) ; ret <4 x i64> %res @@ -1296,11 +1883,17 @@ declare <4 x i64> @llvm.x86.avx2.gather.d.q.256(<4 x i64>, i8*, <4 x i32>, <4 x i64>, i8) nounwind readonly define <2 x i64> @test_x86_avx2_gather_q_q(<2 x i64> %a0, i8* %a1, <2 x i64> %idx, <2 x i64> %mask) { -; CHECK-LABEL: test_x86_avx2_gather_q_q: -; CHECK: ## BB#0: -; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax -; CHECK-NEXT: vpgatherqq %xmm2, (%eax,%xmm1,2), %xmm0 -; CHECK-NEXT: retl +; AVX2-LABEL: test_x86_avx2_gather_q_q: +; AVX2: ## BB#0: +; AVX2-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX2-NEXT: vpgatherqq %xmm2, (%eax,%xmm1,2), %xmm0 +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx2_gather_q_q: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX512VL-NEXT: vpgatherqq %xmm2, (%eax,%xmm1,2), %xmm0 +; AVX512VL-NEXT: retl %res = call <2 x i64> @llvm.x86.avx2.gather.q.q(<2 x i64> %a0, i8* %a1, <2 x i64> %idx, <2 x i64> %mask, i8 2) ; ret <2 x i64> %res @@ -1309,11 +1902,17 @@ declare <2 x i64> @llvm.x86.avx2.gather.q.q(<2 x i64>, i8*, <2 x i64>, <2 x i64>, i8) nounwind readonly define <4 x i64> @test_x86_avx2_gather_q_q_256(<4 x i64> %a0, i8* %a1, <4 x i64> %idx, <4 x i64> %mask) { -; CHECK-LABEL: test_x86_avx2_gather_q_q_256: -; CHECK: ## BB#0: -; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax -; CHECK-NEXT: vpgatherqq %ymm2, (%eax,%ymm1,2), %ymm0 -; CHECK-NEXT: retl +; AVX2-LABEL: test_x86_avx2_gather_q_q_256: +; AVX2: ## BB#0: +; AVX2-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX2-NEXT: vpgatherqq %ymm2, (%eax,%ymm1,2), %ymm0 +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx2_gather_q_q_256: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX512VL-NEXT: vpgatherqq %ymm2, (%eax,%ymm1,2), %ymm0 +; AVX512VL-NEXT: retl %res = call <4 x i64> @llvm.x86.avx2.gather.q.q.256(<4 x i64> %a0, i8* %a1, <4 x i64> %idx, <4 x i64> %mask, i8 2) ; ret <4 x i64> %res @@ -1322,11 +1921,17 @@ declare <4 x i64> @llvm.x86.avx2.gather.q.q.256(<4 x i64>, i8*, <4 x i64>, <4 x i64>, i8) nounwind readonly define <4 x i32> @test_x86_avx2_gather_d_d(<4 x i32> %a0, i8* %a1, <4 x i32> %idx, <4 x i32> %mask) { -; CHECK-LABEL: test_x86_avx2_gather_d_d: -; CHECK: ## BB#0: -; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax -; CHECK-NEXT: vpgatherdd %xmm2, (%eax,%xmm1,2), %xmm0 -; CHECK-NEXT: retl +; AVX2-LABEL: test_x86_avx2_gather_d_d: +; AVX2: ## BB#0: +; AVX2-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX2-NEXT: vpgatherdd %xmm2, (%eax,%xmm1,2), %xmm0 +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx2_gather_d_d: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX512VL-NEXT: vpgatherdd %xmm2, (%eax,%xmm1,2), %xmm0 +; AVX512VL-NEXT: retl %res = call <4 x i32> @llvm.x86.avx2.gather.d.d(<4 x i32> %a0, i8* %a1, <4 x i32> %idx, <4 x i32> %mask, i8 2) ; ret <4 x i32> %res @@ -1335,11 +1940,17 @@ declare <4 x i32> @llvm.x86.avx2.gather.d.d(<4 x i32>, i8*, <4 x i32>, <4 x i32>, i8) nounwind readonly define <8 x i32> @test_x86_avx2_gather_d_d_256(<8 x i32> %a0, i8* %a1, <8 x i32> %idx, <8 x i32> %mask) { -; CHECK-LABEL: test_x86_avx2_gather_d_d_256: -; CHECK: ## BB#0: -; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax -; CHECK-NEXT: vpgatherdd %ymm2, (%eax,%ymm1,2), %ymm0 -; CHECK-NEXT: retl +; AVX2-LABEL: test_x86_avx2_gather_d_d_256: +; AVX2: ## BB#0: +; AVX2-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX2-NEXT: vpgatherdd %ymm2, (%eax,%ymm1,2), %ymm0 +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx2_gather_d_d_256: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX512VL-NEXT: vpgatherdd %ymm2, (%eax,%ymm1,2), %ymm0 +; AVX512VL-NEXT: retl %res = call <8 x i32> @llvm.x86.avx2.gather.d.d.256(<8 x i32> %a0, i8* %a1, <8 x i32> %idx, <8 x i32> %mask, i8 2) ; ret <8 x i32> %res @@ -1348,11 +1959,17 @@ declare <8 x i32> @llvm.x86.avx2.gather.d.d.256(<8 x i32>, i8*, <8 x i32>, <8 x i32>, i8) nounwind readonly define <4 x i32> @test_x86_avx2_gather_q_d(<4 x i32> %a0, i8* %a1, <2 x i64> %idx, <4 x i32> %mask) { -; CHECK-LABEL: test_x86_avx2_gather_q_d: -; CHECK: ## BB#0: -; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax -; CHECK-NEXT: vpgatherqd %xmm2, (%eax,%xmm1,2), %xmm0 -; CHECK-NEXT: retl +; AVX2-LABEL: test_x86_avx2_gather_q_d: +; AVX2: ## BB#0: +; AVX2-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX2-NEXT: vpgatherqd %xmm2, (%eax,%xmm1,2), %xmm0 +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx2_gather_q_d: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX512VL-NEXT: vpgatherqd %xmm2, (%eax,%xmm1,2), %xmm0 +; AVX512VL-NEXT: retl %res = call <4 x i32> @llvm.x86.avx2.gather.q.d(<4 x i32> %a0, i8* %a1, <2 x i64> %idx, <4 x i32> %mask, i8 2) ; ret <4 x i32> %res @@ -1361,12 +1978,18 @@ declare <4 x i32> @llvm.x86.avx2.gather.q.d(<4 x i32>, i8*, <2 x i64>, <4 x i32>, i8) nounwind readonly define <4 x i32> @test_x86_avx2_gather_q_d_256(<4 x i32> %a0, i8* %a1, <4 x i64> %idx, <4 x i32> %mask) { -; CHECK-LABEL: test_x86_avx2_gather_q_d_256: -; CHECK: ## BB#0: -; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax -; CHECK-NEXT: vpgatherqd %xmm2, (%eax,%ymm1,2), %xmm0 -; CHECK-NEXT: vzeroupper -; CHECK-NEXT: retl +; AVX2-LABEL: test_x86_avx2_gather_q_d_256: +; AVX2: ## BB#0: +; AVX2-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX2-NEXT: vpgatherqd %xmm2, (%eax,%ymm1,2), %xmm0 +; AVX2-NEXT: vzeroupper +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_x86_avx2_gather_q_d_256: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX512VL-NEXT: vpgatherqd %xmm2, (%eax,%ymm1,2), %xmm0 +; AVX512VL-NEXT: retl %res = call <4 x i32> @llvm.x86.avx2.gather.q.d.256(<4 x i32> %a0, i8* %a1, <4 x i64> %idx, <4 x i32> %mask, i8 2) ; ret <4 x i32> %res @@ -1376,15 +1999,24 @@ declare <4 x i32> @llvm.x86.avx2.gather.q.d.256(<4 x i32>, i8*, ; PR13298 define <8 x float> @test_gather_mask(<8 x float> %a0, float* %a, <8 x i32> %idx, <8 x float> %mask, float* nocapture %out) { -; CHECK-LABEL: test_gather_mask: -; CHECK: ## BB#0: -; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax -; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx -; CHECK-NEXT: vmovaps %ymm2, %ymm3 -; CHECK-NEXT: vgatherdps %ymm3, (%ecx,%ymm1,4), %ymm0 -; CHECK-NEXT: vmovups %ymm2, (%eax) -; CHECK-NEXT: retl ;; gather with mask +; AVX2-LABEL: test_gather_mask: +; AVX2: ## BB#0: +; AVX2-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX2-NEXT: movl {{[0-9]+}}(%esp), %ecx +; AVX2-NEXT: vmovaps %ymm2, %ymm3 +; AVX2-NEXT: vgatherdps %ymm3, (%ecx,%ymm1,4), %ymm0 +; AVX2-NEXT: vmovups %ymm2, (%eax) +; AVX2-NEXT: retl +; +; AVX512VL-LABEL: test_gather_mask: +; AVX512VL: ## BB#0: +; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax +; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %ecx +; AVX512VL-NEXT: vmovaps %zmm2, %zmm3 +; AVX512VL-NEXT: vgatherdps %ymm3, (%ecx,%ymm1,4), %ymm0 +; AVX512VL-NEXT: vmovups %ymm2, (%eax) +; AVX512VL-NEXT: retl %a_i8 = bitcast float* %a to i8* %res = call <8 x float> @llvm.x86.avx2.gather.d.ps.256(<8 x float> %a0, i8* %a_i8, <8 x i32> %idx, <8 x float> %mask, i8 4) ;