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Update release notes for NVPTX

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169280 91177308-0d34-0410-b5e6-96231b3b80d8
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Justin Holewinski 2012-12-04 16:11:51 +00:00
parent 2cbe23fd98
commit 315f09f422
1 changed files with 24 additions and 1 deletions
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docs/ReleaseNotes.html
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@ -442,6 +442,8 @@ core and border computations, control overhead vs. code size) </li>
<ul>
<li>...</li>
<li>New NVPTX back-end (replacing existing PTX back-end) based on NVIDIA
sources</li>
</ul>
</div>
@ -694,6 +696,27 @@ core and border computations, control overhead vs. code size) </li>
</div>
<!--=========================================================================-->
<h3>
<a name="NVPTX">PTX/NVPTX Target Improvements</a>
</h3>
<div>
<p>The PTX back-end has been replaced by the NVPTX back-end, which is based on
the LLVM back-end used by NVIDIA in their CUDA (nvcc) and OpenCL compiler.
Some highlights include:</p>
<ul>
<li>Compatibility with PTX 3.1 and SM 3.5</li>
<li>Support for NVVM intrinsics as defined in the NVIDIA Compiler SDK</li>
<li>Full compatibility with old PTX back-end, with much greater coverage of
LLVM IR</li>
</ul>
<p>Please submit any back-end bugs to the LLVM Bugzilla site.</p>
</div>
<!--=========================================================================-->
<h3>
<a name="OtherTS">Other Target Specific Improvements</a>
@ -805,7 +828,7 @@ to remove a dependency on Target. </p>
<p>Known problem areas include:</p>
<ul>
<li>The CellSPU, MSP430, PTX and XCore backends are experimental.</li>
<li>The CellSPU, MSP430, and XCore backends are experimental.</li>
<li>The integrated assembler, disassembler, and JIT is not supported by
several targets. If an integrated assembler is not supported, then a