diff --git a/docs/GlobalISel.rst b/docs/GlobalISel.rst
index 52ca9a02ba5..ecdfc6dc2bd 100644
--- a/docs/GlobalISel.rst
+++ b/docs/GlobalISel.rst
@@ -307,7 +307,7 @@ validity of the intermediate code, instructions are introduced:
 * ``G_SEQUENCE`` --- concatenate multiple registers into a single wider
   register.
 
-* ``G_EXTRACT`` --- extract multiple registers (as contiguous sequences of bits)
+* ``G_EXTRACT`` --- extract a simple register (as contiguous sequences of bits)
   from a single wider register.
 
 As they are expected to be temporary byproducts of the legalization process,
diff --git a/include/llvm/Target/GenericOpcodes.td b/include/llvm/Target/GenericOpcodes.td
index 557c1dc15c6..e3136b13809 100644
--- a/include/llvm/Target/GenericOpcodes.td
+++ b/include/llvm/Target/GenericOpcodes.td
@@ -486,8 +486,8 @@ def G_STORE : Instruction {
 // Variadic ops
 //------------------------------------------------------------------------------
 
-// Extract multiple registers specified size, starting from blocks given by
-// indexes. This will almost certainly be mapped to sub-register COPYs after
+// Extract a register of the specified size, starting from the block given by
+// index. This will almost certainly be mapped to sub-register COPYs after
 // register banks have been selected.
 def G_EXTRACT : Instruction {
   let OutOperandList = (outs type0:$res);