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[X86] Simplify the lowering code for extracting and inserting subvectors.

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We don't need to check if AVX is enabled. It's implied by the operation action being set to Custom.
We don't need to check both the input and output type widths. We only need to check the type that's being inserted or extracted. The other type is known to be a legal type and we can assume its a different width.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284102 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Craig Topper 2016-10-13 04:14:47 +00:00
parent 7c621c7bc8
commit 350bc2e971
1 changed files with 22 additions and 25 deletions
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47
lib/Target/X86/X86ISelLowering.cpp
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@ -12904,6 +12904,8 @@ static SDValue LowerSCALAR_TO_VECTOR(SDValue Op, SelectionDAG &DAG) {
// upper bits of a vector. // upper bits of a vector.
static SDValue LowerEXTRACT_SUBVECTOR(SDValue Op, const X86Subtarget &Subtarget, static SDValue LowerEXTRACT_SUBVECTOR(SDValue Op, const X86Subtarget &Subtarget,
SelectionDAG &DAG) { SelectionDAG &DAG) {
assert(Subtarget.hasAVX() && "EXTRACT_SUBVECTOR requires AVX");
SDLoc dl(Op); SDLoc dl(Op);
SDValue In = Op.getOperand(0); SDValue In = Op.getOperand(0);
SDValue Idx = Op.getOperand(1); SDValue Idx = Op.getOperand(1);
@ -12911,18 +12913,15 @@ static SDValue LowerEXTRACT_SUBVECTOR(SDValue Op, const X86Subtarget &Subtarget,
MVT ResVT = Op.getSimpleValueType(); MVT ResVT = Op.getSimpleValueType();
MVT InVT = In.getSimpleValueType(); MVT InVT = In.getSimpleValueType();
if (Subtarget.hasFp256()) { assert((InVT.is256BitVector() || InVT.is512BitVector()) &&
if (ResVT.is128BitVector() && "Can only extract from 256-bit or 512-bit vectors");
(InVT.is256BitVector() || InVT.is512BitVector()) &&
isa<ConstantSDNode>(Idx)) { if (ResVT.is128BitVector())
return extract128BitVector(In, IdxVal, DAG, dl); return extract128BitVector(In, IdxVal, DAG, dl);
} if (ResVT.is256BitVector())
if (ResVT.is256BitVector() && InVT.is512BitVector() && return extract256BitVector(In, IdxVal, DAG, dl);
isa<ConstantSDNode>(Idx)) {
return extract256BitVector(In, IdxVal, DAG, dl); llvm_unreachable("Unimplemented!");
}
}
return SDValue();
} }
static bool areOnlyUsersOf(SDNode *N, ArrayRef<SDValue> ValidUsers) { static bool areOnlyUsersOf(SDNode *N, ArrayRef<SDValue> ValidUsers) {
@ -12938,17 +12937,13 @@ static bool areOnlyUsersOf(SDNode *N, ArrayRef<SDValue> ValidUsers) {
// the upper bits of a vector. // the upper bits of a vector.
static SDValue LowerINSERT_SUBVECTOR(SDValue Op, const X86Subtarget &Subtarget, static SDValue LowerINSERT_SUBVECTOR(SDValue Op, const X86Subtarget &Subtarget,
SelectionDAG &DAG) { SelectionDAG &DAG) {
if (!Subtarget.hasAVX()) assert(Subtarget.hasAVX() && "INSERT_SUBVECTOR requires AVX");
return SDValue();
SDLoc dl(Op); SDLoc dl(Op);
SDValue Vec = Op.getOperand(0); SDValue Vec = Op.getOperand(0);
SDValue SubVec = Op.getOperand(1); SDValue SubVec = Op.getOperand(1);
SDValue Idx = Op.getOperand(2); SDValue Idx = Op.getOperand(2);
if (!isa<ConstantSDNode>(Idx))
return SDValue();
unsigned IdxVal = cast<ConstantSDNode>(Idx)->getZExtValue(); unsigned IdxVal = cast<ConstantSDNode>(Idx)->getZExtValue();
MVT OpVT = Op.getSimpleValueType(); MVT OpVT = Op.getSimpleValueType();
MVT SubVecVT = SubVec.getSimpleValueType(); MVT SubVecVT = SubVec.getSimpleValueType();
@ -12991,17 +12986,19 @@ static SDValue LowerINSERT_SUBVECTOR(SDValue Op, const X86Subtarget &Subtarget,
} }
} }
if ((OpVT.is256BitVector() || OpVT.is512BitVector()) &&
SubVecVT.is128BitVector())
return insert128BitVector(Vec, SubVec, IdxVal, DAG, dl);
if (OpVT.is512BitVector() && SubVecVT.is256BitVector())
return insert256BitVector(Vec, SubVec, IdxVal, DAG, dl);
if (OpVT.getVectorElementType() == MVT::i1) if (OpVT.getVectorElementType() == MVT::i1)
return insert1BitVector(Op, DAG, Subtarget); return insert1BitVector(Op, DAG, Subtarget);
return SDValue(); assert((OpVT.is256BitVector() || OpVT.is512BitVector()) &&
"Can only insert into 256-bit or 512-bit vectors");
if (SubVecVT.is128BitVector())
return insert128BitVector(Vec, SubVec, IdxVal, DAG, dl);
if (SubVecVT.is256BitVector())
return insert256BitVector(Vec, SubVec, IdxVal, DAG, dl);
llvm_unreachable("Unimplemented!");
} }
// ConstantPool, JumpTable, GlobalAddress, and ExternalSymbol are lowered as // ConstantPool, JumpTable, GlobalAddress, and ExternalSymbol are lowered as