diff --git a/docs/CodeGenerator.html b/docs/CodeGenerator.html index d240636fc92..a43baee56e6 100644 --- a/docs/CodeGenerator.html +++ b/docs/CodeGenerator.html @@ -1255,7 +1255,7 @@ blocks and machine instructions. We then handle the "live-in" values. These are in physical registers, so the physical register is assumed to be killed by the end of the basic block. Live intervals for virtual registers are computed for some ordering of the machine instructions [1, N]. A live interval -is an interval [i, j), where 1 <= i <= j < N, for which a +is an interval [i, j), where 1 <= i <= j < N, for which a variable is live.

More to come...

diff --git a/docs/TableGenFundamentals.html b/docs/TableGenFundamentals.html index aaa55511966..a89e60dba9a 100644 --- a/docs/TableGenFundamentals.html +++ b/docs/TableGenFundamentals.html @@ -707,12 +707,12 @@ examples:

let Defs = [EAX, ECX, EDX, FP0, FP1, FP2, FP3, FP4, FP5, FP6, ST0, MM0, MM1, MM2, MM3, MM4, MM5, MM6, MM7, XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7, EFLAGS] in { - def CALLpcrel32 : Ii32<0xE8, RawFrm, (outs), (ins i32imm:$dst,variable_ops), - "call\t${dst:call}", []>; - def CALL32r : I<0xFF, MRM2r, (outs), (ins GR32:$dst, variable_ops), - "call\t{*}$dst", [(X86call GR32:$dst)]>; - def CALL32m : I<0xFF, MRM2m, (outs), (ins i32mem:$dst, variable_ops), - "call\t{*}$dst", []>; + def CALLpcrel32 : Ii32<0xE8, RawFrm, (outs), (ins i32imm:$dst,variable_ops), + "call\t${dst:call}", []>; + def CALL32r : I<0xFF, MRM2r, (outs), (ins GR32:$dst, variable_ops), + "call\t{*}$dst", [(X86call GR32:$dst)]>; + def CALL32m : I<0xFF, MRM2m, (outs), (ins i32mem:$dst, variable_ops), + "call\t{*}$dst", []>; } diff --git a/docs/UsingLibraries.html b/docs/UsingLibraries.html index af57907ef66..89f1066ba6c 100644 --- a/docs/UsingLibraries.html +++ b/docs/UsingLibraries.html @@ -199,33 +199,33 @@ textual form. The information is the same as shown on the graphs but arranged alphabetically.

-
libLLVMAnalysis.a