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AVX512 : Fix SETCCE lowering for KNL 32 bit.
Differential Revision: http://reviews.llvm.org/D16752 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259342 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1335,6 +1335,7 @@ X86TargetLowering::X86TargetLowering(const X86TargetMachine &TM,
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setOperationAction(ISD::BR_CC, MVT::i1, Expand);
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setOperationAction(ISD::SETCC, MVT::i1, Custom);
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setOperationAction(ISD::SETCCE, MVT::i1, Custom);
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setOperationAction(ISD::SELECT_CC, MVT::i1, Expand);
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setOperationAction(ISD::XOR, MVT::i1, Legal);
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setOperationAction(ISD::OR, MVT::i1, Legal);
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@ -15143,8 +15144,11 @@ SDValue X86TargetLowering::LowerSETCCE(SDValue Op, SelectionDAG &DAG) const {
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assert(Carry.getOpcode() != ISD::CARRY_FALSE);
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SDVTList VTs = DAG.getVTList(LHS.getValueType(), MVT::i32);
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SDValue Cmp = DAG.getNode(X86ISD::SBB, DL, VTs, LHS, RHS, Carry);
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return DAG.getNode(X86ISD::SETCC, DL, Op.getValueType(),
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DAG.getConstant(CC, DL, MVT::i8), Cmp.getValue(1));
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SDValue SetCC = DAG.getNode(X86ISD::SETCC, DL, MVT::i8,
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DAG.getConstant(CC, DL, MVT::i8), Cmp.getValue(1));
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if (Op.getSimpleValueType() == MVT::i1)
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return DAG.getNode(ISD::TRUNCATE, DL, MVT::i1, SetCC);
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return SetCC;
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}
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// isX86LogicalCmp - Return true if opcode is a X86 logical comparison.
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@ -1,26 +1,28 @@
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=x86_64-unknown-unknown -mattr=+avx < %s | FileCheck %s
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; RUN: llc -mtriple=x86_64-unknown-unknown -mattr=+avx < %s | FileCheck %s --check-prefix=AVX
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; RUN: llc -mtriple=i386-unknown-linux-gnu -mcpu=knl < %s | FileCheck %s --check-prefix=KNL-32
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; Verify that we don't crash during codegen due to a wrong lowering
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; of a setcc node with illegal operand types and return type.
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define <8 x i16> @pr25080(<8 x i32> %a) {
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; CHECK-LABEL: pr25080:
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; CHECK: # BB#0: # %entry
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; CHECK-NEXT: vandps {{.*}}(%rip), %ymm0, %ymm0
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; CHECK-NEXT: vextractf128 $1, %ymm0, %xmm1
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; CHECK-NEXT: vpxor %xmm2, %xmm2, %xmm2
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; CHECK-NEXT: vpcmpeqd %xmm2, %xmm1, %xmm1
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; CHECK-NEXT: vmovdqa {{.*#+}} xmm3 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
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; CHECK-NEXT: vpshufb %xmm3, %xmm1, %xmm1
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; CHECK-NEXT: vpcmpeqd %xmm2, %xmm0, %xmm0
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; CHECK-NEXT: vpshufb %xmm3, %xmm0, %xmm0
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; CHECK-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
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; CHECK-NEXT: vpor {{.*}}(%rip), %xmm0, %xmm0
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; CHECK-NEXT: vpsllw $15, %xmm0, %xmm0
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; CHECK-NEXT: vpsraw $15, %xmm0, %xmm0
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; CHECK-NEXT: vzeroupper
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; CHECK-NEXT: retq
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; AVX-LABEL: pr25080:
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; AVX: # BB#0: # %entry
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; AVX-NEXT: vandps {{.*}}(%rip), %ymm0, %ymm0
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; AVX-NEXT: vextractf128 $1, %ymm0, %xmm1
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; AVX-NEXT: vpxor %xmm2, %xmm2, %xmm2
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; AVX-NEXT: vpcmpeqd %xmm2, %xmm1, %xmm1
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; AVX-NEXT: vmovdqa {{.*#+}} xmm3 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
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; AVX-NEXT: vpshufb %xmm3, %xmm1, %xmm1
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; AVX-NEXT: vpcmpeqd %xmm2, %xmm0, %xmm0
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; AVX-NEXT: vpshufb %xmm3, %xmm0, %xmm0
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; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
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; AVX-NEXT: vpor {{.*}}(%rip), %xmm0, %xmm0
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; AVX-NEXT: vpsllw $15, %xmm0, %xmm0
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; AVX-NEXT: vpsraw $15, %xmm0, %xmm0
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; AVX-NEXT: vzeroupper
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; AVX-NEXT: retq
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entry:
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%0 = trunc <8 x i32> %a to <8 x i23>
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%1 = icmp eq <8 x i23> %0, zeroinitializer
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@ -28,3 +30,46 @@ entry:
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%3 = sext <8 x i1> %2 to <8 x i16>
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ret <8 x i16> %3
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}
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define void @pr26232(i64 %a) {
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; KNL-32-LABEL: pr26232:
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; KNL-32: # BB#0: # %for_test11.preheader
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; KNL-32-NEXT: pushl %esi
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; KNL-32-NEXT: .Ltmp0:
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; KNL-32-NEXT: .cfi_def_cfa_offset 8
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; KNL-32-NEXT: .Ltmp1:
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; KNL-32-NEXT: .cfi_offset %esi, -8
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; KNL-32-NEXT: movl {{[0-9]+}}(%esp), %eax
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; KNL-32-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; KNL-32-NEXT: movw $-1, %dx
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; KNL-32-NEXT: .p2align 4, 0x90
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; KNL-32-NEXT: .LBB1_1: # %for_loop599
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; KNL-32-NEXT: # =>This Inner Loop Header: Depth=1
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; KNL-32-NEXT: cmpl $65536, %ecx # imm = 0x10000
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; KNL-32-NEXT: movl %eax, %esi
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; KNL-32-NEXT: sbbl $0, %esi
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; KNL-32-NEXT: movl $0, %esi
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; KNL-32-NEXT: cmovlw %dx, %si
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; KNL-32-NEXT: testw %si, %si
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; KNL-32-NEXT: jne .LBB1_1
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; KNL-32-NEXT: # BB#2: # %for_exit600
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; KNL-32-NEXT: popl %esi
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; KNL-32-NEXT: retl
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allocas:
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br label %for_test11.preheader
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for_test11.preheader: ; preds = %for_test11.preheader, %allocas
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br i1 undef, label %for_loop599, label %for_test11.preheader
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for_loop599: ; preds = %for_loop599, %for_test11.preheader
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%less_i_load605_ = icmp slt i64 %a, 65536
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%less_i_load605__broadcast_init = insertelement <16 x i1> undef, i1 %less_i_load605_, i32 0
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%less_i_load605__broadcast = shufflevector <16 x i1> %less_i_load605__broadcast_init, <16 x i1> undef, <16 x i32> zeroinitializer
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%"oldMask&test607" = and <16 x i1> %less_i_load605__broadcast, undef
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%intmask.i894 = bitcast <16 x i1> %"oldMask&test607" to i16
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%res.i895 = icmp eq i16 %intmask.i894, 0
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br i1 %res.i895, label %for_exit600, label %for_loop599
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for_exit600: ; preds = %for_loop599
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ret void
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}
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