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make UpdateValueMap handle the possiblity that we could be

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copying into the right register, avoiding a copy.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68889 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2009-04-12 07:46:30 +00:00
parent c5040ab606
commit 36e3946ac2
1 changed files with 1 additions and 1 deletions
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2
lib/CodeGen/SelectionDAG/FastISel.cpp
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@ -158,7 +158,7 @@ unsigned FastISel::UpdateValueMap(Value* I, unsigned Reg) {
unsigned &AssignedReg = ValueMap[I];
if (AssignedReg == 0)
AssignedReg = Reg;
else {
else if (Reg != AssignedReg) {
const TargetRegisterClass *RegClass = MRI.getRegClass(Reg);
TII.copyRegToReg(*MBB, MBB->end(), AssignedReg,
Reg, RegClass, RegClass);