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AArch64: Enable AES instruction fusion on Cyclone.

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Note that cyclone itself doesn't fuse, but newer apple chips do and we
are using cyclone as the default when targeting apple OSes.

The current code also does not capture all fusion patterns of apple CPUs
yet; I am still looking for ways to refactor the code nicely to extend
it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316036 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Matthias Braun 2017-10-17 21:46:15 +00:00
parent 2f17a1b1cc
commit 37790cc1f7
1 changed files with 5 additions and 2 deletions
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7
lib/Target/AArch64/AArch64.td
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@ -274,14 +274,17 @@ def ProcA75 : SubtargetFeature<"a75", "ARMProcFamily", "CortexA75",
FeaturePerfMon
]>;
// Note that cyclone does not fuse AES instructions, but newer apple chips do
// perform the fusion and cyclone is used by default when targetting apple OSes.
def ProcCyclone : SubtargetFeature<"cyclone", "ARMProcFamily", "Cyclone",
"Cyclone", [
FeatureAlternateSExtLoadCVTF32Pattern,
FeatureArithmeticBccFusion,
FeatureArithmeticCbzFusion,
FeatureCrypto,
FeatureDisableLatencySchedHeuristic,
FeatureFPARMv8,
FeatureArithmeticBccFusion,
FeatureArithmeticCbzFusion,
FeatureFuseAES,
FeatureNEON,
FeaturePerfMon,
FeatureSlowMisaligned128Store,