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fix a bunch of failures in the X86-64 JIT by tolerating RIP as
a base register. We just ignore it for now. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74374 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -301,7 +301,7 @@ bool Emitter<CodeEmitter>::gvNeedsNonLazyPtr(const GlobalValue *GV) {
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template<class CodeEmitter>
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void Emitter<CodeEmitter>::emitDisplacementField(const MachineOperand *RelocOp,
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int DispVal, intptr_t PCAdj) {
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int DispVal, intptr_t PCAdj) {
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// If this is a simple integer displacement that doesn't require a relocation,
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// emit it now.
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if (!RelocOp) {
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@ -371,8 +371,10 @@ void Emitter<CodeEmitter>::emitMemModRMByte(const MachineInstr &MI,
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// Is a SIB byte needed?
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if ((!Is64BitMode || DispForReloc || BaseReg != 0) &&
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IndexReg.getReg() == 0 &&
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(BaseReg == 0 || getX86RegNum(BaseReg) != N86::ESP)) {
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if (BaseReg == 0) { // Just a displacement?
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(BaseReg == 0 || BaseReg == X86::RIP ||
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getX86RegNum(BaseReg) != N86::ESP)) {
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if (BaseReg == 0 ||
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BaseReg == X86::RIP) { // Just a displacement?
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// Emit special case [disp32] encoding
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MCE.emitByte(ModRMByte(0, RegOpcodeField, 5));
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