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Continue factoring computeOperandLatency. Use it for ARM hasHighOperandLatency.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158164 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -677,6 +677,15 @@ public:
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const MachineInstr *UseMI,
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unsigned UseIdx) const;
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/// computeOperandLatency - Compute and return the latency of the given data
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/// dependent def and use when the operand indices are already known.
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///
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/// FindMin may be set to get the minimum vs. expected latency.
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unsigned computeOperandLatency(const InstrItineraryData *ItinData,
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const MachineInstr *DefMI, unsigned DefIdx,
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const MachineInstr *UseMI, unsigned UseIdx,
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bool FindMin = false) const;
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/// computeOperandLatency - Compute and return the latency of the given data
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/// dependent def and use. DefMI must be a valid def. UseMI may be NULL for
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/// an unknown use. If the subtarget allows, this may or may not need to call
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@ -3084,7 +3084,8 @@ hasHighOperandLatency(const InstrItineraryData *ItinData,
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return true;
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// Hoist VFP / NEON instructions with 4 or higher latency.
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int Latency = getOperandLatency(ItinData, DefMI, DefIdx, UseMI, UseIdx);
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int Latency = computeOperandLatency(ItinData, DefMI, DefIdx, UseMI, UseIdx,
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/*FindMin=*/false);
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if (Latency < 0)
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Latency = getInstrLatency(ItinData, DefMI);
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if (Latency <= 3)
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@ -83,6 +83,66 @@ TargetInstrInfo::getOperandLatency(const InstrItineraryData *ItinData,
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return ItinData->getOperandLatency(DefClass, DefIdx, UseClass, UseIdx);
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}
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/// If we can determine the operand latency from the def only, without itinerary
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/// lookup, do so. Otherwise return -1.
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static int computeDefOperandLatency(
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const TargetInstrInfo *TII, const InstrItineraryData *ItinData,
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const MachineInstr *DefMI, bool FindMin) {
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// Let the target hook getInstrLatency handle missing itineraries.
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if (!ItinData)
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return TII->getInstrLatency(ItinData, DefMI);
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// Return a latency based on the itinerary properties and defining instruction
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// if possible. Some common subtargets don't require per-operand latency,
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// especially for minimum latencies.
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if (FindMin) {
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// If MinLatency is valid, call getInstrLatency. This uses Stage latency if
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// it exists before defaulting to MinLatency.
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if (ItinData->Props.MinLatency >= 0)
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return TII->getInstrLatency(ItinData, DefMI);
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// If MinLatency is invalid, OperandLatency is interpreted as MinLatency.
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// For empty itineraries, short-cirtuit the check and default to one cycle.
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if (ItinData->isEmpty())
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return 1;
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}
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else if(ItinData->isEmpty())
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return TII->defaultDefLatency(ItinData, DefMI);
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// ...operand lookup required
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return -1;
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}
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/// computeOperandLatency - Compute and return the latency of the given data
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/// dependent def and use when the operand indices are already known.
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///
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/// FindMin may be set to get the minimum vs. expected latency.
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unsigned TargetInstrInfo::
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computeOperandLatency(const InstrItineraryData *ItinData,
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const MachineInstr *DefMI, unsigned DefIdx,
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const MachineInstr *UseMI, unsigned UseIdx,
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bool FindMin) const {
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int DefLatency = computeDefOperandLatency(this, ItinData, DefMI, FindMin);
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if (DefLatency >= 0)
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return DefLatency;
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assert(ItinData && !ItinData->isEmpty() && "computeDefOperandLatency fail");
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int OperLatency = getOperandLatency(ItinData, DefMI, DefIdx, UseMI, UseIdx);
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if (OperLatency >= 0)
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return OperLatency;
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// No operand latency was found.
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unsigned InstrLatency = getInstrLatency(ItinData, DefMI);
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// Expected latency is the max of the stage latency and itinerary props.
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if (!FindMin)
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InstrLatency = std::max(InstrLatency, defaultDefLatency(ItinData, DefMI));
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return InstrLatency;
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}
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/// computeOperandLatency - Compute and return the latency of the given data
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/// dependent def and use. DefMI must be a valid def. UseMI may be NULL for an
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/// unknown use. Depending on the subtarget's itinerary properties, this may or
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@ -100,30 +160,11 @@ computeOperandLatency(const InstrItineraryData *ItinData,
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const MachineInstr *DefMI, const MachineInstr *UseMI,
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unsigned Reg, bool FindMin) const {
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// Default to one cycle for missing itinerary. Empty itineraries still have
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// a properties. We have one hard-coded exception for loads, to preserve
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// existing behavior.
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if (!ItinData)
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return DefMI->mayLoad() ? 2 : 1;
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int DefLatency = computeDefOperandLatency(this, ItinData, DefMI, FindMin);
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if (DefLatency >= 0)
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return DefLatency;
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// Return a latency based on the itinerary properties and defining instruction
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// if possible. Some common subtargets don't require per-operand latency,
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// especially for minimum latencies.
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if (FindMin) {
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// If MinLatency is valid, call getInstrLatency. This uses Stage latency if
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// it exists before defaulting to MinLatency.
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if (ItinData->Props.MinLatency >= 0)
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return getInstrLatency(ItinData, DefMI);
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// If MinLatency is invalid, OperandLatency is interpreted as MinLatency.
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// For empty itineraries, short-cirtuit the check and default to one cycle.
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if (ItinData->isEmpty())
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return 1;
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}
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else if(ItinData->isEmpty())
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return defaultDefLatency(ItinData, DefMI);
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// ...operand lookup required
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assert(ItinData && !ItinData->isEmpty() && "computeDefOperandLatency fail");
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// Find the definition of the register in the defining instruction.
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int DefIdx = DefMI->findRegisterDefOperandIdx(Reg);
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@ -168,6 +209,7 @@ computeOperandLatency(const InstrItineraryData *ItinData,
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}
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// No operand latency was found.
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unsigned InstrLatency = getInstrLatency(ItinData, DefMI);
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// Expected latency is the max of the stage latency and itinerary props.
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if (!FindMin)
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InstrLatency = std::max(InstrLatency, defaultDefLatency(ItinData, DefMI));
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@ -180,7 +222,7 @@ unsigned TargetInstrInfo::getInstrLatency(const InstrItineraryData *ItinData,
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// Default to one cycle for no itinerary. However, an "empty" itinerary may
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// still have a MinLatency property, which getStageLatency checks.
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if (!ItinData)
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return 1;
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return MI->mayLoad() ? 2 : 1;
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return ItinData->getStageLatency(MI->getDesc().getSchedClass());
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}
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