From 399774e0355ddb1237eeef83516933c6800995ab Mon Sep 17 00:00:00 2001 From: Justin Bogner Date: Fri, 13 May 2016 22:49:18 +0000 Subject: [PATCH] SDAG: Implement Select instead of SelectImpl in XCoreDAGToDAGISel - Where we were returning a node before, call ReplaceNode instead. - Where we would return null to fall back to another selector, rename the method to try* and return a bool for success. - Where we were calling SelectNodeTo, just return afterwards. Part of llvm.org/pr26808. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269509 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/XCore/XCoreISelDAGToDAG.cpp | 66 +++++++++++++++----------- 1 file changed, 38 insertions(+), 28 deletions(-) diff --git a/lib/Target/XCore/XCoreISelDAGToDAG.cpp b/lib/Target/XCore/XCoreISelDAGToDAG.cpp index d9cff7e88b2..8f49dcc6a6d 100644 --- a/lib/Target/XCore/XCoreISelDAGToDAG.cpp +++ b/lib/Target/XCore/XCoreISelDAGToDAG.cpp @@ -41,8 +41,8 @@ namespace { XCoreDAGToDAGISel(XCoreTargetMachine &TM, CodeGenOpt::Level OptLevel) : SelectionDAGISel(TM, OptLevel) {} - SDNode *SelectImpl(SDNode *N) override; - SDNode *SelectBRIND(SDNode *N); + void Select(SDNode *N) override; + bool tryBRIND(SDNode *N); /// getI32Imm - Return a target constant with the specified value, of type /// i32. @@ -129,7 +129,7 @@ SelectInlineAsmMemoryOperand(const SDValue &Op, unsigned ConstraintID, return false; } -SDNode *XCoreDAGToDAGISel::SelectImpl(SDNode *N) { +void XCoreDAGToDAGISel::Select(SDNode *N) { SDLoc dl(N); switch (N->getOpcode()) { default: break; @@ -139,8 +139,9 @@ SDNode *XCoreDAGToDAGISel::SelectImpl(SDNode *N) { // Transformation function: get the size of a mask // Look for the first non-zero bit SDValue MskSize = getI32Imm(32 - countLeadingZeros((uint32_t)Val), dl); - return CurDAG->getMachineNode(XCore::MKMSK_rus, dl, - MVT::i32, MskSize); + ReplaceNode(N, CurDAG->getMachineNode(XCore::MKMSK_rus, dl, + MVT::i32, MskSize)); + return; } else if (!isUInt<16>(Val)) { SDValue CPIdx = CurDAG->getTargetConstantPool( @@ -154,52 +155,59 @@ SDNode *XCoreDAGToDAGISel::SelectImpl(SDNode *N) { MF->getMachineMemOperand(MachinePointerInfo::getConstantPool(*MF), MachineMemOperand::MOLoad, 4, 4); cast(node)->setMemRefs(MemOp, MemOp + 1); - return node; + ReplaceNode(N, node); + return; } break; } case XCoreISD::LADD: { SDValue Ops[] = { N->getOperand(0), N->getOperand(1), N->getOperand(2) }; - return CurDAG->getMachineNode(XCore::LADD_l5r, dl, MVT::i32, MVT::i32, - Ops); + ReplaceNode(N, CurDAG->getMachineNode(XCore::LADD_l5r, dl, MVT::i32, + MVT::i32, Ops)); + return; } case XCoreISD::LSUB: { SDValue Ops[] = { N->getOperand(0), N->getOperand(1), N->getOperand(2) }; - return CurDAG->getMachineNode(XCore::LSUB_l5r, dl, MVT::i32, MVT::i32, - Ops); + ReplaceNode(N, CurDAG->getMachineNode(XCore::LSUB_l5r, dl, MVT::i32, + MVT::i32, Ops)); + return; } case XCoreISD::MACCU: { SDValue Ops[] = { N->getOperand(0), N->getOperand(1), N->getOperand(2), N->getOperand(3) }; - return CurDAG->getMachineNode(XCore::MACCU_l4r, dl, MVT::i32, MVT::i32, - Ops); + ReplaceNode(N, CurDAG->getMachineNode(XCore::MACCU_l4r, dl, MVT::i32, + MVT::i32, Ops)); + return; } case XCoreISD::MACCS: { SDValue Ops[] = { N->getOperand(0), N->getOperand(1), N->getOperand(2), N->getOperand(3) }; - return CurDAG->getMachineNode(XCore::MACCS_l4r, dl, MVT::i32, MVT::i32, - Ops); + ReplaceNode(N, CurDAG->getMachineNode(XCore::MACCS_l4r, dl, MVT::i32, + MVT::i32, Ops)); + return; } case XCoreISD::LMUL: { SDValue Ops[] = { N->getOperand(0), N->getOperand(1), N->getOperand(2), N->getOperand(3) }; - return CurDAG->getMachineNode(XCore::LMUL_l6r, dl, MVT::i32, MVT::i32, - Ops); + ReplaceNode(N, CurDAG->getMachineNode(XCore::LMUL_l6r, dl, MVT::i32, + MVT::i32, Ops)); + return; } case XCoreISD::CRC8: { SDValue Ops[] = { N->getOperand(0), N->getOperand(1), N->getOperand(2) }; - return CurDAG->getMachineNode(XCore::CRC8_l4r, dl, MVT::i32, MVT::i32, - Ops); + ReplaceNode(N, CurDAG->getMachineNode(XCore::CRC8_l4r, dl, MVT::i32, + MVT::i32, Ops)); + return; } case ISD::BRIND: - if (SDNode *ResNode = SelectBRIND(N)) - return ResNode; + if (tryBRIND(N)) + return; break; // Other cases are autogenerated. } - return SelectCode(N); + SelectCode(N); } /// Given a chain return a new chain where any appearance of Old is replaced @@ -228,16 +236,16 @@ replaceInChain(SelectionDAG *CurDAG, SDValue Chain, SDValue Old, SDValue New) return CurDAG->getNode(ISD::TokenFactor, SDLoc(Chain), MVT::Other, Ops); } -SDNode *XCoreDAGToDAGISel::SelectBRIND(SDNode *N) { +bool XCoreDAGToDAGISel::tryBRIND(SDNode *N) { SDLoc dl(N); // (brind (int_xcore_checkevent (addr))) SDValue Chain = N->getOperand(0); SDValue Addr = N->getOperand(1); if (Addr->getOpcode() != ISD::INTRINSIC_W_CHAIN) - return nullptr; + return false; unsigned IntNo = cast(Addr->getOperand(1))->getZExtValue(); if (IntNo != Intrinsic::xcore_checkevent) - return nullptr; + return false; SDValue nextAddr = Addr->getOperand(2); SDValue CheckEventChainOut(Addr.getNode(), 1); if (!CheckEventChainOut.use_empty()) { @@ -249,7 +257,7 @@ SDNode *XCoreDAGToDAGISel::SelectBRIND(SDNode *N) { SDValue NewChain = replaceInChain(CurDAG, Chain, CheckEventChainOut, CheckEventChainIn); if (!NewChain.getNode()) - return nullptr; + return false; Chain = NewChain; } // Enable events on the thread using setsr 1 and then disable them immediately @@ -265,8 +273,10 @@ SDNode *XCoreDAGToDAGISel::SelectBRIND(SDNode *N) { constOne, Glue), 0); if (nextAddr->getOpcode() == XCoreISD::PCRelativeWrapper && nextAddr->getOperand(0)->getOpcode() == ISD::TargetBlockAddress) { - return CurDAG->SelectNodeTo(N, XCore::BRFU_lu6, MVT::Other, - nextAddr->getOperand(0), Glue); + CurDAG->SelectNodeTo(N, XCore::BRFU_lu6, MVT::Other, + nextAddr->getOperand(0), Glue); + return true; } - return CurDAG->SelectNodeTo(N, XCore::BAU_1r, MVT::Other, nextAddr, Glue); + CurDAG->SelectNodeTo(N, XCore::BAU_1r, MVT::Other, nextAddr, Glue); + return true; }