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pxor (for FLD0SS) encoding was missing the OpSize prefix.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26244 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -2491,7 +2491,7 @@ def UCOMISDrm: I<0x2E, MRMSrcMem, (ops FR64:$src1, f64mem:$src2),
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// FIXME: remove when we can teach regalloc that xor reg, reg is ok.
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def FLD0SS : I<0xEF, MRMInitReg, (ops FR32:$dst),
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"pxor $dst, $dst", [(set FR32:$dst, fp32imm0)]>,
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Requires<[HasSSE1]>, TB;
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Requires<[HasSSE1]>, TB, OpSize;
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def FLD0SD : I<0xEF, MRMInitReg, (ops FR64:$dst),
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"pxor $dst, $dst", [(set FR64:$dst, fp64imm0)]>,
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Requires<[HasSSE2]>, TB, OpSize;
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