Add some comments explaining the meaning of a boolean

that is not of type MVT::i1 in SELECT and SETCC nodes.
Relax the LegalizeTypes SELECT condition promotion
sanity checks to allow other condition types than i1.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57966 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Duncan Sands 2008-10-22 09:06:24 +00:00
parent 0954aefd81
commit 3b521d5acc
2 changed files with 11 additions and 11 deletions

View File

@ -326,19 +326,21 @@ namespace ISD {
// Counting operators
CTTZ, CTLZ, CTPOP,
// Select(COND, TRUEVAL, FALSEVAL)
SELECT,
// Select(COND, TRUEVAL, FALSEVAL). If the type of the boolean COND is not
// i1 then the high bits must conform to getSetCCResultContents.
SELECT,
// Select with condition operator - This selects between a true value and
// a false value (ops #2 and #3) based on the boolean result of comparing
// the lhs and rhs (ops #0 and #1) of a conditional expression with the
// condition code in op #4, a CondCodeSDNode.
SELECT_CC,
// SetCC operator - This evaluates to a boolean (i1) true value if the
// condition is true. The operands to this are the left and right operands
// to compare (ops #0, and #1) and the condition code to compare them with
// (op #2) as a CondCodeSDNode.
// SetCC operator - This evaluates to a true value iff the condition is
// true. If the result value type is not i1 then the high bits conform
// to getSetCCResultContents. The operands to this are the left and right
// operands to compare (ops #0, and #1) and the condition code to compare
// them with (op #2) as a CondCodeSDNode.
SETCC,
// Vector SetCC operator - This evaluates to a vector of integer elements

View File

@ -808,8 +808,6 @@ SDValue DAGTypeLegalizer::PromoteIntOp_MEMBARRIER(SDNode *N) {
SDValue DAGTypeLegalizer::PromoteIntOp_SELECT(SDNode *N, unsigned OpNo) {
assert(OpNo == 0 && "Only know how to promote condition");
assert(N->getOperand(0).getValueType() == MVT::i1 &&
"SetCC type is not legal??");
SDValue Cond = GetPromotedInteger(N->getOperand(0));
// Promote all the way up to SVT, the canonical SetCC type.
@ -835,7 +833,7 @@ SDValue DAGTypeLegalizer::PromoteIntOp_SELECT(SDNode *N, unsigned OpNo) {
ExtendCode = ISD::ZERO_EXTEND;
if (!DAG.MaskedValueIsZero(Cond,APInt::getHighBitsSet(CondBits,CondBits-1)))
// All extra bits need to be cleared. Do this by zero extending the
// original MVT::i1 condition value all the way to SVT.
// original condition value all the way to SVT.
Cond = N->getOperand(0);
break;
case TargetLowering::ZeroOrNegativeOneSetCCResult: {
@ -843,7 +841,7 @@ SDValue DAGTypeLegalizer::PromoteIntOp_SELECT(SDNode *N, unsigned OpNo) {
unsigned SignBits = DAG.ComputeNumSignBits(Cond);
if (SignBits != CondBits)
// All extra bits need to be sign extended. Do this by sign extending the
// original MVT::i1 condition value all the way to SVT.
// original condition value all the way to SVT.
Cond = N->getOperand(0);
break;
}