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Add some comments explaining the meaning of a boolean
that is not of type MVT::i1 in SELECT and SETCC nodes. Relax the LegalizeTypes SELECT condition promotion sanity checks to allow other condition types than i1. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57966 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -326,19 +326,21 @@ namespace ISD {
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// Counting operators
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CTTZ, CTLZ, CTPOP,
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// Select(COND, TRUEVAL, FALSEVAL)
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SELECT,
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// Select(COND, TRUEVAL, FALSEVAL). If the type of the boolean COND is not
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// i1 then the high bits must conform to getSetCCResultContents.
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SELECT,
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// Select with condition operator - This selects between a true value and
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// a false value (ops #2 and #3) based on the boolean result of comparing
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// the lhs and rhs (ops #0 and #1) of a conditional expression with the
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// condition code in op #4, a CondCodeSDNode.
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SELECT_CC,
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// SetCC operator - This evaluates to a boolean (i1) true value if the
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// condition is true. The operands to this are the left and right operands
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// to compare (ops #0, and #1) and the condition code to compare them with
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// (op #2) as a CondCodeSDNode.
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// SetCC operator - This evaluates to a true value iff the condition is
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// true. If the result value type is not i1 then the high bits conform
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// to getSetCCResultContents. The operands to this are the left and right
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// operands to compare (ops #0, and #1) and the condition code to compare
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// them with (op #2) as a CondCodeSDNode.
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SETCC,
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// Vector SetCC operator - This evaluates to a vector of integer elements
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@ -808,8 +808,6 @@ SDValue DAGTypeLegalizer::PromoteIntOp_MEMBARRIER(SDNode *N) {
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SDValue DAGTypeLegalizer::PromoteIntOp_SELECT(SDNode *N, unsigned OpNo) {
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assert(OpNo == 0 && "Only know how to promote condition");
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assert(N->getOperand(0).getValueType() == MVT::i1 &&
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"SetCC type is not legal??");
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SDValue Cond = GetPromotedInteger(N->getOperand(0));
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// Promote all the way up to SVT, the canonical SetCC type.
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@ -835,7 +833,7 @@ SDValue DAGTypeLegalizer::PromoteIntOp_SELECT(SDNode *N, unsigned OpNo) {
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ExtendCode = ISD::ZERO_EXTEND;
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if (!DAG.MaskedValueIsZero(Cond,APInt::getHighBitsSet(CondBits,CondBits-1)))
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// All extra bits need to be cleared. Do this by zero extending the
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// original MVT::i1 condition value all the way to SVT.
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// original condition value all the way to SVT.
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Cond = N->getOperand(0);
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break;
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case TargetLowering::ZeroOrNegativeOneSetCCResult: {
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@ -843,7 +841,7 @@ SDValue DAGTypeLegalizer::PromoteIntOp_SELECT(SDNode *N, unsigned OpNo) {
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unsigned SignBits = DAG.ComputeNumSignBits(Cond);
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if (SignBits != CondBits)
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// All extra bits need to be sign extended. Do this by sign extending the
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// original MVT::i1 condition value all the way to SVT.
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// original condition value all the way to SVT.
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Cond = N->getOperand(0);
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break;
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}
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