diff --git a/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp b/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
index cd5abad10ef..09c0af905ec 100644
--- a/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
+++ b/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
@@ -30,10 +30,6 @@
 #include "llvm/Support/CommandLine.h"
 using namespace llvm;
 
-namespace {
-  cl::opt<bool> SchedCommuteNodes("sched-commute-nodes", cl::Hidden);
-}
-
 namespace {
 //===----------------------------------------------------------------------===//
 /// ScheduleDAGRRList - The actual register reduction list scheduler
@@ -100,8 +96,7 @@ void ScheduleDAGRRList::Schedule() {
   
   AvailableQueue->releaseState();
 
-  if (SchedCommuteNodes)
-    CommuteNodesToReducePressure();
+  CommuteNodesToReducePressure();
   
   DEBUG(std::cerr << "*** Final schedule ***\n");
   DEBUG(dumpSchedule());
@@ -685,7 +680,7 @@ void BURegReductionPriorityQueue<SF>::AddPseudoTwoAddrDeps() {
         SUnit *SuccSU = I->first;
         if (SuccSU != SU &&
             (!canClobber(SuccSU, DUSU) ||
-             (SchedCommuteNodes && !SU->isCommutable && SuccSU->isCommutable))){
+             (!SU->isCommutable && SuccSU->isCommutable))){
           if (SuccSU->Depth == SU->Depth && !isReachable(SuccSU, SU)) {
             DEBUG(std::cerr << "Adding an edge from SU # " << SU->NodeNum
                   << " to SU #" << SuccSU->NodeNum << "\n");