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[LV] Fix PR34523 - avoid generating redundant selects

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When converting a PHI into a series of 'select' instructions to combine the
incoming values together according their edge masks, initialize the first
value to the incoming value In0 of the first predecessor, instead of
generating a redundant assignment 'select(Cond[0], In0, In0)'. The latter
fails when the Cond[0] mask is null, representing a full mask, which can
happen only when there's a single incoming value.

No functional changes intended nor expected other than surviving null Cond[0]'s.

This fix follows D35725, which introduced using null to represent full masks.

Differential Revision: https://reviews.llvm.org/D37619


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313119 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Ayal Zaks 2017-09-13 06:28:37 +00:00
parent f844eaced2
commit 3c0fd8c54b
2 changed files with 30 additions and 3 deletions
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6
lib/Transforms/Vectorize/LoopVectorize.cpp
View File

@ -4526,10 +4526,10 @@ void InnerLoopVectorizer::widenPHIInstruction(Instruction *PN, unsigned UF,
for (unsigned Part = 0; Part < UF; ++Part) {
Value *In0 = getOrCreateVectorValue(P->getIncomingValue(In), Part);
// We might have single edge PHIs (blocks) - use an identity
// 'select' for the first PHI operand.
assert((Cond[Part] || NumIncoming == 1) &&
"Multiple predecessors with one predecessor having a full mask");
if (In == 0)
Entry[Part] = Builder.CreateSelect(Cond[Part], In0, In0);
Entry[Part] = In0; // Initialize with the first incoming value.
else
// Select between the current value and the previous incoming edge
// based on the incoming mask.

27
test/Transforms/LoopVectorize/if-conversion.ll
View File

@ -168,3 +168,30 @@ cond.end:
for.end:
ret i32 %or
}
; Handle PHI with single incoming value having a full mask.
; PR34523
; CHECK-LABEL: PR34523
; CHECK: vector.body
define void @PR34523() {
bb1:
br label %bb2
bb2: ; preds = %bb4, %bb1
%i = phi i16 [ undef, %bb1 ], [ %_tmp2, %bb4 ]
br label %bb3
bb3: ; preds = %bb2
%_tmp1 = phi [1 x [1 x i32]]* [ undef, %bb2 ]
br label %bb4
bb4: ; preds = %bb3
%_tmp2 = add i16 %i, 1
%_tmp3 = icmp slt i16 %_tmp2, 2
br i1 %_tmp3, label %bb2, label %bb5
bb5: ; preds = %bb4
unreachable
}