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Soft float support for FREM.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68614 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -80,6 +80,7 @@ void DAGTypeLegalizer::SoftenFloatResult(SDNode *N, unsigned ResNo) {
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case ISD::FP_ROUND: R = SoftenFloatRes_FP_ROUND(N); break;
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case ISD::FPOW: R = SoftenFloatRes_FPOW(N); break;
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case ISD::FPOWI: R = SoftenFloatRes_FPOWI(N); break;
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case ISD::FREM: R = SoftenFloatRes_FREM(N); break;
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case ISD::FRINT: R = SoftenFloatRes_FRINT(N); break;
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case ISD::FSIN: R = SoftenFloatRes_FSIN(N); break;
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case ISD::FSQRT: R = SoftenFloatRes_FSQRT(N); break;
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@ -363,6 +364,18 @@ SDValue DAGTypeLegalizer::SoftenFloatRes_FPOWI(SDNode *N) {
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NVT, Ops, 2, false, N->getDebugLoc());
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}
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SDValue DAGTypeLegalizer::SoftenFloatRes_FREM(SDNode *N) {
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MVT NVT = TLI.getTypeToTransformTo(N->getValueType(0));
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SDValue Ops[2] = { GetSoftenedFloat(N->getOperand(0)),
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GetSoftenedFloat(N->getOperand(1)) };
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return MakeLibCall(GetFPLibCall(N->getValueType(0),
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RTLIB::REM_F32,
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RTLIB::REM_F64,
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RTLIB::REM_F80,
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RTLIB::REM_PPCF128),
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NVT, Ops, 2, false, N->getDebugLoc());
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}
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SDValue DAGTypeLegalizer::SoftenFloatRes_FRINT(SDNode *N) {
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MVT NVT = TLI.getTypeToTransformTo(N->getValueType(0));
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SDValue Op = GetSoftenedFloat(N->getOperand(0));
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@ -414,6 +414,7 @@ private:
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SDValue SoftenFloatRes_FP_ROUND(SDNode *N);
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SDValue SoftenFloatRes_FPOW(SDNode *N);
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SDValue SoftenFloatRes_FPOWI(SDNode *N);
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SDValue SoftenFloatRes_FREM(SDNode *N);
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SDValue SoftenFloatRes_FRINT(SDNode *N);
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SDValue SoftenFloatRes_FSIN(SDNode *N);
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SDValue SoftenFloatRes_FSQRT(SDNode *N);
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9
test/CodeGen/ARM/2009-04-08-FREM.ll
Normal file
9
test/CodeGen/ARM/2009-04-08-FREM.ll
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@ -0,0 +1,9 @@
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; RUN: llvm-as < %s | llc -march=arm
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declare i32 @printf(i8*, ...)
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define i32 @main() {
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%rem_r = frem double 0.000000e+00, 0.000000e+00 ; <double> [#uses=1]
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%1 = call i32 (i8*, ...)* @printf(i8* null, double %rem_r) ; <i32> [#uses=0]
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ret i32 0
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}
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