From 3e0b51ab3ba2b8e411fc9cedb7e762068671691b Mon Sep 17 00:00:00 2001 From: Misha Brukman Date: Sun, 5 Sep 2004 02:42:44 +0000 Subject: [PATCH] * Change PPC32AsmPrinter => PowerPCAsmPrinter since it is now shared between Darwin and AIX and is not 32- or 64-bit specific * Bring back PowerPC.td as a result, to make it use the `PowerPC' class name * Adjust Makefile accordingly git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16174 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/PowerPC/Makefile | 2 +- lib/Target/PowerPC/PPCAsmPrinter.cpp | 25 ++++++++-------- lib/Target/PowerPC/PowerPC.td | 45 ++++++++++++++++++++++++++++ 3 files changed, 59 insertions(+), 13 deletions(-) create mode 100644 lib/Target/PowerPC/PowerPC.td diff --git a/lib/Target/PowerPC/Makefile b/lib/Target/PowerPC/Makefile index 693b25d8f8a..d9cac3c2f8c 100644 --- a/lib/Target/PowerPC/Makefile +++ b/lib/Target/PowerPC/Makefile @@ -44,7 +44,7 @@ $(TARGET)GenCodeEmitter.inc:: PPC32.td $(TDFILES) $(TBLGEN) @echo "Building $(TARGET) code emitter" $(VERB) $(TBLGEN) -I $(SourceDir) $< -gen-emitter -o $@ -$(TARGET)GenAsmWriter.inc:: PPC32.td $(TDFILES) $(TBLGEN) +$(TARGET)GenAsmWriter.inc:: PowerPC.td $(TDFILES) $(TBLGEN) @echo "Building $(TARGET).td assembly writer with tblgen" $(VERB) $(TBLGEN) -I $(SourceDir) $< -gen-asm-writer -o $@ diff --git a/lib/Target/PowerPC/PPCAsmPrinter.cpp b/lib/Target/PowerPC/PPCAsmPrinter.cpp index b0503d2a2da..508c41918e2 100644 --- a/lib/Target/PowerPC/PPCAsmPrinter.cpp +++ b/lib/Target/PowerPC/PPCAsmPrinter.cpp @@ -40,11 +40,11 @@ using namespace llvm; namespace { Statistic<> EmittedInsts("asm-printer", "Number of machine instrs printed"); - struct PPC32AsmPrinter : public AsmPrinter { + struct PowerPCAsmPrinter : public AsmPrinter { std::set FnStubs, GVStubs, LinkOnceStubs; std::set Strings; - PPC32AsmPrinter(std::ostream &O, TargetMachine &TM) + PowerPCAsmPrinter(std::ostream &O, TargetMachine &TM) : AsmPrinter(O, TM), LabelNumber(0) {} /// Unique incrementer for label values for referencing Global values. @@ -142,12 +142,13 @@ namespace { virtual bool doFinalization(Module &M) = 0; }; - // - // - struct DarwinAsmPrinter : public PPC32AsmPrinter { + /// DarwinAsmPrinter - PowerPC assembly printer, customized for Darwin/Mac OS + /// X + /// + struct DarwinAsmPrinter : public PowerPCAsmPrinter { DarwinAsmPrinter(std::ostream &O, TargetMachine &TM) - : PPC32AsmPrinter(O, TM) { + : PowerPCAsmPrinter(O, TM) { CommentString = ";"; GlobalPrefix = "_"; ZeroDirective = "\t.space\t"; // ".space N" emits N zeros. @@ -164,15 +165,15 @@ namespace { bool doFinalization(Module &M); }; - // - // - struct AIXAsmPrinter : public PPC32AsmPrinter { + /// AIXAsmPrinter - PowerPC assembly printer, customized for AIX + /// + struct AIXAsmPrinter : public PowerPCAsmPrinter { /// Map for labels corresponding to global variables /// std::map GVToLabelMap; AIXAsmPrinter(std::ostream &O, TargetMachine &TM) - : PPC32AsmPrinter(O, TM) { + : PowerPCAsmPrinter(O, TM) { CommentString = "#"; GlobalPrefix = "_"; ZeroDirective = "\t.space\t"; // ".space N" emits N zeros. @@ -306,7 +307,7 @@ FunctionPass *llvm::createAIXAsmPrinter(std::ostream &o, TargetMachine &tm) { // Include the auto-generated portion of the assembly writer #include "PowerPCGenAsmWriter.inc" -void PPC32AsmPrinter::printOp(const MachineOperand &MO, +void PowerPCAsmPrinter::printOp(const MachineOperand &MO, bool LoadAddrOp /* = false */) { const MRegisterInfo &RI = *TM.getRegisterInfo(); int new_symbol; @@ -391,7 +392,7 @@ void PPC32AsmPrinter::printOp(const MachineOperand &MO, /// printMachineInstruction -- Print out a single PowerPC MI in Darwin syntax to /// the current output stream. /// -void PPC32AsmPrinter::printMachineInstruction(const MachineInstr *MI) { +void PowerPCAsmPrinter::printMachineInstruction(const MachineInstr *MI) { ++EmittedInsts; if (printInstruction(MI)) return; // Printer was automatically generated diff --git a/lib/Target/PowerPC/PowerPC.td b/lib/Target/PowerPC/PowerPC.td new file mode 100644 index 00000000000..f556aeeae77 --- /dev/null +++ b/lib/Target/PowerPC/PowerPC.td @@ -0,0 +1,45 @@ +//===- PowerPC.td - Describe the PowerPC Target Machine ----*- tablegen -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file was developed by the LLVM research group and is distributed under +// the University of Illinois Open Source License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// +//===----------------------------------------------------------------------===// + +// Get the target-independent interfaces which we are implementing... +// +include "../Target.td" + +//===----------------------------------------------------------------------===// +// Register File Description +//===----------------------------------------------------------------------===// + +include "PPC64RegisterInfo.td" +include "PowerPCInstrInfo.td" + +def PowerPCInstrInfo : InstrInfo { + let PHIInst = PHI; + + let TSFlagsFields = ["ArgCount", "Arg0Type", "Arg1Type", "Arg2Type", + "Arg3Type", "Arg4Type", "VMX", "PPC64"]; + let TSFlagsShifts = [ 0, 3, 8, 13, 18, 23, 28, 29 ]; +} + +def PowerPC : Target { + // Pointers on PowerPC are 64-bits in size. + let PointerType = i64; + + // According to the Mach-O Runtime ABI, these regs are nonvolatile across + // calls + let CalleeSavedRegisters = [R1, R13, R14, R15, R16, R17, R18, R19, + R20, R21, R22, R23, R24, R25, R26, R27, R28, R29, R30, R31, F14, F15, + F16, F17, F18, F19, F20, F21, F22, F23, F24, F25, F26, F27, F28, F29, + F30, F31, CR2, CR3, CR4, LR]; + + // Pull in Instruction Info: + let InstructionSet = PowerPCInstrInfo; +}