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Add a bool flag to StackObjects telling whether they reference spill

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slots.  The AsmPrinter will use this information to determine whether to
print a spill/reload comment.

Remove default argument values.  It's too easy to pass a wrong argument
value when multiple arguments have default values.  Make everything
explicit to trap bugs early.

Update all targets to adhere to the new interfaces..


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@87022 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
David Greene 2009-11-12 20:49:22 +00:00
parent 05872ea804
commit 3f2bf85d14
28 changed files with 172 additions and 103 deletions
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55
include/llvm/CodeGen/MachineFrameInfo.h
View File

@ -15,9 +15,11 @@
#define LLVM_CODEGEN_MACHINEFRAMEINFO_H #define LLVM_CODEGEN_MACHINEFRAMEINFO_H
#include "llvm/ADT/BitVector.h" #include "llvm/ADT/BitVector.h"
#include "llvm/ADT/DenseSet.h" #include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/System/DataTypes.h" #include "llvm/System/DataTypes.h"
#include <cassert> #include <cassert>
#include <limits>
#include <vector> #include <vector>
namespace llvm { namespace llvm {
@ -106,8 +108,8 @@ class MachineFrameInfo {
// cannot alias any other memory objects. // cannot alias any other memory objects.
bool isSpillSlot; bool isSpillSlot;
StackObject(uint64_t Sz, unsigned Al, int64_t SP = 0, bool IM = false, StackObject(uint64_t Sz, unsigned Al, int64_t SP, bool IM,
bool isSS = false) bool isSS)
: SPOffset(SP), Size(Sz), Alignment(Al), isImmutable(IM), : SPOffset(SP), Size(Sz), Alignment(Al), isImmutable(IM),
isSpillSlot(isSS) {} isSpillSlot(isSS) {}
}; };
@ -182,6 +184,10 @@ class MachineFrameInfo {
/// CSIValid - Has CSInfo been set yet? /// CSIValid - Has CSInfo been set yet?
bool CSIValid; bool CSIValid;
/// SpillObjects - A vector indicating which frame indices refer to
/// spill slots.
SmallVector<bool, 8> SpillObjects;
/// MMI - This field is set (via setMachineModuleInfo) by a module info /// MMI - This field is set (via setMachineModuleInfo) by a module info
/// consumer (ex. DwarfWriter) to indicate that frame layout information /// consumer (ex. DwarfWriter) to indicate that frame layout information
/// should be acquired. Typically, it's the responsibility of the target's /// should be acquired. Typically, it's the responsibility of the target's
@ -192,6 +198,7 @@ class MachineFrameInfo {
/// TargetFrameInfo - Target information about frame layout. /// TargetFrameInfo - Target information about frame layout.
/// ///
const TargetFrameInfo &TFI; const TargetFrameInfo &TFI;
public: public:
explicit MachineFrameInfo(const TargetFrameInfo &tfi) : TFI(tfi) { explicit MachineFrameInfo(const TargetFrameInfo &tfi) : TFI(tfi) {
StackSize = NumFixedObjects = OffsetAdjustment = MaxAlignment = 0; StackSize = NumFixedObjects = OffsetAdjustment = MaxAlignment = 0;
@ -341,7 +348,7 @@ public:
/// index with a negative value. /// index with a negative value.
/// ///
int CreateFixedObject(uint64_t Size, int64_t SPOffset, int CreateFixedObject(uint64_t Size, int64_t SPOffset,
bool Immutable = true); bool Immutable, bool isSS);
/// isFixedObjectIndex - Returns true if the specified index corresponds to a /// isFixedObjectIndex - Returns true if the specified index corresponds to a
@ -374,13 +381,31 @@ public:
return Objects[ObjectIdx+NumFixedObjects].Size == ~0ULL; return Objects[ObjectIdx+NumFixedObjects].Size == ~0ULL;
} }
/// CreateStackObject - Create a new statically sized stack object, returning /// CreateStackObject - Create a new statically sized stack object,
/// a nonnegative identifier to represent it. /// returning a nonnegative identifier to represent it.
/// ///
int CreateStackObject(uint64_t Size, unsigned Alignment, bool isSS = false) { int CreateStackObject(uint64_t Size, unsigned Alignment, bool isSS) {
assert(Size != 0 && "Cannot allocate zero size stack objects!"); assert(Size != 0 && "Cannot allocate zero size stack objects!");
Objects.push_back(StackObject(Size, Alignment, 0, false, isSS)); Objects.push_back(StackObject(Size, Alignment, 0, false, isSS));
return (int)Objects.size()-NumFixedObjects-1; int Index = (int)Objects.size()-NumFixedObjects-1;
assert(Index >= 0 && "Bad frame index!");
if (SpillObjects.size() <= static_cast<unsigned>(Index))
SpillObjects.resize(Index+1);
SpillObjects[Index] = false;
return Index;
}
/// CreateSpillStackObject - Create a new statically sized stack
/// object that represents a spill slot, returning a nonnegative
/// identifier to represent it.
///
int CreateSpillStackObject(uint64_t Size, unsigned Alignment) {
CreateStackObject(Size, Alignment, true);
int Index = (int)Objects.size()-NumFixedObjects-1;
if (SpillObjects.size() <= static_cast<unsigned>(Index))
SpillObjects.resize(Index+1);
SpillObjects[Index] = true;
return Index;
} }
/// RemoveStackObject - Remove or mark dead a statically sized stack object. /// RemoveStackObject - Remove or mark dead a statically sized stack object.
@ -397,10 +422,20 @@ public:
/// ///
int CreateVariableSizedObject() { int CreateVariableSizedObject() {
HasVarSizedObjects = true; HasVarSizedObjects = true;
Objects.push_back(StackObject(0, 1)); Objects.push_back(StackObject(0, 1, 0, false, false));
return (int)Objects.size()-NumFixedObjects-1; return (int)Objects.size()-NumFixedObjects-1;
} }
/// isSpillObject - Return whether the index refers to a spill slot.
///
bool isSpillObject(int Index) const {
// Negative indices can't be spill slots.
if (Index < 0) return false;
assert(static_cast<unsigned>(Index) < SpillObjects.size() &&
"Invalid frame index!");
return SpillObjects[Index];
}
/// getCalleeSavedInfo - Returns a reference to call saved info vector for the /// getCalleeSavedInfo - Returns a reference to call saved info vector for the
/// current function. /// current function.
const std::vector<CalleeSavedInfo> &getCalleeSavedInfo() const { const std::vector<CalleeSavedInfo> &getCalleeSavedInfo() const {

5
lib/CodeGen/MachineFunction.cpp
View File

@ -441,9 +441,10 @@ DebugLocTuple MachineFunction::getDebugLocTuple(DebugLoc DL) const {
/// index with a negative value. /// index with a negative value.
/// ///
int MachineFrameInfo::CreateFixedObject(uint64_t Size, int64_t SPOffset, int MachineFrameInfo::CreateFixedObject(uint64_t Size, int64_t SPOffset,
bool Immutable) { bool Immutable, bool isSS) {
assert(Size != 0 && "Cannot allocate zero size fixed stack objects!"); assert(Size != 0 && "Cannot allocate zero size fixed stack objects!");
Objects.insert(Objects.begin(), StackObject(Size, 1, SPOffset, Immutable)); Objects.insert(Objects.begin(), StackObject(Size, 1, SPOffset, Immutable,
isSS));
return -++NumFixedObjects; return -++NumFixedObjects;
} }

4
lib/CodeGen/PreAllocSplitting.cpp
View File

@ -341,7 +341,7 @@ int PreAllocSplitting::CreateSpillStackSlot(unsigned Reg,
if (I != IntervalSSMap.end()) { if (I != IntervalSSMap.end()) {
SS = I->second; SS = I->second;
} else { } else {
SS = MFI->CreateStackObject(RC->getSize(), RC->getAlignment()); SS = MFI->CreateSpillStackObject(RC->getSize(), RC->getAlignment());
IntervalSSMap[Reg] = SS; IntervalSSMap[Reg] = SS;
} }
@ -957,7 +957,7 @@ MachineInstr* PreAllocSplitting::FoldSpill(unsigned vreg,
if (I != IntervalSSMap.end()) { if (I != IntervalSSMap.end()) {
SS = I->second; SS = I->second;
} else { } else {
SS = MFI->CreateStackObject(RC->getSize(), RC->getAlignment()); SS = MFI->CreateSpillStackObject(RC->getSize(), RC->getAlignment());
} }
MachineInstr* FMI = TII->foldMemoryOperand(*MBB->getParent(), MachineInstr* FMI = TII->foldMemoryOperand(*MBB->getParent(),

3
lib/CodeGen/PrologEpilogInserter.cpp
View File

@ -264,7 +264,8 @@ void PEI::calculateCalleeSavedRegisters(MachineFunction &Fn) {
if ((unsigned)FrameIdx > MaxCSFrameIndex) MaxCSFrameIndex = FrameIdx; if ((unsigned)FrameIdx > MaxCSFrameIndex) MaxCSFrameIndex = FrameIdx;
} else { } else {
// Spill it to the stack where we must. // Spill it to the stack where we must.
FrameIdx = FFI->CreateFixedObject(RC->getSize(), FixedSlot->Offset); FrameIdx = FFI->CreateFixedObject(RC->getSize(), FixedSlot->Offset,
true, false);
} }
I->setFrameIdx(FrameIdx); I->setFrameIdx(FrameIdx);

4
lib/CodeGen/RegAllocLocal.cpp
View File

@ -261,8 +261,8 @@ int RALocal::getStackSpaceFor(unsigned VirtReg, const TargetRegisterClass *RC) {
return SS; // Already has space allocated? return SS; // Already has space allocated?
// Allocate a new stack object for this spill location... // Allocate a new stack object for this spill location...
int FrameIdx = MF->getFrameInfo()->CreateStackObject(RC->getSize(), int FrameIdx = MF->getFrameInfo()->CreateSpillStackObject(RC->getSize(),
RC->getAlignment(),true); RC->getAlignment());
// Assign the slot... // Assign the slot...
StackSlotForVirtReg[VirtReg] = FrameIdx; StackSlotForVirtReg[VirtReg] = FrameIdx;

4
lib/CodeGen/SelectionDAG/SelectionDAG.cpp
View File

@ -1379,7 +1379,7 @@ SDValue SelectionDAG::CreateStackTemporary(EVT VT, unsigned minAlign) {
unsigned StackAlign = unsigned StackAlign =
std::max((unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty), minAlign); std::max((unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty), minAlign);
int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign); int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign, false);
return getFrameIndex(FrameIdx, TLI.getPointerTy()); return getFrameIndex(FrameIdx, TLI.getPointerTy());
} }
@ -1395,7 +1395,7 @@ SDValue SelectionDAG::CreateStackTemporary(EVT VT1, EVT VT2) {
TD->getPrefTypeAlignment(Ty2)); TD->getPrefTypeAlignment(Ty2));
MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo(); MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align); int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align, false);
return getFrameIndex(FrameIdx, TLI.getPointerTy()); return getFrameIndex(FrameIdx, TLI.getPointerTy());
} }

6
lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp
View File

@ -305,7 +305,7 @@ void FunctionLoweringInfo::set(Function &fn, MachineFunction &mf,
TySize *= CUI->getZExtValue(); // Get total allocated size. TySize *= CUI->getZExtValue(); // Get total allocated size.
if (TySize == 0) TySize = 1; // Don't create zero-sized stack objects. if (TySize == 0) TySize = 1; // Don't create zero-sized stack objects.
StaticAllocaMap[AI] = StaticAllocaMap[AI] =
MF->getFrameInfo()->CreateStackObject(TySize, Align); MF->getFrameInfo()->CreateStackObject(TySize, Align, false);
} }
for (; BB != EB; ++BB) for (; BB != EB; ++BB)
@ -4439,7 +4439,7 @@ void SelectionDAGLowering::LowerCallTo(CallSite CS, SDValue Callee,
unsigned Align = TLI.getTargetData()->getPrefTypeAlignment( unsigned Align = TLI.getTargetData()->getPrefTypeAlignment(
FTy->getReturnType()); FTy->getReturnType());
MachineFunction &MF = DAG.getMachineFunction(); MachineFunction &MF = DAG.getMachineFunction();
int SSFI = MF.getFrameInfo()->CreateStackObject(TySize, Align); int SSFI = MF.getFrameInfo()->CreateStackObject(TySize, Align, false);
const Type *StackSlotPtrType = PointerType::getUnqual(FTy->getReturnType()); const Type *StackSlotPtrType = PointerType::getUnqual(FTy->getReturnType());
DemoteStackSlot = DAG.getFrameIndex(SSFI, TLI.getPointerTy()); DemoteStackSlot = DAG.getFrameIndex(SSFI, TLI.getPointerTy());
@ -5276,7 +5276,7 @@ void SelectionDAGLowering::visitInlineAsm(CallSite CS) {
uint64_t TySize = TLI.getTargetData()->getTypeAllocSize(Ty); uint64_t TySize = TLI.getTargetData()->getTypeAllocSize(Ty);
unsigned Align = TLI.getTargetData()->getPrefTypeAlignment(Ty); unsigned Align = TLI.getTargetData()->getPrefTypeAlignment(Ty);
MachineFunction &MF = DAG.getMachineFunction(); MachineFunction &MF = DAG.getMachineFunction();
int SSFI = MF.getFrameInfo()->CreateStackObject(TySize, Align); int SSFI = MF.getFrameInfo()->CreateStackObject(TySize, Align, false);
SDValue StackSlot = DAG.getFrameIndex(SSFI, TLI.getPointerTy()); SDValue StackSlot = DAG.getFrameIndex(SSFI, TLI.getPointerTy());
Chain = DAG.getStore(Chain, getCurDebugLoc(), Chain = DAG.getStore(Chain, getCurDebugLoc(),
OpInfo.CallOperand, StackSlot, NULL, 0); OpInfo.CallOperand, StackSlot, NULL, 0);

8
lib/CodeGen/VirtRegMap.cpp
View File

@ -117,8 +117,8 @@ int VirtRegMap::assignVirt2StackSlot(unsigned virtReg) {
assert(Virt2StackSlotMap[virtReg] == NO_STACK_SLOT && assert(Virt2StackSlotMap[virtReg] == NO_STACK_SLOT &&
"attempt to assign stack slot to already spilled register"); "attempt to assign stack slot to already spilled register");
const TargetRegisterClass* RC = MF->getRegInfo().getRegClass(virtReg); const TargetRegisterClass* RC = MF->getRegInfo().getRegClass(virtReg);
int SS = MF->getFrameInfo()->CreateStackObject(RC->getSize(), int SS = MF->getFrameInfo()->CreateSpillStackObject(RC->getSize(),
RC->getAlignment(), /*isSS*/true); RC->getAlignment());
if (LowSpillSlot == NO_STACK_SLOT) if (LowSpillSlot == NO_STACK_SLOT)
LowSpillSlot = SS; LowSpillSlot = SS;
if (HighSpillSlot == NO_STACK_SLOT || SS > HighSpillSlot) if (HighSpillSlot == NO_STACK_SLOT || SS > HighSpillSlot)
@ -161,8 +161,8 @@ int VirtRegMap::getEmergencySpillSlot(const TargetRegisterClass *RC) {
EmergencySpillSlots.find(RC); EmergencySpillSlots.find(RC);
if (I != EmergencySpillSlots.end()) if (I != EmergencySpillSlots.end())
return I->second; return I->second;
int SS = MF->getFrameInfo()->CreateStackObject(RC->getSize(), int SS = MF->getFrameInfo()->CreateSpillStackObject(RC->getSize(),
RC->getAlignment(), /*isSS*/true); RC->getAlignment());
if (LowSpillSlot == NO_STACK_SLOT) if (LowSpillSlot == NO_STACK_SLOT)
LowSpillSlot = SS; LowSpillSlot = SS;
if (HighSpillSlot == NO_STACK_SLOT || SS > HighSpillSlot) if (HighSpillSlot == NO_STACK_SLOT || SS > HighSpillSlot)

6
lib/Target/ARM/ARMBaseRegisterInfo.cpp
View File

@ -774,7 +774,8 @@ ARMBaseRegisterInfo::processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
// Reserve a slot closest to SP or frame pointer. // Reserve a slot closest to SP or frame pointer.
const TargetRegisterClass *RC = ARM::GPRRegisterClass; const TargetRegisterClass *RC = ARM::GPRRegisterClass;
RS->setScavengingFrameIndex(MFI->CreateStackObject(RC->getSize(), RS->setScavengingFrameIndex(MFI->CreateStackObject(RC->getSize(),
RC->getAlignment())); RC->getAlignment(),
false));
} }
} }
} }
@ -791,7 +792,8 @@ unsigned ARMBaseRegisterInfo::getRARegister() const {
return ARM::LR; return ARM::LR;
} }
unsigned ARMBaseRegisterInfo::getFrameRegister(MachineFunction &MF) const { unsigned
ARMBaseRegisterInfo::getFrameRegister(const MachineFunction &MF) const {
if (STI.isTargetDarwin() || hasFP(MF)) if (STI.isTargetDarwin() || hasFP(MF))
return FramePtr; return FramePtr;
return ARM::SP; return ARM::SP;

11
lib/Target/ARM/ARMISelLowering.cpp
View File

@ -1545,7 +1545,8 @@ ARMTargetLowering::GetF64FormalArgument(CCValAssign &VA, CCValAssign &NextVA,
if (NextVA.isMemLoc()) { if (NextVA.isMemLoc()) {
unsigned ArgSize = NextVA.getLocVT().getSizeInBits()/8; unsigned ArgSize = NextVA.getLocVT().getSizeInBits()/8;
MachineFrameInfo *MFI = MF.getFrameInfo(); MachineFrameInfo *MFI = MF.getFrameInfo();
int FI = MFI->CreateFixedObject(ArgSize, NextVA.getLocMemOffset()); int FI = MFI->CreateFixedObject(ArgSize, NextVA.getLocMemOffset(),
true, false);
// Create load node to retrieve arguments from the stack. // Create load node to retrieve arguments from the stack.
SDValue FIN = DAG.getFrameIndex(FI, getPointerTy()); SDValue FIN = DAG.getFrameIndex(FI, getPointerTy());
@ -1659,7 +1660,8 @@ ARMTargetLowering::LowerFormalArguments(SDValue Chain,
assert(VA.getValVT() != MVT::i64 && "i64 should already be lowered"); assert(VA.getValVT() != MVT::i64 && "i64 should already be lowered");
unsigned ArgSize = VA.getLocVT().getSizeInBits()/8; unsigned ArgSize = VA.getLocVT().getSizeInBits()/8;
int FI = MFI->CreateFixedObject(ArgSize, VA.getLocMemOffset()); int FI = MFI->CreateFixedObject(ArgSize, VA.getLocMemOffset(),
true, false);
// Create load nodes to retrieve arguments from the stack. // Create load nodes to retrieve arguments from the stack.
SDValue FIN = DAG.getFrameIndex(FI, getPointerTy()); SDValue FIN = DAG.getFrameIndex(FI, getPointerTy());
@ -1687,7 +1689,8 @@ ARMTargetLowering::LowerFormalArguments(SDValue Chain,
// the result of va_next. // the result of va_next.
AFI->setVarArgsRegSaveSize(VARegSaveSize); AFI->setVarArgsRegSaveSize(VARegSaveSize);
VarArgsFrameIndex = MFI->CreateFixedObject(VARegSaveSize, ArgOffset + VarArgsFrameIndex = MFI->CreateFixedObject(VARegSaveSize, ArgOffset +
VARegSaveSize - VARegSize); VARegSaveSize - VARegSize,
true, false);
SDValue FIN = DAG.getFrameIndex(VarArgsFrameIndex, getPointerTy()); SDValue FIN = DAG.getFrameIndex(VarArgsFrameIndex, getPointerTy());
SmallVector<SDValue, 4> MemOps; SmallVector<SDValue, 4> MemOps;
@ -1711,7 +1714,7 @@ ARMTargetLowering::LowerFormalArguments(SDValue Chain,
&MemOps[0], MemOps.size()); &MemOps[0], MemOps.size());
} else } else
// This will point to the next argument passed via stack. // This will point to the next argument passed via stack.
VarArgsFrameIndex = MFI->CreateFixedObject(4, ArgOffset); VarArgsFrameIndex = MFI->CreateFixedObject(4, ArgOffset, true, false);
} }
return Chain; return Chain;

6
lib/Target/Alpha/AlphaISelLowering.cpp
View File

@ -426,7 +426,7 @@ AlphaTargetLowering::LowerFormalArguments(SDValue Chain,
} }
} else { //more args } else { //more args
// Create the frame index object for this incoming parameter... // Create the frame index object for this incoming parameter...
int FI = MFI->CreateFixedObject(8, 8 * (ArgNo - 6)); int FI = MFI->CreateFixedObject(8, 8 * (ArgNo - 6), true, false);
// Create the SelectionDAG nodes corresponding to a load // Create the SelectionDAG nodes corresponding to a load
//from this parameter //from this parameter
@ -444,7 +444,7 @@ AlphaTargetLowering::LowerFormalArguments(SDValue Chain,
if (TargetRegisterInfo::isPhysicalRegister(args_int[i])) if (TargetRegisterInfo::isPhysicalRegister(args_int[i]))
args_int[i] = AddLiveIn(MF, args_int[i], &Alpha::GPRCRegClass); args_int[i] = AddLiveIn(MF, args_int[i], &Alpha::GPRCRegClass);
SDValue argt = DAG.getCopyFromReg(Chain, dl, args_int[i], MVT::i64); SDValue argt = DAG.getCopyFromReg(Chain, dl, args_int[i], MVT::i64);
int FI = MFI->CreateFixedObject(8, -8 * (6 - i)); int FI = MFI->CreateFixedObject(8, -8 * (6 - i), true, false);
if (i == 0) VarArgsBase = FI; if (i == 0) VarArgsBase = FI;
SDValue SDFI = DAG.getFrameIndex(FI, MVT::i64); SDValue SDFI = DAG.getFrameIndex(FI, MVT::i64);
LS.push_back(DAG.getStore(Chain, dl, argt, SDFI, NULL, 0)); LS.push_back(DAG.getStore(Chain, dl, argt, SDFI, NULL, 0));
@ -452,7 +452,7 @@ AlphaTargetLowering::LowerFormalArguments(SDValue Chain,
if (TargetRegisterInfo::isPhysicalRegister(args_float[i])) if (TargetRegisterInfo::isPhysicalRegister(args_float[i]))
args_float[i] = AddLiveIn(MF, args_float[i], &Alpha::F8RCRegClass); args_float[i] = AddLiveIn(MF, args_float[i], &Alpha::F8RCRegClass);
argt = DAG.getCopyFromReg(Chain, dl, args_float[i], MVT::f64); argt = DAG.getCopyFromReg(Chain, dl, args_float[i], MVT::f64);
FI = MFI->CreateFixedObject(8, - 8 * (12 - i)); FI = MFI->CreateFixedObject(8, - 8 * (12 - i), true, false);
SDFI = DAG.getFrameIndex(FI, MVT::i64); SDFI = DAG.getFrameIndex(FI, MVT::i64);
LS.push_back(DAG.getStore(Chain, dl, argt, SDFI, NULL, 0)); LS.push_back(DAG.getStore(Chain, dl, argt, SDFI, NULL, 0));
} }

3
lib/Target/Blackfin/BlackfinISelLowering.cpp
View File

@ -207,7 +207,8 @@ BlackfinTargetLowering::LowerFormalArguments(SDValue Chain,
} else { } else {
assert(VA.isMemLoc() && "CCValAssign must be RegLoc or MemLoc"); assert(VA.isMemLoc() && "CCValAssign must be RegLoc or MemLoc");
unsigned ObjSize = VA.getLocVT().getStoreSize(); unsigned ObjSize = VA.getLocVT().getStoreSize();
int FI = MFI->CreateFixedObject(ObjSize, VA.getLocMemOffset()); int FI = MFI->CreateFixedObject(ObjSize, VA.getLocMemOffset(),
true, false);
SDValue FIN = DAG.getFrameIndex(FI, MVT::i32); SDValue FIN = DAG.getFrameIndex(FI, MVT::i32);
InVals.push_back(DAG.getLoad(VA.getValVT(), dl, Chain, FIN, NULL, 0)); InVals.push_back(DAG.getLoad(VA.getValVT(), dl, Chain, FIN, NULL, 0));
} }

6
lib/Target/Blackfin/BlackfinRegisterInfo.cpp
View File

@ -368,7 +368,8 @@ processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
if (requiresRegisterScavenging(MF)) { if (requiresRegisterScavenging(MF)) {
// Reserve a slot close to SP or frame pointer. // Reserve a slot close to SP or frame pointer.
RS->setScavengingFrameIndex(MFI->CreateStackObject(RC->getSize(), RS->setScavengingFrameIndex(MFI->CreateStackObject(RC->getSize(),
RC->getAlignment())); RC->getAlignment(),
false));
} }
} }
@ -449,7 +450,8 @@ unsigned BlackfinRegisterInfo::getRARegister() const {
return BF::RETS; return BF::RETS;
} }
unsigned BlackfinRegisterInfo::getFrameRegister(MachineFunction &MF) const { unsigned
BlackfinRegisterInfo::getFrameRegister(const MachineFunction &MF) const {
return hasFP(MF) ? BF::FP : BF::SP; return hasFP(MF) ? BF::FP : BF::SP;
} }

5
lib/Target/CellSPU/SPUISelLowering.cpp
View File

@ -1090,7 +1090,7 @@ SPUTargetLowering::LowerFormalArguments(SDValue Chain,
// We need to load the argument to a virtual register if we determined // We need to load the argument to a virtual register if we determined
// above that we ran out of physical registers of the appropriate type // above that we ran out of physical registers of the appropriate type
// or we're forced to do vararg // or we're forced to do vararg
int FI = MFI->CreateFixedObject(ObjSize, ArgOffset); int FI = MFI->CreateFixedObject(ObjSize, ArgOffset, true, false);
SDValue FIN = DAG.getFrameIndex(FI, PtrVT); SDValue FIN = DAG.getFrameIndex(FI, PtrVT);
ArgVal = DAG.getLoad(ObjectVT, dl, Chain, FIN, NULL, 0); ArgVal = DAG.getLoad(ObjectVT, dl, Chain, FIN, NULL, 0);
ArgOffset += StackSlotSize; ArgOffset += StackSlotSize;
@ -1110,7 +1110,8 @@ SPUTargetLowering::LowerFormalArguments(SDValue Chain,
// Create the frame slot // Create the frame slot
for (; ArgRegIdx != NumArgRegs; ++ArgRegIdx) { for (; ArgRegIdx != NumArgRegs; ++ArgRegIdx) {
VarArgsFrameIndex = MFI->CreateFixedObject(StackSlotSize, ArgOffset); VarArgsFrameIndex = MFI->CreateFixedObject(StackSlotSize, ArgOffset,
true, false);
SDValue FIN = DAG.getFrameIndex(VarArgsFrameIndex, PtrVT); SDValue FIN = DAG.getFrameIndex(VarArgsFrameIndex, PtrVT);
SDValue ArgVal = DAG.getRegister(ArgRegs[ArgRegIdx], MVT::v16i8); SDValue ArgVal = DAG.getRegister(ArgRegs[ArgRegIdx], MVT::v16i8);
SDValue Store = DAG.getStore(Chain, dl, ArgVal, FIN, NULL, 0); SDValue Store = DAG.getStore(Chain, dl, ArgVal, FIN, NULL, 0);

2
lib/Target/MSP430/MSP430ISelLowering.cpp
View File

@ -318,7 +318,7 @@ MSP430TargetLowering::LowerCCCArguments(SDValue Chain,
<< "\n"; << "\n";
} }
// Create the frame index object for this incoming parameter... // Create the frame index object for this incoming parameter...
int FI = MFI->CreateFixedObject(ObjSize, VA.getLocMemOffset()); int FI = MFI->CreateFixedObject(ObjSize, VA.getLocMemOffset(), true, false);
// Create the SelectionDAG nodes corresponding to a load // Create the SelectionDAG nodes corresponding to a load
//from this parameter //from this parameter

4
lib/Target/MSP430/MSP430RegisterInfo.cpp
View File

@ -212,7 +212,7 @@ MSP430RegisterInfo::processFunctionBeforeFrameFinalized(MachineFunction &MF)
const { const {
// Create a frame entry for the FPW register that must be saved. // Create a frame entry for the FPW register that must be saved.
if (hasFP(MF)) { if (hasFP(MF)) {
int FrameIdx = MF.getFrameInfo()->CreateFixedObject(2, -4); int FrameIdx = MF.getFrameInfo()->CreateFixedObject(2, -4, true, false);
assert(FrameIdx == MF.getFrameInfo()->getObjectIndexBegin() && assert(FrameIdx == MF.getFrameInfo()->getObjectIndexBegin() &&
"Slot for FPW register must be last in order to be found!"); "Slot for FPW register must be last in order to be found!");
FrameIdx = 0; FrameIdx = 0;
@ -355,7 +355,7 @@ unsigned MSP430RegisterInfo::getRARegister() const {
return MSP430::PCW; return MSP430::PCW;
} }
unsigned MSP430RegisterInfo::getFrameRegister(MachineFunction &MF) const { unsigned MSP430RegisterInfo::getFrameRegister(const MachineFunction &MF) const {
return hasFP(MF) ? MSP430::FPW : MSP430::SPW; return hasFP(MF) ? MSP430::FPW : MSP430::SPW;
} }

10
lib/Target/Mips/MipsISelLowering.cpp
View File

@ -704,7 +704,7 @@ MipsTargetLowering::LowerCall(SDValue Chain, SDValue Callee,
// the stack (even if less than 4 are used as arguments) // the stack (even if less than 4 are used as arguments)
if (Subtarget->isABI_O32()) { if (Subtarget->isABI_O32()) {
int VTsize = EVT(MVT::i32).getSizeInBits()/8; int VTsize = EVT(MVT::i32).getSizeInBits()/8;
MFI->CreateFixedObject(VTsize, (VTsize*3)); MFI->CreateFixedObject(VTsize, (VTsize*3), true, false);
CCInfo.AnalyzeCallOperands(Outs, CC_MipsO32); CCInfo.AnalyzeCallOperands(Outs, CC_MipsO32);
} else } else
CCInfo.AnalyzeCallOperands(Outs, CC_Mips); CCInfo.AnalyzeCallOperands(Outs, CC_Mips);
@ -773,7 +773,7 @@ MipsTargetLowering::LowerCall(SDValue Chain, SDValue Callee,
// if O32 ABI is used. For EABI the first address is zero. // if O32 ABI is used. For EABI the first address is zero.
LastArgStackLoc = (FirstStackArgLoc + VA.getLocMemOffset()); LastArgStackLoc = (FirstStackArgLoc + VA.getLocMemOffset());
int FI = MFI->CreateFixedObject(VA.getValVT().getSizeInBits()/8, int FI = MFI->CreateFixedObject(VA.getValVT().getSizeInBits()/8,
LastArgStackLoc); LastArgStackLoc, true, false);
SDValue PtrOff = DAG.getFrameIndex(FI,getPointerTy()); SDValue PtrOff = DAG.getFrameIndex(FI,getPointerTy());
@ -849,7 +849,7 @@ MipsTargetLowering::LowerCall(SDValue Chain, SDValue Callee,
// Create the frame index only once. SPOffset here can be anything // Create the frame index only once. SPOffset here can be anything
// (this will be fixed on processFunctionBeforeFrameFinalized) // (this will be fixed on processFunctionBeforeFrameFinalized)
if (MipsFI->getGPStackOffset() == -1) { if (MipsFI->getGPStackOffset() == -1) {
FI = MFI->CreateFixedObject(4, 0); FI = MFI->CreateFixedObject(4, 0, true, false);
MipsFI->setGPFI(FI); MipsFI->setGPFI(FI);
} }
MipsFI->setGPStackOffset(LastArgStackLoc); MipsFI->setGPStackOffset(LastArgStackLoc);
@ -1002,7 +1002,7 @@ MipsTargetLowering::LowerFormalArguments(SDValue Chain,
// be used on emitPrologue) to avoid mis-calc of the first stack // be used on emitPrologue) to avoid mis-calc of the first stack
// offset on PEI::calculateFrameObjectOffsets. // offset on PEI::calculateFrameObjectOffsets.
// Arguments are always 32-bit. // Arguments are always 32-bit.
int FI = MFI->CreateFixedObject(4, 0); int FI = MFI->CreateFixedObject(4, 0, true, false);
MipsFI->recordStoreVarArgsFI(FI, -(4+(i*4))); MipsFI->recordStoreVarArgsFI(FI, -(4+(i*4)));
SDValue PtrOff = DAG.getFrameIndex(FI, getPointerTy()); SDValue PtrOff = DAG.getFrameIndex(FI, getPointerTy());
@ -1025,7 +1025,7 @@ MipsTargetLowering::LowerFormalArguments(SDValue Chain,
// offset on PEI::calculateFrameObjectOffsets. // offset on PEI::calculateFrameObjectOffsets.
// Arguments are always 32-bit. // Arguments are always 32-bit.
unsigned ArgSize = VA.getLocVT().getSizeInBits()/8; unsigned ArgSize = VA.getLocVT().getSizeInBits()/8;
int FI = MFI->CreateFixedObject(ArgSize, 0); int FI = MFI->CreateFixedObject(ArgSize, 0, true, false);
MipsFI->recordLoadArgsFI(FI, -(ArgSize+ MipsFI->recordLoadArgsFI(FI, -(ArgSize+
(FirstStackArgLoc + VA.getLocMemOffset()))); (FirstStackArgLoc + VA.getLocMemOffset())));

6
lib/Target/Mips/MipsRegisterInfo.cpp
View File

@ -287,7 +287,7 @@ void MipsRegisterInfo::adjustMipsStackFrame(MachineFunction &MF) const
} }
if (hasFP(MF)) { if (hasFP(MF)) {
MFI->setObjectOffset(MFI->CreateStackObject(RegSize, RegSize), MFI->setObjectOffset(MFI->CreateStackObject(RegSize, RegSize, true),
StackOffset); StackOffset);
MipsFI->setFPStackOffset(StackOffset); MipsFI->setFPStackOffset(StackOffset);
TopCPUSavedRegOff = StackOffset; TopCPUSavedRegOff = StackOffset;
@ -295,7 +295,7 @@ void MipsRegisterInfo::adjustMipsStackFrame(MachineFunction &MF) const
} }
if (MFI->hasCalls()) { if (MFI->hasCalls()) {
MFI->setObjectOffset(MFI->CreateStackObject(RegSize, RegSize), MFI->setObjectOffset(MFI->CreateStackObject(RegSize, RegSize, true),
StackOffset); StackOffset);
MipsFI->setRAStackOffset(StackOffset); MipsFI->setRAStackOffset(StackOffset);
TopCPUSavedRegOff = StackOffset; TopCPUSavedRegOff = StackOffset;
@ -501,7 +501,7 @@ getRARegister() const {
} }
unsigned MipsRegisterInfo:: unsigned MipsRegisterInfo::
getFrameRegister(MachineFunction &MF) const { getFrameRegister(const MachineFunction &MF) const {
return hasFP(MF) ? Mips::FP : Mips::SP; return hasFP(MF) ? Mips::FP : Mips::SP;
} }

2
lib/Target/PIC16/PIC16ISelLowering.cpp
View File

@ -1070,7 +1070,7 @@ SDValue PIC16TargetLowering::ConvertToMemOperand(SDValue Op,
// Put the value on stack. // Put the value on stack.
// Get a stack slot index and convert to es. // Get a stack slot index and convert to es.
int FI = MF.getFrameInfo()->CreateStackObject(1, 1); int FI = MF.getFrameInfo()->CreateStackObject(1, 1, false);
const char *tmpName = createESName(PAN::getTempdataLabel(FuncName)); const char *tmpName = createESName(PAN::getTempdataLabel(FuncName));
SDValue ES = DAG.getTargetExternalSymbol(tmpName, MVT::i8); SDValue ES = DAG.getTargetExternalSymbol(tmpName, MVT::i8);

35
lib/Target/PowerPC/PPCISelLowering.cpp
View File

@ -1625,7 +1625,7 @@ PPCTargetLowering::LowerFormalArguments_SVR4(
unsigned ArgSize = VA.getLocVT().getSizeInBits() / 8; unsigned ArgSize = VA.getLocVT().getSizeInBits() / 8;
int FI = MFI->CreateFixedObject(ArgSize, VA.getLocMemOffset(), int FI = MFI->CreateFixedObject(ArgSize, VA.getLocMemOffset(),
isImmutable); isImmutable, false);
// Create load nodes to retrieve arguments from the stack. // Create load nodes to retrieve arguments from the stack.
SDValue FIN = DAG.getFrameIndex(FI, PtrVT); SDValue FIN = DAG.getFrameIndex(FI, PtrVT);
@ -1690,9 +1690,10 @@ PPCTargetLowering::LowerFormalArguments_SVR4(
NumFPArgRegs * EVT(MVT::f64).getSizeInBits()/8; NumFPArgRegs * EVT(MVT::f64).getSizeInBits()/8;
VarArgsStackOffset = MFI->CreateFixedObject(PtrVT.getSizeInBits()/8, VarArgsStackOffset = MFI->CreateFixedObject(PtrVT.getSizeInBits()/8,
CCInfo.getNextStackOffset()); CCInfo.getNextStackOffset(),
true, false);
VarArgsFrameIndex = MFI->CreateStackObject(Depth, 8); VarArgsFrameIndex = MFI->CreateStackObject(Depth, 8, false);
SDValue FIN = DAG.getFrameIndex(VarArgsFrameIndex, PtrVT); SDValue FIN = DAG.getFrameIndex(VarArgsFrameIndex, PtrVT);
// The fixed integer arguments of a variadic function are // The fixed integer arguments of a variadic function are
@ -1895,7 +1896,7 @@ PPCTargetLowering::LowerFormalArguments_Darwin(
CurArgOffset = CurArgOffset + (4 - ObjSize); CurArgOffset = CurArgOffset + (4 - ObjSize);
} }
// The value of the object is its address. // The value of the object is its address.
int FI = MFI->CreateFixedObject(ObjSize, CurArgOffset); int FI = MFI->CreateFixedObject(ObjSize, CurArgOffset, true, false);
SDValue FIN = DAG.getFrameIndex(FI, PtrVT); SDValue FIN = DAG.getFrameIndex(FI, PtrVT);
InVals.push_back(FIN); InVals.push_back(FIN);
if (ObjSize==1 || ObjSize==2) { if (ObjSize==1 || ObjSize==2) {
@ -1918,7 +1919,7 @@ PPCTargetLowering::LowerFormalArguments_Darwin(
// the object. // the object.
if (GPR_idx != Num_GPR_Regs) { if (GPR_idx != Num_GPR_Regs) {
unsigned VReg = MF.addLiveIn(GPR[GPR_idx], &PPC::GPRCRegClass); unsigned VReg = MF.addLiveIn(GPR[GPR_idx], &PPC::GPRCRegClass);
int FI = MFI->CreateFixedObject(PtrByteSize, ArgOffset); int FI = MFI->CreateFixedObject(PtrByteSize, ArgOffset, true, false);
SDValue FIN = DAG.getFrameIndex(FI, PtrVT); SDValue FIN = DAG.getFrameIndex(FI, PtrVT);
SDValue Val = DAG.getCopyFromReg(Chain, dl, VReg, PtrVT); SDValue Val = DAG.getCopyFromReg(Chain, dl, VReg, PtrVT);
SDValue Store = DAG.getStore(Val.getValue(1), dl, Val, FIN, NULL, 0); SDValue Store = DAG.getStore(Val.getValue(1), dl, Val, FIN, NULL, 0);
@ -2043,7 +2044,7 @@ PPCTargetLowering::LowerFormalArguments_Darwin(
if (needsLoad) { if (needsLoad) {
int FI = MFI->CreateFixedObject(ObjSize, int FI = MFI->CreateFixedObject(ObjSize,
CurArgOffset + (ArgSize - ObjSize), CurArgOffset + (ArgSize - ObjSize),
isImmutable); isImmutable, false);
SDValue FIN = DAG.getFrameIndex(FI, PtrVT); SDValue FIN = DAG.getFrameIndex(FI, PtrVT);
ArgVal = DAG.getLoad(ObjectVT, dl, Chain, FIN, NULL, 0); ArgVal = DAG.getLoad(ObjectVT, dl, Chain, FIN, NULL, 0);
} }
@ -2076,7 +2077,7 @@ PPCTargetLowering::LowerFormalArguments_Darwin(
int Depth = ArgOffset; int Depth = ArgOffset;
VarArgsFrameIndex = MFI->CreateFixedObject(PtrVT.getSizeInBits()/8, VarArgsFrameIndex = MFI->CreateFixedObject(PtrVT.getSizeInBits()/8,
Depth); Depth, true, false);
SDValue FIN = DAG.getFrameIndex(VarArgsFrameIndex, PtrVT); SDValue FIN = DAG.getFrameIndex(VarArgsFrameIndex, PtrVT);
// If this function is vararg, store any remaining integer argument regs // If this function is vararg, store any remaining integer argument regs
@ -2289,7 +2290,8 @@ static SDValue EmitTailCallStoreFPAndRetAddr(SelectionDAG &DAG,
int NewRetAddrLoc = SPDiff + PPCFrameInfo::getReturnSaveOffset(isPPC64, int NewRetAddrLoc = SPDiff + PPCFrameInfo::getReturnSaveOffset(isPPC64,
isDarwinABI); isDarwinABI);
int NewRetAddr = MF.getFrameInfo()->CreateFixedObject(SlotSize, int NewRetAddr = MF.getFrameInfo()->CreateFixedObject(SlotSize,
NewRetAddrLoc); NewRetAddrLoc,
true, false);
EVT VT = isPPC64 ? MVT::i64 : MVT::i32; EVT VT = isPPC64 ? MVT::i64 : MVT::i32;
SDValue NewRetAddrFrIdx = DAG.getFrameIndex(NewRetAddr, VT); SDValue NewRetAddrFrIdx = DAG.getFrameIndex(NewRetAddr, VT);
Chain = DAG.getStore(Chain, dl, OldRetAddr, NewRetAddrFrIdx, Chain = DAG.getStore(Chain, dl, OldRetAddr, NewRetAddrFrIdx,
@ -2300,7 +2302,8 @@ static SDValue EmitTailCallStoreFPAndRetAddr(SelectionDAG &DAG,
if (isDarwinABI) { if (isDarwinABI) {
int NewFPLoc = int NewFPLoc =
SPDiff + PPCFrameInfo::getFramePointerSaveOffset(isPPC64, isDarwinABI); SPDiff + PPCFrameInfo::getFramePointerSaveOffset(isPPC64, isDarwinABI);
int NewFPIdx = MF.getFrameInfo()->CreateFixedObject(SlotSize, NewFPLoc); int NewFPIdx = MF.getFrameInfo()->CreateFixedObject(SlotSize, NewFPLoc,
true, false);
SDValue NewFramePtrIdx = DAG.getFrameIndex(NewFPIdx, VT); SDValue NewFramePtrIdx = DAG.getFrameIndex(NewFPIdx, VT);
Chain = DAG.getStore(Chain, dl, OldFP, NewFramePtrIdx, Chain = DAG.getStore(Chain, dl, OldFP, NewFramePtrIdx,
PseudoSourceValue::getFixedStack(NewFPIdx), 0); PseudoSourceValue::getFixedStack(NewFPIdx), 0);
@ -2317,7 +2320,7 @@ CalculateTailCallArgDest(SelectionDAG &DAG, MachineFunction &MF, bool isPPC64,
SmallVector<TailCallArgumentInfo, 8>& TailCallArguments) { SmallVector<TailCallArgumentInfo, 8>& TailCallArguments) {
int Offset = ArgOffset + SPDiff; int Offset = ArgOffset + SPDiff;
uint32_t OpSize = (Arg.getValueType().getSizeInBits()+7)/8; uint32_t OpSize = (Arg.getValueType().getSizeInBits()+7)/8;
int FI = MF.getFrameInfo()->CreateFixedObject(OpSize, Offset); int FI = MF.getFrameInfo()->CreateFixedObject(OpSize, Offset, true,false);
EVT VT = isPPC64 ? MVT::i64 : MVT::i32; EVT VT = isPPC64 ? MVT::i64 : MVT::i32;
SDValue FIN = DAG.getFrameIndex(FI, VT); SDValue FIN = DAG.getFrameIndex(FI, VT);
TailCallArgumentInfo Info; TailCallArgumentInfo Info;
@ -3224,7 +3227,8 @@ PPCTargetLowering::getReturnAddrFrameIndex(SelectionDAG & DAG) const {
// Find out what the fix offset of the frame pointer save area. // Find out what the fix offset of the frame pointer save area.
int LROffset = PPCFrameInfo::getReturnSaveOffset(IsPPC64, isDarwinABI); int LROffset = PPCFrameInfo::getReturnSaveOffset(IsPPC64, isDarwinABI);
// Allocate the frame index for frame pointer save area. // Allocate the frame index for frame pointer save area.
RASI = MF.getFrameInfo()->CreateFixedObject(IsPPC64? 8 : 4, LROffset); RASI = MF.getFrameInfo()->CreateFixedObject(IsPPC64? 8 : 4, LROffset,
true, false);
// Save the result. // Save the result.
FI->setReturnAddrSaveIndex(RASI); FI->setReturnAddrSaveIndex(RASI);
} }
@ -3250,7 +3254,8 @@ PPCTargetLowering::getFramePointerFrameIndex(SelectionDAG & DAG) const {
isDarwinABI); isDarwinABI);
// Allocate the frame index for frame pointer save area. // Allocate the frame index for frame pointer save area.
FPSI = MF.getFrameInfo()->CreateFixedObject(IsPPC64? 8 : 4, FPOffset); FPSI = MF.getFrameInfo()->CreateFixedObject(IsPPC64? 8 : 4, FPOffset,
true, false);
// Save the result. // Save the result.
FI->setFramePointerSaveIndex(FPSI); FI->setFramePointerSaveIndex(FPSI);
} }
@ -3411,7 +3416,7 @@ SDValue PPCTargetLowering::LowerSINT_TO_FP(SDValue Op, SelectionDAG &DAG) {
// then lfd it and fcfid it. // then lfd it and fcfid it.
MachineFunction &MF = DAG.getMachineFunction(); MachineFunction &MF = DAG.getMachineFunction();
MachineFrameInfo *FrameInfo = MF.getFrameInfo(); MachineFrameInfo *FrameInfo = MF.getFrameInfo();
int FrameIdx = FrameInfo->CreateStackObject(8, 8); int FrameIdx = FrameInfo->CreateStackObject(8, 8, false);
EVT PtrVT = DAG.getTargetLoweringInfo().getPointerTy(); EVT PtrVT = DAG.getTargetLoweringInfo().getPointerTy();
SDValue FIdx = DAG.getFrameIndex(FrameIdx, PtrVT); SDValue FIdx = DAG.getFrameIndex(FrameIdx, PtrVT);
@ -3469,7 +3474,7 @@ SDValue PPCTargetLowering::LowerFLT_ROUNDS_(SDValue Op, SelectionDAG &DAG) {
SDValue Chain = DAG.getNode(PPCISD::MFFS, dl, NodeTys, &InFlag, 0); SDValue Chain = DAG.getNode(PPCISD::MFFS, dl, NodeTys, &InFlag, 0);
// Save FP register to stack slot // Save FP register to stack slot
int SSFI = MF.getFrameInfo()->CreateStackObject(8, 8); int SSFI = MF.getFrameInfo()->CreateStackObject(8, 8, false);
SDValue StackSlot = DAG.getFrameIndex(SSFI, PtrVT); SDValue StackSlot = DAG.getFrameIndex(SSFI, PtrVT);
SDValue Store = DAG.getStore(DAG.getEntryNode(), dl, Chain, SDValue Store = DAG.getStore(DAG.getEntryNode(), dl, Chain,
StackSlot, NULL, 0); StackSlot, NULL, 0);
@ -4137,7 +4142,7 @@ SDValue PPCTargetLowering::LowerSCALAR_TO_VECTOR(SDValue Op,
DebugLoc dl = Op.getDebugLoc(); DebugLoc dl = Op.getDebugLoc();
// Create a stack slot that is 16-byte aligned. // Create a stack slot that is 16-byte aligned.
MachineFrameInfo *FrameInfo = DAG.getMachineFunction().getFrameInfo(); MachineFrameInfo *FrameInfo = DAG.getMachineFunction().getFrameInfo();
int FrameIdx = FrameInfo->CreateStackObject(16, 16); int FrameIdx = FrameInfo->CreateStackObject(16, 16, false);
EVT PtrVT = DAG.getTargetLoweringInfo().getPointerTy(); EVT PtrVT = DAG.getTargetLoweringInfo().getPointerTy();
SDValue FIdx = DAG.getFrameIndex(FrameIdx, PtrVT); SDValue FIdx = DAG.getFrameIndex(FrameIdx, PtrVT);

11
lib/Target/PowerPC/PPCRegisterInfo.cpp
View File

@ -1043,7 +1043,8 @@ PPCRegisterInfo::processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
int FPOffset = PPCFrameInfo::getFramePointerSaveOffset(IsPPC64, int FPOffset = PPCFrameInfo::getFramePointerSaveOffset(IsPPC64,
isDarwinABI); isDarwinABI);
// Allocate the frame index for frame pointer save area. // Allocate the frame index for frame pointer save area.
FPSI = MF.getFrameInfo()->CreateFixedObject(IsPPC64? 8 : 4, FPOffset); FPSI = MF.getFrameInfo()->CreateFixedObject(IsPPC64? 8 : 4, FPOffset,
true, false);
// Save the result. // Save the result.
FI->setFramePointerSaveIndex(FPSI); FI->setFramePointerSaveIndex(FPSI);
} }
@ -1051,7 +1052,8 @@ PPCRegisterInfo::processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
// Reserve stack space to move the linkage area to in case of a tail call. // Reserve stack space to move the linkage area to in case of a tail call.
int TCSPDelta = 0; int TCSPDelta = 0;
if (PerformTailCallOpt && (TCSPDelta = FI->getTailCallSPDelta()) < 0) { if (PerformTailCallOpt && (TCSPDelta = FI->getTailCallSPDelta()) < 0) {
MF.getFrameInfo()->CreateFixedObject(-1 * TCSPDelta, TCSPDelta); MF.getFrameInfo()->CreateFixedObject(-1 * TCSPDelta, TCSPDelta,
true, false);
} }
// Reserve a slot closest to SP or frame pointer if we have a dynalloc or // Reserve a slot closest to SP or frame pointer if we have a dynalloc or
@ -1067,7 +1069,8 @@ PPCRegisterInfo::processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
const TargetRegisterClass *G8RC = &PPC::G8RCRegClass; const TargetRegisterClass *G8RC = &PPC::G8RCRegClass;
const TargetRegisterClass *RC = IsPPC64 ? G8RC : GPRC; const TargetRegisterClass *RC = IsPPC64 ? G8RC : GPRC;
RS->setScavengingFrameIndex(MFI->CreateStackObject(RC->getSize(), RS->setScavengingFrameIndex(MFI->CreateStackObject(RC->getSize(),
RC->getAlignment())); RC->getAlignment(),
false));
} }
} }
@ -1711,7 +1714,7 @@ unsigned PPCRegisterInfo::getRARegister() const {
return !Subtarget.isPPC64() ? PPC::LR : PPC::LR8; return !Subtarget.isPPC64() ? PPC::LR : PPC::LR8;
} }
unsigned PPCRegisterInfo::getFrameRegister(MachineFunction &MF) const { unsigned PPCRegisterInfo::getFrameRegister(const MachineFunction &MF) const {
if (!Subtarget.isPPC64()) if (!Subtarget.isPPC64())
return hasFP(MF) ? PPC::R31 : PPC::R1; return hasFP(MF) ? PPC::R31 : PPC::R1;
else else

15
lib/Target/Sparc/SparcISelLowering.cpp
View File

@ -129,7 +129,8 @@ SparcTargetLowering::LowerFormalArguments(SDValue Chain,
} }
InVals.push_back(Arg); InVals.push_back(Arg);
} else { } else {
int FrameIdx = MF.getFrameInfo()->CreateFixedObject(4, ArgOffset); int FrameIdx = MF.getFrameInfo()->CreateFixedObject(4, ArgOffset,
true, false);
SDValue FIPtr = DAG.getFrameIndex(FrameIdx, MVT::i32); SDValue FIPtr = DAG.getFrameIndex(FrameIdx, MVT::i32);
SDValue Load; SDValue Load;
if (ObjectVT == MVT::i32) { if (ObjectVT == MVT::i32) {
@ -163,7 +164,8 @@ SparcTargetLowering::LowerFormalArguments(SDValue Chain,
Arg = DAG.getNode(ISD::BIT_CONVERT, dl, MVT::f32, Arg); Arg = DAG.getNode(ISD::BIT_CONVERT, dl, MVT::f32, Arg);
InVals.push_back(Arg); InVals.push_back(Arg);
} else { } else {
int FrameIdx = MF.getFrameInfo()->CreateFixedObject(4, ArgOffset); int FrameIdx = MF.getFrameInfo()->CreateFixedObject(4, ArgOffset,
true, false);
SDValue FIPtr = DAG.getFrameIndex(FrameIdx, MVT::i32); SDValue FIPtr = DAG.getFrameIndex(FrameIdx, MVT::i32);
SDValue Load = DAG.getLoad(MVT::f32, dl, Chain, FIPtr, NULL, 0); SDValue Load = DAG.getLoad(MVT::f32, dl, Chain, FIPtr, NULL, 0);
InVals.push_back(Load); InVals.push_back(Load);
@ -184,7 +186,8 @@ SparcTargetLowering::LowerFormalArguments(SDValue Chain,
MF.getRegInfo().addLiveIn(*CurArgReg++, VRegHi); MF.getRegInfo().addLiveIn(*CurArgReg++, VRegHi);
HiVal = DAG.getCopyFromReg(Chain, dl, VRegHi, MVT::i32); HiVal = DAG.getCopyFromReg(Chain, dl, VRegHi, MVT::i32);
} else { } else {
int FrameIdx = MF.getFrameInfo()->CreateFixedObject(4, ArgOffset); int FrameIdx = MF.getFrameInfo()->CreateFixedObject(4, ArgOffset,
true, false);
SDValue FIPtr = DAG.getFrameIndex(FrameIdx, MVT::i32); SDValue FIPtr = DAG.getFrameIndex(FrameIdx, MVT::i32);
HiVal = DAG.getLoad(MVT::i32, dl, Chain, FIPtr, NULL, 0); HiVal = DAG.getLoad(MVT::i32, dl, Chain, FIPtr, NULL, 0);
} }
@ -195,7 +198,8 @@ SparcTargetLowering::LowerFormalArguments(SDValue Chain,
MF.getRegInfo().addLiveIn(*CurArgReg++, VRegLo); MF.getRegInfo().addLiveIn(*CurArgReg++, VRegLo);
LoVal = DAG.getCopyFromReg(Chain, dl, VRegLo, MVT::i32); LoVal = DAG.getCopyFromReg(Chain, dl, VRegLo, MVT::i32);
} else { } else {
int FrameIdx = MF.getFrameInfo()->CreateFixedObject(4, ArgOffset+4); int FrameIdx = MF.getFrameInfo()->CreateFixedObject(4, ArgOffset+4,
true, false);
SDValue FIPtr = DAG.getFrameIndex(FrameIdx, MVT::i32); SDValue FIPtr = DAG.getFrameIndex(FrameIdx, MVT::i32);
LoVal = DAG.getLoad(MVT::i32, dl, Chain, FIPtr, NULL, 0); LoVal = DAG.getLoad(MVT::i32, dl, Chain, FIPtr, NULL, 0);
} }
@ -227,7 +231,8 @@ SparcTargetLowering::LowerFormalArguments(SDValue Chain,
MF.getRegInfo().addLiveIn(*CurArgReg, VReg); MF.getRegInfo().addLiveIn(*CurArgReg, VReg);
SDValue Arg = DAG.getCopyFromReg(DAG.getRoot(), dl, VReg, MVT::i32); SDValue Arg = DAG.getCopyFromReg(DAG.getRoot(), dl, VReg, MVT::i32);
int FrameIdx = MF.getFrameInfo()->CreateFixedObject(4, ArgOffset); int FrameIdx = MF.getFrameInfo()->CreateFixedObject(4, ArgOffset,
true, false);
SDValue FIPtr = DAG.getFrameIndex(FrameIdx, MVT::i32); SDValue FIPtr = DAG.getFrameIndex(FrameIdx, MVT::i32);
OutChains.push_back(DAG.getStore(DAG.getRoot(), dl, Arg, FIPtr, NULL, 0)); OutChains.push_back(DAG.getStore(DAG.getRoot(), dl, Arg, FIPtr, NULL, 0));

2
lib/Target/SystemZ/SystemZISelLowering.cpp
View File

@ -329,7 +329,7 @@ SystemZTargetLowering::LowerCCCArguments(SDValue Chain,
// Create the nodes corresponding to a load from this parameter slot. // Create the nodes corresponding to a load from this parameter slot.
// Create the frame index object for this incoming parameter... // Create the frame index object for this incoming parameter...
int FI = MFI->CreateFixedObject(LocVT.getSizeInBits()/8, int FI = MFI->CreateFixedObject(LocVT.getSizeInBits()/8,
VA.getLocMemOffset()); VA.getLocMemOffset(), true, false);
// Create the SelectionDAG nodes corresponding to a load // Create the SelectionDAG nodes corresponding to a load
// from this parameter // from this parameter

2
lib/Target/X86/X86FastISel.cpp
View File

@ -1493,7 +1493,7 @@ bool X86FastISel::X86SelectCall(Instruction *I) {
EVT ResVT = RVLocs[0].getValVT(); EVT ResVT = RVLocs[0].getValVT();
unsigned Opc = ResVT == MVT::f32 ? X86::ST_Fp80m32 : X86::ST_Fp80m64; unsigned Opc = ResVT == MVT::f32 ? X86::ST_Fp80m32 : X86::ST_Fp80m64;
unsigned MemSize = ResVT.getSizeInBits()/8; unsigned MemSize = ResVT.getSizeInBits()/8;
int FI = MFI.CreateStackObject(MemSize, MemSize); int FI = MFI.CreateStackObject(MemSize, MemSize, false);
addFrameReference(BuildMI(MBB, DL, TII.get(Opc)), FI).addReg(ResultReg); addFrameReference(BuildMI(MBB, DL, TII.get(Opc)), FI).addReg(ResultReg);
DstRC = ResVT == MVT::f32 DstRC = ResVT == MVT::f32
? X86::FR32RegisterClass : X86::FR64RegisterClass; ? X86::FR32RegisterClass : X86::FR64RegisterClass;

27
lib/Target/X86/X86ISelLowering.cpp
View File

@ -1381,7 +1381,7 @@ X86TargetLowering::LowerMemArgument(SDValue Chain,
// In case of tail call optimization mark all arguments mutable. Since they // In case of tail call optimization mark all arguments mutable. Since they
// could be overwritten by lowering of arguments in case of a tail call. // could be overwritten by lowering of arguments in case of a tail call.
int FI = MFI->CreateFixedObject(ValVT.getSizeInBits()/8, int FI = MFI->CreateFixedObject(ValVT.getSizeInBits()/8,
VA.getLocMemOffset(), isImmutable); VA.getLocMemOffset(), isImmutable, false);
SDValue FIN = DAG.getFrameIndex(FI, getPointerTy()); SDValue FIN = DAG.getFrameIndex(FI, getPointerTy());
if (Flags.isByVal()) if (Flags.isByVal())
return FIN; return FIN;
@ -1510,7 +1510,7 @@ X86TargetLowering::LowerFormalArguments(SDValue Chain,
// the start of the first vararg value... for expansion of llvm.va_start. // the start of the first vararg value... for expansion of llvm.va_start.
if (isVarArg) { if (isVarArg) {
if (Is64Bit || CallConv != CallingConv::X86_FastCall) { if (Is64Bit || CallConv != CallingConv::X86_FastCall) {
VarArgsFrameIndex = MFI->CreateFixedObject(1, StackSize); VarArgsFrameIndex = MFI->CreateFixedObject(1, StackSize, true, false);
} }
if (Is64Bit) { if (Is64Bit) {
unsigned TotalNumIntRegs = 0, TotalNumXMMRegs = 0; unsigned TotalNumIntRegs = 0, TotalNumXMMRegs = 0;
@ -1561,7 +1561,8 @@ X86TargetLowering::LowerFormalArguments(SDValue Chain,
VarArgsGPOffset = NumIntRegs * 8; VarArgsGPOffset = NumIntRegs * 8;
VarArgsFPOffset = TotalNumIntRegs * 8 + NumXMMRegs * 16; VarArgsFPOffset = TotalNumIntRegs * 8 + NumXMMRegs * 16;
RegSaveFrameIndex = MFI->CreateStackObject(TotalNumIntRegs * 8 + RegSaveFrameIndex = MFI->CreateStackObject(TotalNumIntRegs * 8 +
TotalNumXMMRegs * 16, 16); TotalNumXMMRegs * 16, 16,
false);
// Store the integer parameter registers. // Store the integer parameter registers.
SmallVector<SDValue, 8> MemOps; SmallVector<SDValue, 8> MemOps;
@ -1682,7 +1683,8 @@ EmitTailCallStoreRetAddr(SelectionDAG & DAG, MachineFunction &MF,
// Calculate the new stack slot for the return address. // Calculate the new stack slot for the return address.
int SlotSize = Is64Bit ? 8 : 4; int SlotSize = Is64Bit ? 8 : 4;
int NewReturnAddrFI = int NewReturnAddrFI =
MF.getFrameInfo()->CreateFixedObject(SlotSize, FPDiff-SlotSize); MF.getFrameInfo()->CreateFixedObject(SlotSize, FPDiff-SlotSize,
true, false);
EVT VT = Is64Bit ? MVT::i64 : MVT::i32; EVT VT = Is64Bit ? MVT::i64 : MVT::i32;
SDValue NewRetAddrFrIdx = DAG.getFrameIndex(NewReturnAddrFI, VT); SDValue NewRetAddrFrIdx = DAG.getFrameIndex(NewReturnAddrFI, VT);
Chain = DAG.getStore(Chain, dl, RetAddrFrIdx, NewRetAddrFrIdx, Chain = DAG.getStore(Chain, dl, RetAddrFrIdx, NewRetAddrFrIdx,
@ -1895,7 +1897,7 @@ X86TargetLowering::LowerCall(SDValue Chain, SDValue Callee,
// Create frame index. // Create frame index.
int32_t Offset = VA.getLocMemOffset()+FPDiff; int32_t Offset = VA.getLocMemOffset()+FPDiff;
uint32_t OpSize = (VA.getLocVT().getSizeInBits()+7)/8; uint32_t OpSize = (VA.getLocVT().getSizeInBits()+7)/8;
FI = MF.getFrameInfo()->CreateFixedObject(OpSize, Offset); FI = MF.getFrameInfo()->CreateFixedObject(OpSize, Offset, true, false);
FIN = DAG.getFrameIndex(FI, getPointerTy()); FIN = DAG.getFrameIndex(FI, getPointerTy());
if (Flags.isByVal()) { if (Flags.isByVal()) {
@ -2180,7 +2182,8 @@ SDValue X86TargetLowering::getReturnAddressFrameIndex(SelectionDAG &DAG) {
if (ReturnAddrIndex == 0) { if (ReturnAddrIndex == 0) {
// Set up a frame object for the return address. // Set up a frame object for the return address.
uint64_t SlotSize = TD->getPointerSize(); uint64_t SlotSize = TD->getPointerSize();
ReturnAddrIndex = MF.getFrameInfo()->CreateFixedObject(SlotSize, -SlotSize); ReturnAddrIndex = MF.getFrameInfo()->CreateFixedObject(SlotSize, -SlotSize,
true, false);
FuncInfo->setRAIndex(ReturnAddrIndex); FuncInfo->setRAIndex(ReturnAddrIndex);
} }
@ -4971,7 +4974,7 @@ SDValue X86TargetLowering::LowerSINT_TO_FP(SDValue Op, SelectionDAG &DAG) {
DebugLoc dl = Op.getDebugLoc(); DebugLoc dl = Op.getDebugLoc();
unsigned Size = SrcVT.getSizeInBits()/8; unsigned Size = SrcVT.getSizeInBits()/8;
MachineFunction &MF = DAG.getMachineFunction(); MachineFunction &MF = DAG.getMachineFunction();
int SSFI = MF.getFrameInfo()->CreateStackObject(Size, Size); int SSFI = MF.getFrameInfo()->CreateStackObject(Size, Size, false);
SDValue StackSlot = DAG.getFrameIndex(SSFI, getPointerTy()); SDValue StackSlot = DAG.getFrameIndex(SSFI, getPointerTy());
SDValue Chain = DAG.getStore(DAG.getEntryNode(), dl, Op.getOperand(0), SDValue Chain = DAG.getStore(DAG.getEntryNode(), dl, Op.getOperand(0),
StackSlot, StackSlot,
@ -5005,7 +5008,7 @@ SDValue X86TargetLowering::BuildFILD(SDValue Op, EVT SrcVT, SDValue Chain,
// shouldn't be necessary except that RFP cannot be live across // shouldn't be necessary except that RFP cannot be live across
// multiple blocks. When stackifier is fixed, they can be uncoupled. // multiple blocks. When stackifier is fixed, they can be uncoupled.
MachineFunction &MF = DAG.getMachineFunction(); MachineFunction &MF = DAG.getMachineFunction();
int SSFI = MF.getFrameInfo()->CreateStackObject(8, 8); int SSFI = MF.getFrameInfo()->CreateStackObject(8, 8, false);
SDValue StackSlot = DAG.getFrameIndex(SSFI, getPointerTy()); SDValue StackSlot = DAG.getFrameIndex(SSFI, getPointerTy());
Tys = DAG.getVTList(MVT::Other); Tys = DAG.getVTList(MVT::Other);
SmallVector<SDValue, 8> Ops; SmallVector<SDValue, 8> Ops;
@ -5215,7 +5218,7 @@ FP_TO_INTHelper(SDValue Op, SelectionDAG &DAG, bool IsSigned) {
// stack slot. // stack slot.
MachineFunction &MF = DAG.getMachineFunction(); MachineFunction &MF = DAG.getMachineFunction();
unsigned MemSize = DstTy.getSizeInBits()/8; unsigned MemSize = DstTy.getSizeInBits()/8;
int SSFI = MF.getFrameInfo()->CreateStackObject(MemSize, MemSize); int SSFI = MF.getFrameInfo()->CreateStackObject(MemSize, MemSize, false);
SDValue StackSlot = DAG.getFrameIndex(SSFI, getPointerTy()); SDValue StackSlot = DAG.getFrameIndex(SSFI, getPointerTy());
unsigned Opc; unsigned Opc;
@ -5238,7 +5241,7 @@ FP_TO_INTHelper(SDValue Op, SelectionDAG &DAG, bool IsSigned) {
}; };
Value = DAG.getNode(X86ISD::FLD, dl, Tys, Ops, 3); Value = DAG.getNode(X86ISD::FLD, dl, Tys, Ops, 3);
Chain = Value.getValue(1); Chain = Value.getValue(1);
SSFI = MF.getFrameInfo()->CreateStackObject(MemSize, MemSize); SSFI = MF.getFrameInfo()->CreateStackObject(MemSize, MemSize, false);
StackSlot = DAG.getFrameIndex(SSFI, getPointerTy()); StackSlot = DAG.getFrameIndex(SSFI, getPointerTy());
} }
@ -6762,7 +6765,7 @@ SDValue X86TargetLowering::LowerFLT_ROUNDS_(SDValue Op, SelectionDAG &DAG) {
DebugLoc dl = Op.getDebugLoc(); DebugLoc dl = Op.getDebugLoc();
// Save FP Control Word to stack slot // Save FP Control Word to stack slot
int SSFI = MF.getFrameInfo()->CreateStackObject(2, StackAlignment); int SSFI = MF.getFrameInfo()->CreateStackObject(2, StackAlignment, false);
SDValue StackSlot = DAG.getFrameIndex(SSFI, getPointerTy()); SDValue StackSlot = DAG.getFrameIndex(SSFI, getPointerTy());
SDValue Chain = DAG.getNode(X86ISD::FNSTCW16m, dl, MVT::Other, SDValue Chain = DAG.getNode(X86ISD::FNSTCW16m, dl, MVT::Other,
@ -7987,7 +7990,7 @@ X86TargetLowering::EmitInstrWithCustomInserter(MachineInstr *MI,
// Change the floating point control register to use "round towards zero" // Change the floating point control register to use "round towards zero"
// mode when truncating to an integer value. // mode when truncating to an integer value.
MachineFunction *F = BB->getParent(); MachineFunction *F = BB->getParent();
int CWFrameIdx = F->getFrameInfo()->CreateStackObject(2, 2); int CWFrameIdx = F->getFrameInfo()->CreateStackObject(2, 2, false);
addFrameReference(BuildMI(BB, DL, TII->get(X86::FNSTCW16m)), CWFrameIdx); addFrameReference(BuildMI(BB, DL, TII->get(X86::FNSTCW16m)), CWFrameIdx);
// Load the old value of the high byte of the control word... // Load the old value of the high byte of the control word...

12
lib/Target/X86/X86RegisterInfo.cpp
View File

@ -614,8 +614,8 @@ X86RegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
// Offset is a 32-bit integer. // Offset is a 32-bit integer.
int Offset = getFrameIndexOffset(MF, FrameIndex) + int Offset = getFrameIndexOffset(MF, FrameIndex) +
(int)(MI.getOperand(i + 3).getImm()); (int)(MI.getOperand(i + 3).getImm());
MI.getOperand(i + 3).ChangeToImmediate(Offset); MI.getOperand(i + 3).ChangeToImmediate(Offset);
} else { } else {
// Offset is symbolic. This is extremely rare. // Offset is symbolic. This is extremely rare.
uint64_t Offset = getFrameIndexOffset(MF, FrameIndex) + uint64_t Offset = getFrameIndexOffset(MF, FrameIndex) +
@ -651,7 +651,8 @@ X86RegisterInfo::processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
// } // }
// [EBP] // [EBP]
MFI->CreateFixedObject(-TailCallReturnAddrDelta, MFI->CreateFixedObject(-TailCallReturnAddrDelta,
(-1U*SlotSize)+TailCallReturnAddrDelta); (-1U*SlotSize)+TailCallReturnAddrDelta,
true, false);
} }
if (hasFP(MF)) { if (hasFP(MF)) {
@ -663,7 +664,8 @@ X86RegisterInfo::processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
int FrameIdx = MFI->CreateFixedObject(SlotSize, int FrameIdx = MFI->CreateFixedObject(SlotSize,
-(int)SlotSize + -(int)SlotSize +
TFI.getOffsetOfLocalArea() + TFI.getOffsetOfLocalArea() +
TailCallReturnAddrDelta); TailCallReturnAddrDelta,
true, false);
assert(FrameIdx == MFI->getObjectIndexBegin() && assert(FrameIdx == MFI->getObjectIndexBegin() &&
"Slot for EBP register must be last in order to be found!"); "Slot for EBP register must be last in order to be found!");
FrameIdx = 0; FrameIdx = 0;
@ -1275,7 +1277,7 @@ unsigned X86RegisterInfo::getRARegister() const {
: X86::EIP; // Should have dwarf #8. : X86::EIP; // Should have dwarf #8.
} }
unsigned X86RegisterInfo::getFrameRegister(MachineFunction &MF) const { unsigned X86RegisterInfo::getFrameRegister(const MachineFunction &MF) const {
return hasFP(MF) ? FramePtr : StackPtr; return hasFP(MF) ? FramePtr : StackPtr;
} }

8
lib/Target/XCore/XCoreISelLowering.cpp
View File

@ -860,7 +860,8 @@ XCoreTargetLowering::LowerCCCArguments(SDValue Chain,
} }
// Create the frame index object for this incoming parameter... // Create the frame index object for this incoming parameter...
int FI = MFI->CreateFixedObject(ObjSize, int FI = MFI->CreateFixedObject(ObjSize,
LRSaveSize + VA.getLocMemOffset()); LRSaveSize + VA.getLocMemOffset(),
true, false);
// Create the SelectionDAG nodes corresponding to a load // Create the SelectionDAG nodes corresponding to a load
//from this parameter //from this parameter
@ -884,7 +885,7 @@ XCoreTargetLowering::LowerCCCArguments(SDValue Chain,
// address // address
for (unsigned i = array_lengthof(ArgRegs) - 1; i >= FirstVAReg; --i) { for (unsigned i = array_lengthof(ArgRegs) - 1; i >= FirstVAReg; --i) {
// Create a stack slot // Create a stack slot
int FI = MFI->CreateFixedObject(4, offset); int FI = MFI->CreateFixedObject(4, offset, true, false);
if (i == FirstVAReg) { if (i == FirstVAReg) {
XFI->setVarArgsFrameIndex(FI); XFI->setVarArgsFrameIndex(FI);
} }
@ -905,7 +906,8 @@ XCoreTargetLowering::LowerCCCArguments(SDValue Chain,
} else { } else {
// This will point to the next argument passed via stack. // This will point to the next argument passed via stack.
XFI->setVarArgsFrameIndex( XFI->setVarArgsFrameIndex(
MFI->CreateFixedObject(4, LRSaveSize + CCInfo.getNextStackOffset())); MFI->CreateFixedObject(4, LRSaveSize + CCInfo.getNextStackOffset(),
true, false));
} }
} }

13
lib/Target/XCore/XCoreRegisterInfo.cpp
View File

@ -330,9 +330,10 @@ XCoreRegisterInfo::processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
int FrameIdx; int FrameIdx;
if (! isVarArg) { if (! isVarArg) {
// A fixed offset of 0 allows us to save / restore LR using entsp / retsp. // A fixed offset of 0 allows us to save / restore LR using entsp / retsp.
FrameIdx = MFI->CreateFixedObject(RC->getSize(), 0); FrameIdx = MFI->CreateFixedObject(RC->getSize(), 0, true, false);
} else { } else {
FrameIdx = MFI->CreateStackObject(RC->getSize(), RC->getAlignment()); FrameIdx = MFI->CreateStackObject(RC->getSize(), RC->getAlignment(),
false);
} }
XFI->setUsesLR(FrameIdx); XFI->setUsesLR(FrameIdx);
XFI->setLRSpillSlot(FrameIdx); XFI->setLRSpillSlot(FrameIdx);
@ -340,13 +341,15 @@ XCoreRegisterInfo::processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
if (requiresRegisterScavenging(MF)) { if (requiresRegisterScavenging(MF)) {
// Reserve a slot close to SP or frame pointer. // Reserve a slot close to SP or frame pointer.
RS->setScavengingFrameIndex(MFI->CreateStackObject(RC->getSize(), RS->setScavengingFrameIndex(MFI->CreateStackObject(RC->getSize(),
RC->getAlignment())); RC->getAlignment(),
false));
} }
if (hasFP(MF)) { if (hasFP(MF)) {
// A callee save register is used to hold the FP. // A callee save register is used to hold the FP.
// This needs saving / restoring in the epilogue / prologue. // This needs saving / restoring in the epilogue / prologue.
XFI->setFPSpillSlot(MFI->CreateStackObject(RC->getSize(), XFI->setFPSpillSlot(MFI->CreateStackObject(RC->getSize(),
RC->getAlignment())); RC->getAlignment(),
false));
} }
} }
@ -593,7 +596,7 @@ int XCoreRegisterInfo::getDwarfRegNum(unsigned RegNum, bool isEH) const {
return XCoreGenRegisterInfo::getDwarfRegNumFull(RegNum, 0); return XCoreGenRegisterInfo::getDwarfRegNumFull(RegNum, 0);
} }
unsigned XCoreRegisterInfo::getFrameRegister(MachineFunction &MF) const { unsigned XCoreRegisterInfo::getFrameRegister(const MachineFunction &MF) const {
bool FP = hasFP(MF); bool FP = hasFP(MF);
return FP ? XCore::R10 : XCore::SP; return FP ? XCore::R10 : XCore::SP;