CodeGen: Remove more ilist iterator implicit conversions, NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@249879 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Duncan P. N. Exon Smith 2015-10-09 19:13:58 +00:00
parent d578a48c6d
commit 3f2c43f3c5
7 changed files with 27 additions and 28 deletions

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@ -462,11 +462,11 @@ bool IfConverter::ReverseBranchCondition(BBInfo &BBI) {
/// getNextBlock - Returns the next block in the function blocks ordering. If /// getNextBlock - Returns the next block in the function blocks ordering. If
/// it is the end, returns NULL. /// it is the end, returns NULL.
static inline MachineBasicBlock *getNextBlock(MachineBasicBlock *BB) { static inline MachineBasicBlock *getNextBlock(MachineBasicBlock *BB) {
MachineFunction::iterator I = BB; MachineFunction::iterator I = BB->getIterator();
MachineFunction::iterator E = BB->getParent()->end(); MachineFunction::iterator E = BB->getParent()->end();
if (++I == E) if (++I == E)
return nullptr; return nullptr;
return I; return &*I;
} }
/// ValidSimple - Returns true if the 'true' block (along with its /// ValidSimple - Returns true if the 'true' block (along with its
@ -530,10 +530,10 @@ bool IfConverter::ValidTriangle(BBInfo &TrueBBI, BBInfo &FalseBBI,
MachineBasicBlock *TExit = FalseBranch ? TrueBBI.FalseBB : TrueBBI.TrueBB; MachineBasicBlock *TExit = FalseBranch ? TrueBBI.FalseBB : TrueBBI.TrueBB;
if (!TExit && blockAlwaysFallThrough(TrueBBI)) { if (!TExit && blockAlwaysFallThrough(TrueBBI)) {
MachineFunction::iterator I = TrueBBI.BB; MachineFunction::iterator I = TrueBBI.BB->getIterator();
if (++I == TrueBBI.BB->getParent()->end()) if (++I == TrueBBI.BB->getParent()->end())
return false; return false;
TExit = I; TExit = &*I;
} }
return TExit && TExit == FalseBBI.BB; return TExit && TExit == FalseBBI.BB;
} }
@ -948,10 +948,8 @@ void IfConverter::AnalyzeBlock(MachineBasicBlock *MBB,
/// candidates. /// candidates.
void IfConverter::AnalyzeBlocks(MachineFunction &MF, void IfConverter::AnalyzeBlocks(MachineFunction &MF,
std::vector<IfcvtToken*> &Tokens) { std::vector<IfcvtToken*> &Tokens) {
for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I) { for (auto &BB : MF)
MachineBasicBlock *BB = I; AnalyzeBlock(&BB, Tokens);
AnalyzeBlock(BB, Tokens);
}
// Sort to favor more complex ifcvt scheme. // Sort to favor more complex ifcvt scheme.
std::stable_sort(Tokens.begin(), Tokens.end(), IfcvtTokenCmp); std::stable_sort(Tokens.begin(), Tokens.end(), IfcvtTokenCmp);
@ -961,14 +959,14 @@ void IfConverter::AnalyzeBlocks(MachineFunction &MF,
/// that all the intervening blocks are empty (given BB can fall through to its /// that all the intervening blocks are empty (given BB can fall through to its
/// next block). /// next block).
static bool canFallThroughTo(MachineBasicBlock *BB, MachineBasicBlock *ToBB) { static bool canFallThroughTo(MachineBasicBlock *BB, MachineBasicBlock *ToBB) {
MachineFunction::iterator PI = BB; MachineFunction::iterator PI = BB->getIterator();
MachineFunction::iterator I = std::next(PI); MachineFunction::iterator I = std::next(PI);
MachineFunction::iterator TI = ToBB; MachineFunction::iterator TI = ToBB->getIterator();
MachineFunction::iterator E = BB->getParent()->end(); MachineFunction::iterator E = BB->getParent()->end();
while (I != TI) { while (I != TI) {
// Check isSuccessor to avoid case where the next block is empty, but // Check isSuccessor to avoid case where the next block is empty, but
// it's not a successor. // it's not a successor.
if (I == E || !I->empty() || !PI->isSuccessor(I)) if (I == E || !I->empty() || !PI->isSuccessor(&*I))
return false; return false;
PI = I++; PI = I++;
} }

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@ -144,7 +144,8 @@ void InterferenceCache::Entry::update(unsigned MBBNum) {
PrevPos = Start; PrevPos = Start;
} }
MachineFunction::const_iterator MFI = MF->getBlockNumbered(MBBNum); MachineFunction::const_iterator MFI =
MF->getBlockNumbered(MBBNum)->getIterator();
BlockInterference *BI = &Blocks[MBBNum]; BlockInterference *BI = &Blocks[MBBNum];
ArrayRef<SlotIndex> RegMaskSlots; ArrayRef<SlotIndex> RegMaskSlots;
ArrayRef<const uint32_t*> RegMaskBits; ArrayRef<const uint32_t*> RegMaskBits;

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@ -75,7 +75,7 @@ static CallInst *ReplaceCallWith(const char *NewFn, CallInst *CI,
Constant* FCache = M->getOrInsertFunction(NewFn, Constant* FCache = M->getOrInsertFunction(NewFn,
FunctionType::get(RetTy, ParamTys, false)); FunctionType::get(RetTy, ParamTys, false));
IRBuilder<> Builder(CI->getParent(), CI); IRBuilder<> Builder(CI->getParent(), CI->getIterator());
SmallVector<Value *, 8> Args(ArgBegin, ArgEnd); SmallVector<Value *, 8> Args(ArgBegin, ArgEnd);
CallInst *NewCI = Builder.CreateCall(FCache, Args); CallInst *NewCI = Builder.CreateCall(FCache, Args);
NewCI->setName(CI->getName()); NewCI->setName(CI->getName());
@ -167,8 +167,8 @@ static Value *LowerBSWAP(LLVMContext &Context, Value *V, Instruction *IP) {
assert(V->getType()->isIntegerTy() && "Can't bswap a non-integer type!"); assert(V->getType()->isIntegerTy() && "Can't bswap a non-integer type!");
unsigned BitSize = V->getType()->getPrimitiveSizeInBits(); unsigned BitSize = V->getType()->getPrimitiveSizeInBits();
IRBuilder<> Builder(IP->getParent(), IP); IRBuilder<> Builder(IP);
switch(BitSize) { switch(BitSize) {
default: llvm_unreachable("Unhandled type size of value to byteswap!"); default: llvm_unreachable("Unhandled type size of value to byteswap!");
@ -268,7 +268,7 @@ static Value *LowerCTPOP(LLVMContext &Context, Value *V, Instruction *IP) {
0x0000FFFF0000FFFFULL, 0x00000000FFFFFFFFULL 0x0000FFFF0000FFFFULL, 0x00000000FFFFFFFFULL
}; };
IRBuilder<> Builder(IP->getParent(), IP); IRBuilder<> Builder(IP);
unsigned BitSize = V->getType()->getPrimitiveSizeInBits(); unsigned BitSize = V->getType()->getPrimitiveSizeInBits();
unsigned WordSize = (BitSize + 63) / 64; unsigned WordSize = (BitSize + 63) / 64;
@ -301,7 +301,7 @@ static Value *LowerCTPOP(LLVMContext &Context, Value *V, Instruction *IP) {
/// instruction IP. /// instruction IP.
static Value *LowerCTLZ(LLVMContext &Context, Value *V, Instruction *IP) { static Value *LowerCTLZ(LLVMContext &Context, Value *V, Instruction *IP) {
IRBuilder<> Builder(IP->getParent(), IP); IRBuilder<> Builder(IP);
unsigned BitSize = V->getType()->getPrimitiveSizeInBits(); unsigned BitSize = V->getType()->getPrimitiveSizeInBits();
for (unsigned i = 1; i < BitSize; i <<= 1) { for (unsigned i = 1; i < BitSize; i <<= 1) {
@ -338,7 +338,7 @@ static void ReplaceFPIntrinsicWithCall(CallInst *CI, const char *Fname,
} }
void IntrinsicLowering::LowerIntrinsicCall(CallInst *CI) { void IntrinsicLowering::LowerIntrinsicCall(CallInst *CI) {
IRBuilder<> Builder(CI->getParent(), CI); IRBuilder<> Builder(CI);
LLVMContext &Context = CI->getContext(); LLVMContext &Context = CI->getContext();
const Function *Callee = CI->getCalledFunction(); const Function *Callee = CI->getCalledFunction();

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@ -512,7 +512,7 @@ bool LDVImpl::collectDebugValues(MachineFunction &mf) {
bool Changed = false; bool Changed = false;
for (MachineFunction::iterator MFI = mf.begin(), MFE = mf.end(); MFI != MFE; for (MachineFunction::iterator MFI = mf.begin(), MFE = mf.end(); MFI != MFE;
++MFI) { ++MFI) {
MachineBasicBlock *MBB = MFI; MachineBasicBlock *MBB = &*MFI;
for (MachineBasicBlock::iterator MBBI = MBB->begin(), MBBE = MBB->end(); for (MachineBasicBlock::iterator MBBI = MBB->begin(), MBBE = MBB->end();
MBBI != MBBE;) { MBBI != MBBE;) {
if (!MBBI->isDebugValue()) { if (!MBBI->isDebugValue()) {
@ -1004,11 +1004,11 @@ void UserValue::emitDebugValues(VirtRegMap *VRM, LiveIntervals &LIS,
SlotIndex Stop = I.stop(); SlotIndex Stop = I.stop();
unsigned LocNo = I.value(); unsigned LocNo = I.value();
DEBUG(dbgs() << "\t[" << Start << ';' << Stop << "):" << LocNo); DEBUG(dbgs() << "\t[" << Start << ';' << Stop << "):" << LocNo);
MachineFunction::iterator MBB = LIS.getMBBFromIndex(Start); MachineFunction::iterator MBB = LIS.getMBBFromIndex(Start)->getIterator();
SlotIndex MBBEnd = LIS.getMBBEndIdx(MBB); SlotIndex MBBEnd = LIS.getMBBEndIdx(&*MBB);
DEBUG(dbgs() << " BB#" << MBB->getNumber() << '-' << MBBEnd); DEBUG(dbgs() << " BB#" << MBB->getNumber() << '-' << MBBEnd);
insertDebugValue(MBB, Start, LocNo, LIS, TII); insertDebugValue(&*MBB, Start, LocNo, LIS, TII);
// This interval may span multiple basic blocks. // This interval may span multiple basic blocks.
// Insert a DBG_VALUE into each one. // Insert a DBG_VALUE into each one.
while(Stop > MBBEnd) { while(Stop > MBBEnd) {
@ -1016,9 +1016,9 @@ void UserValue::emitDebugValues(VirtRegMap *VRM, LiveIntervals &LIS,
Start = MBBEnd; Start = MBBEnd;
if (++MBB == MFEnd) if (++MBB == MFEnd)
break; break;
MBBEnd = LIS.getMBBEndIdx(MBB); MBBEnd = LIS.getMBBEndIdx(&*MBB);
DEBUG(dbgs() << " BB#" << MBB->getNumber() << '-' << MBBEnd); DEBUG(dbgs() << " BB#" << MBB->getNumber() << '-' << MBBEnd);
insertDebugValue(MBB, Start, LocNo, LIS, TII); insertDebugValue(&*MBB, Start, LocNo, LIS, TII);
} }
DEBUG(dbgs() << '\n'); DEBUG(dbgs() << '\n');
if (MBB == MFEnd) if (MBB == MFEnd)

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@ -224,7 +224,7 @@ void LiveIntervals::computeRegMasks() {
// Find all instructions with regmask operands. // Find all instructions with regmask operands.
for (MachineFunction::iterator MBBI = MF->begin(), E = MF->end(); for (MachineFunction::iterator MBBI = MF->begin(), E = MF->end();
MBBI != E; ++MBBI) { MBBI != E; ++MBBI) {
MachineBasicBlock *MBB = MBBI; MachineBasicBlock *MBB = &*MBBI;
std::pair<unsigned, unsigned> &RMB = RegMaskBlocks[MBB->getNumber()]; std::pair<unsigned, unsigned> &RMB = RegMaskBlocks[MBB->getNumber()];
RMB.first = RegMaskSlots.size(); RMB.first = RegMaskSlots.size();
for (MachineBasicBlock::iterator MI = MBB->begin(), ME = MBB->end(); for (MachineBasicBlock::iterator MI = MBB->begin(), ME = MBB->end();
@ -302,7 +302,7 @@ void LiveIntervals::computeLiveInRegUnits() {
// Check all basic blocks for live-ins. // Check all basic blocks for live-ins.
for (MachineFunction::const_iterator MFI = MF->begin(), MFE = MF->end(); for (MachineFunction::const_iterator MFI = MF->begin(), MFE = MF->end();
MFI != MFE; ++MFI) { MFI != MFE; ++MFI) {
const MachineBasicBlock *MBB = MFI; const MachineBasicBlock *MBB = &*MFI;
// We only care about ABI blocks: Entry + landing pads. // We only care about ABI blocks: Entry + landing pads.
if ((MFI != MF->begin() && !MBB->isEHPad()) || MBB->livein_empty()) if ((MFI != MF->begin() && !MBB->isEHPad()) || MBB->livein_empty())

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@ -637,7 +637,7 @@ bool LiveVariables::runOnMachineFunction(MachineFunction &mf) {
// function. This guarantees that we will see the definition of a virtual // function. This guarantees that we will see the definition of a virtual
// register before its uses due to dominance properties of SSA (except for PHI // register before its uses due to dominance properties of SSA (except for PHI
// nodes, which are treated as a special case). // nodes, which are treated as a special case).
MachineBasicBlock *Entry = MF->begin(); MachineBasicBlock *Entry = &MF->front();
SmallPtrSet<MachineBasicBlock*,16> Visited; SmallPtrSet<MachineBasicBlock*,16> Visited;
for (MachineBasicBlock *MBB : depth_first_ext(Entry, Visited)) { for (MachineBasicBlock *MBB : depth_first_ext(Entry, Visited)) {

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@ -325,7 +325,7 @@ bool LocalStackSlotPass::insertFrameReferenceRegisters(MachineFunction &Fn) {
// Sort the frame references by local offset // Sort the frame references by local offset
array_pod_sort(FrameReferenceInsns.begin(), FrameReferenceInsns.end()); array_pod_sort(FrameReferenceInsns.begin(), FrameReferenceInsns.end());
MachineBasicBlock *Entry = Fn.begin(); MachineBasicBlock *Entry = &Fn.front();
unsigned BaseReg = 0; unsigned BaseReg = 0;
int64_t BaseOffset = 0; int64_t BaseOffset = 0;