diff --git a/lib/Target/X86/X86ISelDAGToDAG.cpp b/lib/Target/X86/X86ISelDAGToDAG.cpp index 55de3120b69..c16fbe03ec5 100644 --- a/lib/Target/X86/X86ISelDAGToDAG.cpp +++ b/lib/Target/X86/X86ISelDAGToDAG.cpp @@ -258,16 +258,24 @@ namespace { void emitSpecialCodeForMain(); inline void getAddressOperands(X86ISelAddressMode &AM, const SDLoc &DL, - SDValue &Base, SDValue &Scale, + MVT VT, SDValue &Base, SDValue &Scale, SDValue &Index, SDValue &Disp, SDValue &Segment) { - Base = (AM.BaseType == X86ISelAddressMode::FrameIndexBase) - ? CurDAG->getTargetFrameIndex( - AM.Base_FrameIndex, - TLI->getPointerTy(CurDAG->getDataLayout())) - : AM.Base_Reg; + if (AM.BaseType == X86ISelAddressMode::FrameIndexBase) + Base = CurDAG->getTargetFrameIndex( + AM.Base_FrameIndex, TLI->getPointerTy(CurDAG->getDataLayout())); + else if (AM.Base_Reg.getNode()) + Base = AM.Base_Reg; + else + Base = CurDAG->getRegister(0, VT); + Scale = getI8Imm(AM.Scale, DL); - Index = AM.IndexReg; + + if (AM.IndexReg.getNode()) + Index = AM.IndexReg; + else + Index = CurDAG->getRegister(0, VT); + // These are 32-bit even in 64-bit mode since RIP-relative offset // is 32-bit. if (AM.GV) @@ -2021,17 +2029,14 @@ bool X86DAGToDAGISel::selectVectorAddr(SDNode *Parent, SDValue N, SDValue &Base, if (AddrSpace == 258) AM.Segment = CurDAG->getRegister(X86::SS, MVT::i16); + SDLoc DL(N); + MVT VT = N.getSimpleValueType(); + // Try to match into the base and displacement fields. if (matchVectorAddress(N, AM)) return false; - MVT VT = N.getSimpleValueType(); - if (AM.BaseType == X86ISelAddressMode::RegBase) { - if (!AM.Base_Reg.getNode()) - AM.Base_Reg = CurDAG->getRegister(0, VT); - } - - getAddressOperands(AM, SDLoc(N), Base, Scale, Index, Disp, Segment); + getAddressOperands(AM, DL, VT, Base, Scale, Index, Disp, Segment); return true; } @@ -2073,15 +2078,7 @@ bool X86DAGToDAGISel::selectAddr(SDNode *Parent, SDValue N, SDValue &Base, if (matchAddress(N, AM)) return false; - if (AM.BaseType == X86ISelAddressMode::RegBase) { - if (!AM.Base_Reg.getNode()) - AM.Base_Reg = CurDAG->getRegister(0, VT); - } - - if (!AM.IndexReg.getNode()) - AM.IndexReg = CurDAG->getRegister(0, VT); - - getAddressOperands(AM, DL, Base, Scale, Index, Disp, Segment); + getAddressOperands(AM, DL, VT, Base, Scale, Index, Disp, Segment); return true; } @@ -2262,18 +2259,13 @@ bool X86DAGToDAGISel::selectLEAAddr(SDValue N, AM.Segment = Copy; unsigned Complexity = 0; - if (AM.BaseType == X86ISelAddressMode::RegBase) - if (AM.Base_Reg.getNode()) - Complexity = 1; - else - AM.Base_Reg = CurDAG->getRegister(0, VT); + if (AM.BaseType == X86ISelAddressMode::RegBase && AM.Base_Reg.getNode()) + Complexity = 1; else if (AM.BaseType == X86ISelAddressMode::FrameIndexBase) Complexity = 4; if (AM.IndexReg.getNode()) Complexity++; - else - AM.IndexReg = CurDAG->getRegister(0, VT); // Don't match just leal(,%reg,2). It's cheaper to do addl %reg, %reg, or with // a simple shift. @@ -2300,7 +2292,7 @@ bool X86DAGToDAGISel::selectLEAAddr(SDValue N, if (Complexity <= 2) return false; - getAddressOperands(AM, DL, Base, Scale, Index, Disp, Segment); + getAddressOperands(AM, DL, VT, Base, Scale, Index, Disp, Segment); return true; } @@ -2314,17 +2306,15 @@ bool X86DAGToDAGISel::selectTLSADDRAddr(SDValue N, SDValue &Base, X86ISelAddressMode AM; AM.GV = GA->getGlobal(); AM.Disp += GA->getOffset(); - AM.Base_Reg = CurDAG->getRegister(0, N.getValueType()); AM.SymbolFlags = GA->getTargetFlags(); - if (N.getValueType() == MVT::i32) { + MVT VT = N.getSimpleValueType(); + if (VT == MVT::i32) { AM.Scale = 1; AM.IndexReg = CurDAG->getRegister(X86::EBX, MVT::i32); - } else { - AM.IndexReg = CurDAG->getRegister(0, MVT::i64); } - getAddressOperands(AM, SDLoc(N), Base, Scale, Index, Disp, Segment); + getAddressOperands(AM, SDLoc(N), VT, Base, Scale, Index, Disp, Segment); return true; }