From 40b928c9fe1f9fc7f7ffff720b029293aaac7fc1 Mon Sep 17 00:00:00 2001
From: Igor Breger <igor.breger@intel.com>
Date: Mon, 26 Oct 2015 12:26:34 +0000
Subject: [PATCH] AVX-512: Use correct extract vector length.

Bug https://llvm.org/bugs/show_bug.cgi?id=25318

Differential Revision: http://reviews.llvm.org/D14062

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@251285 91177308-0d34-0410-b5e6-96231b3b80d8
---
 lib/Target/X86/X86InstrAVX512.td           |  2 +-
 test/CodeGen/X86/vector-shuffle-512-v16.ll | 11 +++++++++++
 2 files changed, 12 insertions(+), 1 deletion(-)

diff --git a/lib/Target/X86/X86InstrAVX512.td b/lib/Target/X86/X86InstrAVX512.td
index 7004fa144dc..5a2a9c7d788 100644
--- a/lib/Target/X86/X86InstrAVX512.td
+++ b/lib/Target/X86/X86InstrAVX512.td
@@ -739,7 +739,7 @@ defm : vextract_for_size_lowering<"VEXTRACTI32x4Z", v8i64_info, v2i64x_info,
           vextract128_extract, EXTRACT_get_vextract128_imm, [HasAVX512, NoDQI]>;
 
 defm : vextract_for_size_lowering<"VEXTRACTF64x4Z", v16f32_info, v8f32x_info,
-          vextract128_extract, EXTRACT_get_vextract128_imm, [HasAVX512, NoDQI]>;
+          vextract256_extract, EXTRACT_get_vextract256_imm, [HasAVX512, NoDQI]>;
 defm : vextract_for_size_lowering<"VEXTRACTI64x4Z", v16i32_info, v8i32x_info,
           vextract256_extract, EXTRACT_get_vextract256_imm, [HasAVX512, NoDQI]>;
 
diff --git a/test/CodeGen/X86/vector-shuffle-512-v16.ll b/test/CodeGen/X86/vector-shuffle-512-v16.ll
index 32f1204987e..a621a369d3e 100644
--- a/test/CodeGen/X86/vector-shuffle-512-v16.ll
+++ b/test/CodeGen/X86/vector-shuffle-512-v16.ll
@@ -120,3 +120,14 @@ define <16 x i32> @shuffle_v16i32_0_1_2_13_u_u_u_u_u_u_u_u_u_u_u_u(<16 x i32> %a
   ret <16 x i32> %c
 }
 
+define <8 x float> @shuffle_v16f32_extract_256(float* %RET, float* %a) {
+; ALL-LABEL: shuffle_v16f32_extract_256:
+; ALL:       # BB#0:
+; ALL-NEXT:    vmovups (%rsi), %zmm0
+; ALL-NEXT:    vextractf64x4 $1, %zmm0, %ymm0
+; ALL-NEXT:    retq
+  %ptr_a = bitcast float* %a to <16 x float>*
+  %v_a = load <16 x float>, <16 x float>* %ptr_a, align 4
+  %v2 = shufflevector <16 x float> %v_a, <16 x float> undef, <8 x i32>  <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
+  ret <8 x float> %v2
+}