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AMDGPU: Disallow flat_scr in SI assembler

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254459 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Matt Arsenault 2015-12-01 20:31:08 +00:00
parent d89494bf03
commit 418d565e54
2 changed files with 52 additions and 3 deletions
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27
lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
View File

@ -332,6 +332,14 @@ class AMDGPUAsmParser : public MCTargetAsmParser {
unsigned ForcedEncodingSize;
bool isSI() const {
return STI->getFeatureBits()[AMDGPU::FeatureSouthernIslands];
}
bool isCI() const {
return STI->getFeatureBits()[AMDGPU::FeatureSeaIslands];
}
bool isVI() const {
return getSTI().getFeatureBits()[AMDGPU::FeatureVolcanicIslands];
}
@ -504,12 +512,14 @@ bool AMDGPUAsmParser::ParseRegister(unsigned &RegNo, SMLoc &StartLoc, SMLoc &End
const AsmToken Tok = Parser.getTok();
StartLoc = Tok.getLoc();
EndLoc = Tok.getEndLoc();
const MCRegisterInfo *TRI = getContext().getRegisterInfo();
StringRef RegName = Tok.getString();
RegNo = getRegForName(RegName);
if (RegNo) {
Parser.Lex();
return false;
return !subtargetHasRegister(*TRI, RegNo);
}
// Match vgprs and sgprs
@ -562,7 +572,6 @@ bool AMDGPUAsmParser::ParseRegister(unsigned &RegNo, SMLoc &StartLoc, SMLoc &End
}
}
const MCRegisterInfo *TRI = getContext().getRegisterInfo();
int RCID = getRegClass(IsVgpr, RegWidth);
if (RCID == -1)
return true;
@ -980,9 +989,21 @@ bool AMDGPUAsmParser::ParseDirective(AsmToken DirectiveID) {
bool AMDGPUAsmParser::subtargetHasRegister(const MCRegisterInfo &MRI,
unsigned RegNo) const {
if (!isVI())
if (isCI())
return true;
if (isSI()) {
// No flat_scr
switch (RegNo) {
case AMDGPU::FLAT_SCR:
case AMDGPU::FLAT_SCR_LO:
case AMDGPU::FLAT_SCR_HI:
return false;
default:
return true;
}
}
// VI only has 102 SGPRs, so make sure we aren't trying to use the 2 more that
// SI/CI have.
for (MCRegAliasIterator R(AMDGPU::SGPR102_SGPR103, &MRI, true);

28
test/MC/AMDGPU/flat-scratch.s Normal file
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@ -0,0 +1,28 @@
// RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti %s 2>&1 | FileCheck -check-prefix=GCN -check-prefix=SI %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=hawaii %s 2>&1 | FileCheck -check-prefix=GCN -check-prefix=CI %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga %s 2>&1 | FileCheck -check-prefix=GCN -check-prefix=VI %s
s_mov_b64 flat_scratch, -1
// SI: error: invalid operand for instruction
// CI-NOT: error
// VI-NOT: error
s_mov_b32 flat_scratch_lo, -1
// SI: error: invalid operand for instruction
// CI-NOT: error
// VI-NOT: error
s_mov_b32 flat_scratch_hi, -1
// SI: error: invalid operand for instruction
// CI-NOT: error
// VI-NOT: error
s_mov_b64 flat_scratch_lo, -1
// GCN: error: invalid operand for instruction
s_mov_b64 flat_scratch_hi, -1
// GCN: error: invalid operand for instruction
s_mov_b32 flat_scratch, -1
// GCN: error: invalid operand for instruction