[InstCombine] allow vector constants for cast+icmp fold

This is step 1 of unknown towards fixing PR28001:
https://llvm.org/bugs/show_bug.cgi?id=28001



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@271810 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Sanjay Patel 2016-06-04 22:04:05 +00:00
parent b6dac61a73
commit 4239e23ef8
3 changed files with 13 additions and 9 deletions

View File

@ -2439,7 +2439,7 @@ Instruction *InstCombiner::visitICmpInstWithCastAndCast(ICmpInst &ICI) {
}
// If we aren't dealing with a constant on the RHS, exit early.
auto *CI = dyn_cast<ConstantInt>(ICI.getOperand(1));
auto *CI = dyn_cast<Constant>(ICI.getOperand(1));
if (!CI)
return nullptr;

View File

@ -214,12 +214,9 @@ define i1 @test19(i32 %X) {
ret i1 %Z
}
; FIXME: Vector should be the same as scalar.
define <2 x i1> @test19vec(<2 x i32> %X) {
; CHECK-LABEL: @test19vec(
; CHECK-NEXT: [[C:%.*]] = sext <2 x i32> %X to <2 x i64>
; CHECK-NEXT: [[Z:%.*]] = icmp slt <2 x i64> [[C]], <i64 12345, i64 2147483647>
; CHECK-NEXT: [[Z:%.*]] = icmp slt <2 x i32> %X, <i32 12345, i32 2147483647>
; CHECK-NEXT: ret <2 x i1> [[Z]]
;
%c = sext <2 x i32> %X to <2 x i64>
@ -227,6 +224,16 @@ define <2 x i1> @test19vec(<2 x i32> %X) {
ret <2 x i1> %Z
}
define <3 x i1> @test19vec2(<3 x i1> %X) {
; CHECK-LABEL: @test19vec2(
; CHECK-NEXT: [[CMPEQ:%.*]] = icmp eq <3 x i1> %X, zeroinitializer
; CHECK-NEXT: ret <3 x i1> [[CMPEQ]]
;
%sext = sext <3 x i1> %X to <3 x i32>
%cmpeq = icmp eq <3 x i32> %sext, zeroinitializer
ret <3 x i1> %cmpeq
}
define i1 @test20(i1 %B) {
; CHECK-LABEL: @test20(
; CHECK-NEXT: ret i1 false

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@ -13,12 +13,9 @@ define i1 @scalar_zext_slt(i16 %t4) {
ret i1 %t6
}
; FIXME: Vector compare should work the same as scalar.
define <4 x i1> @vector_zext_slt(<4 x i16> %t4) {
; CHECK-LABEL: @vector_zext_slt(
; CHECK-NEXT: [[T5:%.*]] = zext <4 x i16> %t4 to <4 x i32>
; CHECK-NEXT: [[T6:%.*]] = icmp ult <4 x i32> [[T5]], <i32 500, i32 0, i32 501, i32 65535>
; CHECK-NEXT: [[T6:%.*]] = icmp ult <4 x i16> %t4, <i16 500, i16 0, i16 501, i16 -1>
; CHECK-NEXT: ret <4 x i1> [[T6]]
;
%t5 = zext <4 x i16> %t4 to <4 x i32>