mirror of
https://github.com/RPCS3/llvm.git
synced 2024-11-29 14:40:39 +00:00
CodeGen still defaults to non-verbose asm, but llc now overrides it and default to verbose.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67668 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
parent
7db860d4de
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42bf74be14
@ -104,14 +104,22 @@ namespace llvm {
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/// IsInTextSection - True if the current section we are emitting to is a
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/// text section.
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bool IsInTextSection;
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/// VerboseAsm - Emit comments in assembly output if this is true.
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///
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bool VerboseAsm;
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protected:
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AsmPrinter(raw_ostream &o, TargetMachine &TM,
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const TargetAsmInfo *T, bool F);
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const TargetAsmInfo *T, bool F, bool V);
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public:
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virtual ~AsmPrinter();
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/// isVerbose - Return true if assembly output should contain comments.
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///
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bool isVerbose() const { return VerboseAsm; }
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/// SwitchToTextSection - Switch to the specified section of the executable
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/// if we are not already in it! If GV is non-null and if the global has an
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/// explicitly requested section, we switch to the section indicated for the
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@ -174,6 +174,7 @@ public:
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static Reloc::Model getRelocationModel();
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/// setRelocationModel - Sets the code generation relocation model.
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///
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static void setRelocationModel(Reloc::Model Model);
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/// getCodeModel - Returns the code model. The choices are small, kernel,
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@ -181,8 +182,17 @@ public:
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static CodeModel::Model getCodeModel();
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/// setCodeModel - Sets the code model.
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///
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static void setCodeModel(CodeModel::Model Model);
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/// getAsmVerbosityDefault - Returns the default value of asm verbosity.
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///
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static bool getAsmVerbosityDefault();
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/// setAsmVerbosityDefault - Set the default value of asm verbosity. Default
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/// is false.
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static void setAsmVerbosityDefault(bool);
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/// CodeGenFileType - These enums are meant to be passed into
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/// addPassesToEmitFile to indicate what type of file to emit.
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enum CodeGenFileType {
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@ -319,8 +329,8 @@ public:
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/// addAssemblyEmitter - This pass should be overridden by the target to add
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/// the asmprinter, if asm emission is supported. If this is not supported,
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/// 'true' should be returned.
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virtual bool addAssemblyEmitter(PassManagerBase &, bool /*Fast*/,
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raw_ostream &) {
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virtual bool addAssemblyEmitter(PassManagerBase &, bool /*Fast*/,
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bool /* VerboseAsmDefault */, raw_ostream &) {
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return true;
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}
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@ -104,10 +104,6 @@ namespace llvm {
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/// realigned, if needed.
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extern bool RealignStack;
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/// VerboseAsm - When this flag is set, the asm printer prints additional
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/// comments to asm directives.
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extern bool VerboseAsm;
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/// DisableJumpTables - This flag indicates jump tables should not be
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/// generated.
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extern bool DisableJumpTables;
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@ -21,6 +21,7 @@
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#include "llvm/CodeGen/MachineJumpTableInfo.h"
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#include "llvm/CodeGen/MachineModuleInfo.h"
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#include "llvm/CodeGen/DwarfWriter.h"
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#include "llvm/Support/CommandLine.h"
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#include "llvm/Support/Mangler.h"
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#include "llvm/Support/raw_ostream.h"
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#include "llvm/Target/TargetAsmInfo.h"
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@ -35,13 +36,23 @@
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#include <cerrno>
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using namespace llvm;
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static cl::opt<cl::boolOrDefault>
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AsmVerbose("asm-verbose", cl::desc("Add comments to directives."),
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cl::init(cl::BOU_UNSET));
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char AsmPrinter::ID = 0;
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AsmPrinter::AsmPrinter(raw_ostream &o, TargetMachine &tm,
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const TargetAsmInfo *T, bool F)
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const TargetAsmInfo *T, bool F, bool VDef)
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: MachineFunctionPass(&ID), FunctionNumber(0), Fast(F), O(o),
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TM(tm), TAI(T), TRI(tm.getRegisterInfo()),
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IsInTextSection(false)
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{}
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{
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switch (AsmVerbose) {
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case cl::BOU_UNSET: VerboseAsm = VDef; break;
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case cl::BOU_TRUE: VerboseAsm = true; break;
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case cl::BOU_FALSE: VerboseAsm = false; break;
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}
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}
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AsmPrinter::~AsmPrinter() {
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for (gcp_iterator I = GCMetadataPrinters.begin(),
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@ -1072,7 +1072,7 @@ public:
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Asm->EOL("Offset");
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} else if (Reg < 64) {
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Asm->EmitInt8(DW_CFA_offset + Reg);
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if (VerboseAsm)
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if (Asm->isVerbose())
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Asm->EOL("DW_CFA_offset + Reg (" + utostr(Reg) + ")");
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else
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Asm->EOL();
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@ -2197,7 +2197,7 @@ private:
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// Emit the code (index) for the abbreviation.
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Asm->EmitULEB128Bytes(AbbrevNumber);
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if (VerboseAsm)
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if (Asm->isVerbose())
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Asm->EOL(std::string("Abbrev [" +
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utostr(AbbrevNumber) +
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"] 0x" + utohexstr(Die->getOffset()) +
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@ -2487,7 +2487,7 @@ private:
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// Isolate current sections line info.
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const std::vector<SrcLineInfo> &LineInfos = SectionSourceLines[j];
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if (VerboseAsm) {
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if (Asm->isVerbose()) {
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const Section* S = SectionMap[j + 1];
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O << '\t' << TAI->getCommentString() << " Section"
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<< S->getName() << '\n';
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@ -2504,7 +2504,7 @@ private:
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unsigned LabelID = MMI->MappedLabel(LineInfo.getLabelID());
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if (!LabelID) continue;
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if (!VerboseAsm)
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if (!Asm->isVerbose())
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Asm->EOL();
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else {
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std::pair<unsigned, unsigned> SourceID =
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@ -76,7 +76,7 @@ LLVMTargetMachine::addPassesToEmitFile(PassManagerBase &PM,
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default:
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break;
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case TargetMachine::AssemblyFile:
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if (addAssemblyEmitter(PM, Fast, Out))
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if (addAssemblyEmitter(PM, Fast, getAsmVerbosityDefault(), Out))
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return FileModel::Error;
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return FileModel::AsmFile;
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case TargetMachine::ObjectFile:
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@ -91,7 +91,7 @@ inline static const char *ARMCondCodeToString(ARMCC::CondCodes CC) {
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FunctionPass *createARMISelDag(ARMTargetMachine &TM);
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FunctionPass *createARMCodePrinterPass(raw_ostream &O,
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ARMTargetMachine &TM,
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bool Fast);
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bool Fast, bool Verbose);
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FunctionPass *createARMCodeEmitterPass(ARMTargetMachine &TM,
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MachineCodeEmitter &MCE);
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FunctionPass *createARMLoadStoreOptimizationPass();
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@ -156,11 +156,11 @@ bool ARMTargetMachine::addPreEmitPass(PassManagerBase &PM, bool Fast) {
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}
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bool ARMTargetMachine::addAssemblyEmitter(PassManagerBase &PM, bool Fast,
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raw_ostream &Out) {
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bool Verbose, raw_ostream &Out) {
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// Output assembly language.
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assert(AsmPrinterCtor && "AsmPrinter was not linked in");
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if (AsmPrinterCtor)
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PM.add(AsmPrinterCtor(Out, *this, Fast));
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PM.add(AsmPrinterCtor(Out, *this, Fast, Verbose));
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return false;
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}
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@ -177,7 +177,7 @@ bool ARMTargetMachine::addCodeEmitter(PassManagerBase &PM, bool Fast,
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if (DumpAsm) {
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assert(AsmPrinterCtor && "AsmPrinter was not linked in");
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if (AsmPrinterCtor)
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PM.add(AsmPrinterCtor(errs(), *this, Fast));
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PM.add(AsmPrinterCtor(errs(), *this, Fast, true));
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}
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return false;
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@ -190,7 +190,7 @@ bool ARMTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM, bool Fast,
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if (DumpAsm) {
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assert(AsmPrinterCtor && "AsmPrinter was not linked in");
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if (AsmPrinterCtor)
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PM.add(AsmPrinterCtor(errs(), *this, Fast));
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PM.add(AsmPrinterCtor(errs(), *this, Fast, true));
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}
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return false;
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@ -41,7 +41,7 @@ protected:
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// set this functions to ctor pointer at startup time if they are linked in.
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typedef FunctionPass *(*AsmPrinterCtorFn)(raw_ostream &o,
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ARMTargetMachine &tm,
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bool fast);
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bool fast, bool verbose);
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static AsmPrinterCtorFn AsmPrinterCtor;
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public:
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@ -72,7 +72,7 @@ public:
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virtual bool addInstSelector(PassManagerBase &PM, bool Fast);
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virtual bool addPreEmitPass(PassManagerBase &PM, bool Fast);
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virtual bool addAssemblyEmitter(PassManagerBase &PM, bool Fast,
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raw_ostream &Out);
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bool Verbose, raw_ostream &Out);
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virtual bool addCodeEmitter(PassManagerBase &PM, bool Fast,
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bool DumpAsm, MachineCodeEmitter &MCE);
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virtual bool addSimpleCodeEmitter(PassManagerBase &PM, bool Fast,
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@ -81,8 +81,8 @@ namespace {
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bool InCPMode;
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public:
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ARMAsmPrinter(raw_ostream &O, TargetMachine &TM,
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const TargetAsmInfo *T, bool F)
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: AsmPrinter(O, TM, T, F), DW(0), MMI(NULL), AFI(NULL), MCP(NULL),
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const TargetAsmInfo *T, bool F, bool V)
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: AsmPrinter(O, TM, T, F, V), DW(0), MMI(NULL), AFI(NULL), MCP(NULL),
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InCPMode(false) {
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Subtarget = &TM.getSubtarget<ARMSubtarget>();
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}
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@ -346,7 +346,8 @@ void ARMAsmPrinter::printOperand(const MachineInstr *MI, int opNum,
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}
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}
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static void printSOImm(raw_ostream &O, int64_t V, const TargetAsmInfo *TAI) {
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static void printSOImm(raw_ostream &O, int64_t V, bool VerboseAsm,
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const TargetAsmInfo *TAI) {
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assert(V < (1 << 12) && "Not a valid so_imm value!");
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unsigned Imm = ARM_AM::getSOImmValImm(V);
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unsigned Rot = ARM_AM::getSOImmValRot(V);
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@ -369,7 +370,7 @@ static void printSOImm(raw_ostream &O, int64_t V, const TargetAsmInfo *TAI) {
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void ARMAsmPrinter::printSOImmOperand(const MachineInstr *MI, int OpNum) {
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const MachineOperand &MO = MI->getOperand(OpNum);
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assert(MO.isImm() && "Not a valid so_imm value!");
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printSOImm(O, MO.getImm(), TAI);
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printSOImm(O, MO.getImm(), VerboseAsm, TAI);
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}
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/// printSOImm2PartOperand - SOImm is broken into two pieces using a 'mov'
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@ -379,7 +380,7 @@ void ARMAsmPrinter::printSOImm2PartOperand(const MachineInstr *MI, int OpNum) {
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assert(MO.isImm() && "Not a valid so_imm value!");
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unsigned V1 = ARM_AM::getSOImmTwoPartFirst(MO.getImm());
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unsigned V2 = ARM_AM::getSOImmTwoPartSecond(MO.getImm());
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printSOImm(O, ARM_AM::getSOImmVal(V1), TAI);
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printSOImm(O, ARM_AM::getSOImmVal(V1), VerboseAsm, TAI);
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O << "\n\torr";
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printPredicateOperand(MI, 2);
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O << " ";
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@ -387,7 +388,7 @@ void ARMAsmPrinter::printSOImm2PartOperand(const MachineInstr *MI, int OpNum) {
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O << ", ";
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printOperand(MI, 0);
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O << ", ";
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printSOImm(O, ARM_AM::getSOImmVal(V2), TAI);
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printSOImm(O, ARM_AM::getSOImmVal(V2), VerboseAsm, TAI);
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}
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// so_reg is a 4-operand unit corresponding to register forms of the A5.1
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@ -1057,8 +1058,8 @@ bool ARMAsmPrinter::doFinalization(Module &M) {
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///
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FunctionPass *llvm::createARMCodePrinterPass(raw_ostream &o,
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ARMTargetMachine &tm,
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bool fast) {
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return new ARMAsmPrinter(o, tm, tm.getTargetAsmInfo(), fast);
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bool fast, bool verbose) {
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return new ARMAsmPrinter(o, tm, tm.getTargetAsmInfo(), fast, verbose);
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}
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namespace {
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@ -26,7 +26,7 @@ namespace llvm {
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FunctionPass *createAlphaISelDag(AlphaTargetMachine &TM);
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FunctionPass *createAlphaCodePrinterPass(raw_ostream &OS,
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TargetMachine &TM,
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bool Fast);
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bool Fast, bool Verbose);
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FunctionPass *createAlphaPatternInstructionSelector(TargetMachine &TM);
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FunctionPass *createAlphaCodeEmitterPass(AlphaTargetMachine &TM,
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MachineCodeEmitter &MCE);
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@ -85,17 +85,18 @@ bool AlphaTargetMachine::addPreEmitPass(PassManagerBase &PM, bool Fast) {
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PM.add(createAlphaBranchSelectionPass());
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return false;
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}
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bool AlphaTargetMachine::addAssemblyEmitter(PassManagerBase &PM, bool Fast,
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bool AlphaTargetMachine::addAssemblyEmitter(PassManagerBase &PM, bool Fast,
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bool Verbose,
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raw_ostream &Out) {
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PM.add(createAlphaLLRPPass(*this));
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PM.add(createAlphaCodePrinterPass(Out, *this, Fast));
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PM.add(createAlphaCodePrinterPass(Out, *this, Fast, Verbose));
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return false;
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}
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bool AlphaTargetMachine::addCodeEmitter(PassManagerBase &PM, bool Fast,
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bool DumpAsm, MachineCodeEmitter &MCE) {
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PM.add(createAlphaCodeEmitterPass(*this, MCE));
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if (DumpAsm)
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PM.add(createAlphaCodePrinterPass(errs(), *this, Fast));
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PM.add(createAlphaCodePrinterPass(errs(), *this, Fast, true));
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return false;
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}
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bool AlphaTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
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@ -61,7 +61,7 @@ public:
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virtual bool addInstSelector(PassManagerBase &PM, bool Fast);
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virtual bool addPreEmitPass(PassManagerBase &PM, bool Fast);
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virtual bool addAssemblyEmitter(PassManagerBase &PM, bool Fast,
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raw_ostream &Out);
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bool Verbose, raw_ostream &Out);
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virtual bool addCodeEmitter(PassManagerBase &PM, bool Fast,
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bool DumpAsm, MachineCodeEmitter &MCE);
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virtual bool addSimpleCodeEmitter(PassManagerBase &PM, bool Fast,
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@ -37,8 +37,8 @@ namespace {
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///
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AlphaAsmPrinter(raw_ostream &o, TargetMachine &tm,
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const TargetAsmInfo *T, bool F)
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: AsmPrinter(o, tm, T, F) {}
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const TargetAsmInfo *T, bool F, bool V)
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: AsmPrinter(o, tm, T, F, V) {}
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virtual const char *getPassName() const {
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return "Alpha Assembly Printer";
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@ -68,8 +68,8 @@ namespace {
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///
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FunctionPass *llvm::createAlphaCodePrinterPass(raw_ostream &o,
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TargetMachine &tm,
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bool fast) {
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return new AlphaAsmPrinter(o, tm, tm.getTargetAsmInfo(), fast);
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bool fast, bool verbose) {
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return new AlphaAsmPrinter(o, tm, tm.getTargetAsmInfo(), fast, verbose);
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}
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#include "AlphaGenAsmWriter.inc"
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@ -49,8 +49,8 @@ namespace {
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std::set<std::string> FnStubs, GVStubs;
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public:
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SPUAsmPrinter(raw_ostream &O, TargetMachine &TM,
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const TargetAsmInfo *T, bool F) :
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AsmPrinter(O, TM, T, F) {}
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const TargetAsmInfo *T, bool F, bool V) :
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AsmPrinter(O, TM, T, F, V) {}
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virtual const char *getPassName() const {
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return "STI CBEA SPU Assembly Printer";
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@ -289,8 +289,8 @@ namespace {
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MachineModuleInfo *MMI;
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public:
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LinuxAsmPrinter(raw_ostream &O, SPUTargetMachine &TM,
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const TargetAsmInfo *T, bool F)
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: SPUAsmPrinter(O, TM, T, F), DW(0), MMI(0) {}
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const TargetAsmInfo *T, bool F, bool V)
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: SPUAsmPrinter(O, TM, T, F, V), DW(0), MMI(0) {}
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virtual const char *getPassName() const {
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return "STI CBEA SPU Assembly Printer";
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@ -615,6 +615,6 @@ bool LinuxAsmPrinter::doFinalization(Module &M) {
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///
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FunctionPass *llvm::createSPUAsmPrinterPass(raw_ostream &o,
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SPUTargetMachine &tm,
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bool fast) {
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return new LinuxAsmPrinter(o, tm, tm.getTargetAsmInfo(), fast);
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bool fast, bool verbose) {
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return new LinuxAsmPrinter(o, tm, tm.getTargetAsmInfo(), fast, verbose);
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}
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@ -25,7 +25,7 @@ namespace llvm {
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FunctionPass *createSPUISelDag(SPUTargetMachine &TM);
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FunctionPass *createSPUAsmPrinterPass(raw_ostream &o,
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SPUTargetMachine &tm,
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bool fast);
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bool fast, bool verbose);
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/*--== Utility functions/predicates/etc used all over the place: --==*/
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//! Predicate test for a signed 10-bit value
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|
@ -89,7 +89,7 @@ SPUTargetMachine::addInstSelector(PassManagerBase &PM, bool Fast)
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}
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bool SPUTargetMachine::addAssemblyEmitter(PassManagerBase &PM, bool Fast,
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raw_ostream &Out) {
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PM.add(createSPUAsmPrinterPass(Out, *this, Fast));
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bool Verbose, raw_ostream &Out) {
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PM.add(createSPUAsmPrinterPass(Out, *this, Fast, Verbose));
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return false;
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}
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|
@ -85,7 +85,7 @@ public:
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// Pass Pipeline Configuration
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virtual bool addInstSelector(PassManagerBase &PM, bool /*Fast*/);
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virtual bool addAssemblyEmitter(PassManagerBase &PM, bool /*Fast*/,
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raw_ostream &Out);
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bool /*Verbose*/, raw_ostream &Out);
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};
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} // end namespace llvm
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@ -37,7 +37,7 @@ FunctionPass *createIA64BundlingPass(IA64TargetMachine &TM);
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///
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FunctionPass *createIA64CodePrinterPass(raw_ostream &o,
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IA64TargetMachine &tm,
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bool fast);
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bool fast, bool verbose);
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} // End llvm namespace
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||||
|
@ -38,8 +38,8 @@ namespace {
|
||||
std::set<std::string> ExternalFunctionNames, ExternalObjectNames;
|
||||
public:
|
||||
IA64AsmPrinter(raw_ostream &O, TargetMachine &TM,
|
||||
const TargetAsmInfo *T, bool F)
|
||||
: AsmPrinter(O, TM, T, F) {}
|
||||
const TargetAsmInfo *T, bool F, bool V)
|
||||
: AsmPrinter(O, TM, T, F, V) {}
|
||||
|
||||
virtual const char *getPassName() const {
|
||||
return "IA64 Assembly Printer";
|
||||
@ -370,6 +370,6 @@ bool IA64AsmPrinter::doFinalization(Module &M) {
|
||||
///
|
||||
FunctionPass *llvm::createIA64CodePrinterPass(raw_ostream &o,
|
||||
IA64TargetMachine &tm,
|
||||
bool fast) {
|
||||
return new IA64AsmPrinter(o, tm, tm.getTargetAsmInfo(), fast);
|
||||
bool fast, bool verbose) {
|
||||
return new IA64AsmPrinter(o, tm, tm.getTargetAsmInfo(), fast, verbose);
|
||||
}
|
||||
|
@ -83,8 +83,8 @@ bool IA64TargetMachine::addPreEmitPass(PassManagerBase &PM, bool Fast) {
|
||||
return true;
|
||||
}
|
||||
bool IA64TargetMachine::addAssemblyEmitter(PassManagerBase &PM, bool Fast,
|
||||
raw_ostream &Out) {
|
||||
PM.add(createIA64CodePrinterPass(Out, *this, Fast));
|
||||
bool Verbose, raw_ostream &Out) {
|
||||
PM.add(createIA64CodePrinterPass(Out, *this, Fast, Verbose));
|
||||
return false;
|
||||
}
|
||||
|
||||
|
@ -54,7 +54,7 @@ public:
|
||||
virtual bool addInstSelector(PassManagerBase &PM, bool Fast);
|
||||
virtual bool addPreEmitPass(PassManagerBase &PM, bool Fast);
|
||||
virtual bool addAssemblyEmitter(PassManagerBase &PM, bool Fast,
|
||||
raw_ostream &Out);
|
||||
bool Verbose, raw_ostream &Out);
|
||||
};
|
||||
} // End llvm namespace
|
||||
|
||||
|
@ -25,7 +25,7 @@ namespace llvm {
|
||||
FunctionPass *createMipsDelaySlotFillerPass(MipsTargetMachine &TM);
|
||||
FunctionPass *createMipsCodePrinterPass(raw_ostream &OS,
|
||||
MipsTargetMachine &TM,
|
||||
bool Fast);
|
||||
bool Fast, bool Verbose);
|
||||
} // end namespace llvm;
|
||||
|
||||
// Defines symbolic names for Mips registers. This defines a mapping from
|
||||
|
@ -50,8 +50,8 @@ namespace {
|
||||
const MipsSubtarget *Subtarget;
|
||||
public:
|
||||
MipsAsmPrinter(raw_ostream &O, MipsTargetMachine &TM,
|
||||
const TargetAsmInfo *T, bool F)
|
||||
: AsmPrinter(O, TM, T, F) {
|
||||
const TargetAsmInfo *T, bool F, bool V)
|
||||
: AsmPrinter(O, TM, T, F, V) {
|
||||
Subtarget = &TM.getSubtarget<MipsSubtarget>();
|
||||
}
|
||||
|
||||
@ -91,8 +91,8 @@ namespace {
|
||||
/// regardless of whether the function is in SSA form.
|
||||
FunctionPass *llvm::createMipsCodePrinterPass(raw_ostream &o,
|
||||
MipsTargetMachine &tm,
|
||||
bool fast) {
|
||||
return new MipsAsmPrinter(o, tm, tm.getTargetAsmInfo(), fast);
|
||||
bool fast, bool verbose) {
|
||||
return new MipsAsmPrinter(o, tm, tm.getTargetAsmInfo(), fast, verbose);
|
||||
}
|
||||
|
||||
//===----------------------------------------------------------------------===//
|
||||
|
@ -125,9 +125,9 @@ addPreEmitPass(PassManagerBase &PM, bool Fast)
|
||||
// true if AssemblyEmitter is supported
|
||||
bool MipsTargetMachine::
|
||||
addAssemblyEmitter(PassManagerBase &PM, bool Fast,
|
||||
raw_ostream &Out)
|
||||
bool Verbose, raw_ostream &Out)
|
||||
{
|
||||
// Output assembly language.
|
||||
PM.add(createMipsCodePrinterPass(Out, *this, Fast));
|
||||
PM.add(createMipsCodePrinterPass(Out, *this, Fast, Verbose));
|
||||
return false;
|
||||
}
|
||||
|
@ -60,7 +60,7 @@ namespace llvm {
|
||||
virtual bool addInstSelector(PassManagerBase &PM, bool Fast);
|
||||
virtual bool addPreEmitPass(PassManagerBase &PM, bool Fast);
|
||||
virtual bool addAssemblyEmitter(PassManagerBase &PM, bool Fast,
|
||||
raw_ostream &Out);
|
||||
bool Verbose, raw_ostream &Out);
|
||||
};
|
||||
|
||||
/// MipselTargetMachine - Mipsel target machine.
|
||||
|
@ -75,7 +75,7 @@ namespace PIC16CC {
|
||||
FunctionPass *createPIC16ISelDag(PIC16TargetMachine &TM);
|
||||
FunctionPass *createPIC16CodePrinterPass(raw_ostream &OS,
|
||||
PIC16TargetMachine &TM,
|
||||
bool Fast);
|
||||
bool Fast, bool Verbose);
|
||||
} // end namespace llvm;
|
||||
|
||||
// Defines symbolic names for PIC16 registers. This defines a mapping from
|
||||
|
@ -139,8 +139,8 @@ bool PIC16AsmPrinter::runOnMachineFunction(MachineFunction &MF) {
|
||||
///
|
||||
FunctionPass *llvm::createPIC16CodePrinterPass(raw_ostream &o,
|
||||
PIC16TargetMachine &tm,
|
||||
bool fast) {
|
||||
return new PIC16AsmPrinter(o, tm, tm.getTargetAsmInfo(), fast);
|
||||
bool fast, bool verbose) {
|
||||
return new PIC16AsmPrinter(o, tm, tm.getTargetAsmInfo(), fast, verbose);
|
||||
}
|
||||
|
||||
void PIC16AsmPrinter::printOperand(const MachineInstr *MI, int opNum) {
|
||||
|
@ -24,9 +24,9 @@
|
||||
|
||||
namespace llvm {
|
||||
struct VISIBILITY_HIDDEN PIC16AsmPrinter : public AsmPrinter {
|
||||
PIC16AsmPrinter(raw_ostream &O, TargetMachine &TM,
|
||||
const TargetAsmInfo *T, bool F)
|
||||
: AsmPrinter(O, TM, T, F) {
|
||||
PIC16AsmPrinter(raw_ostream &O, TargetMachine &TM,
|
||||
const TargetAsmInfo *T, bool F, bool V)
|
||||
: AsmPrinter(O, TM, T, F, V) {
|
||||
CurBank = "";
|
||||
IsRomData = false;
|
||||
}
|
||||
|
@ -62,9 +62,10 @@ bool PIC16TargetMachine::addInstSelector(PassManagerBase &PM, bool Fast) {
|
||||
}
|
||||
|
||||
bool PIC16TargetMachine::
|
||||
addAssemblyEmitter(PassManagerBase &PM, bool Fast, raw_ostream &Out) {
|
||||
addAssemblyEmitter(PassManagerBase &PM, bool Fast, bool Verbose,
|
||||
raw_ostream &Out) {
|
||||
// Output assembly language.
|
||||
PM.add(createPIC16CodePrinterPass(Out, *this, Fast));
|
||||
PM.add(createPIC16CodePrinterPass(Out, *this, Fast, Verbose));
|
||||
return false;
|
||||
}
|
||||
|
||||
|
@ -59,7 +59,7 @@ public:
|
||||
|
||||
virtual bool addInstSelector(PassManagerBase &PM, bool Fast);
|
||||
virtual bool addAssemblyEmitter(PassManagerBase &PM, bool Fast,
|
||||
raw_ostream &Out);
|
||||
bool Verbose, raw_ostream &Out);
|
||||
}; // PIC16TargetMachine.
|
||||
|
||||
/// CooperTargetMachine
|
||||
|
@ -55,8 +55,8 @@ namespace {
|
||||
const PPCSubtarget &Subtarget;
|
||||
public:
|
||||
PPCAsmPrinter(raw_ostream &O, TargetMachine &TM,
|
||||
const TargetAsmInfo *T, bool F)
|
||||
: AsmPrinter(O, TM, T, F),
|
||||
const TargetAsmInfo *T, bool F, bool V)
|
||||
: AsmPrinter(O, TM, T, F, V),
|
||||
Subtarget(TM.getSubtarget<PPCSubtarget>()) {}
|
||||
|
||||
virtual const char *getPassName() const {
|
||||
@ -298,8 +298,8 @@ namespace {
|
||||
MachineModuleInfo *MMI;
|
||||
public:
|
||||
PPCLinuxAsmPrinter(raw_ostream &O, PPCTargetMachine &TM,
|
||||
const TargetAsmInfo *T, bool F)
|
||||
: PPCAsmPrinter(O, TM, T, F), DW(0), MMI(0) {}
|
||||
const TargetAsmInfo *T, bool F, bool V)
|
||||
: PPCAsmPrinter(O, TM, T, F, V), DW(0), MMI(0) {}
|
||||
|
||||
virtual const char *getPassName() const {
|
||||
return "Linux PPC Assembly Printer";
|
||||
@ -327,8 +327,8 @@ namespace {
|
||||
raw_ostream &OS;
|
||||
public:
|
||||
PPCDarwinAsmPrinter(raw_ostream &O, PPCTargetMachine &TM,
|
||||
const TargetAsmInfo *T, bool F)
|
||||
: PPCAsmPrinter(O, TM, T, F), DW(0), MMI(0), OS(O) {}
|
||||
const TargetAsmInfo *T, bool F, bool V)
|
||||
: PPCAsmPrinter(O, TM, T, F, V), DW(0), MMI(0), OS(O) {}
|
||||
|
||||
virtual const char *getPassName() const {
|
||||
return "Darwin PPC Assembly Printer";
|
||||
@ -1175,13 +1175,13 @@ bool PPCDarwinAsmPrinter::doFinalization(Module &M) {
|
||||
///
|
||||
FunctionPass *llvm::createPPCAsmPrinterPass(raw_ostream &o,
|
||||
PPCTargetMachine &tm,
|
||||
bool fast) {
|
||||
bool fast, bool verbose) {
|
||||
const PPCSubtarget *Subtarget = &tm.getSubtarget<PPCSubtarget>();
|
||||
|
||||
if (Subtarget->isDarwin()) {
|
||||
return new PPCDarwinAsmPrinter(o, tm, tm.getTargetAsmInfo(), fast);
|
||||
return new PPCDarwinAsmPrinter(o, tm, tm.getTargetAsmInfo(), fast, verbose);
|
||||
} else {
|
||||
return new PPCLinuxAsmPrinter(o, tm, tm.getTargetAsmInfo(), fast);
|
||||
return new PPCLinuxAsmPrinter(o, tm, tm.getTargetAsmInfo(), fast, verbose);
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -28,7 +28,7 @@ FunctionPass *createPPCBranchSelectionPass();
|
||||
FunctionPass *createPPCISelDag(PPCTargetMachine &TM);
|
||||
FunctionPass *createPPCAsmPrinterPass(raw_ostream &OS,
|
||||
PPCTargetMachine &TM,
|
||||
bool Fast);
|
||||
bool Fast, bool Verbose);
|
||||
FunctionPass *createPPCCodeEmitterPass(PPCTargetMachine &TM,
|
||||
MachineCodeEmitter &MCE);
|
||||
} // end namespace llvm;
|
||||
|
@ -143,10 +143,10 @@ bool PPCTargetMachine::addPreEmitPass(PassManagerBase &PM, bool Fast) {
|
||||
}
|
||||
|
||||
bool PPCTargetMachine::addAssemblyEmitter(PassManagerBase &PM, bool Fast,
|
||||
raw_ostream &Out) {
|
||||
bool Verbose, raw_ostream &Out) {
|
||||
assert(AsmPrinterCtor && "AsmPrinter was not linked in");
|
||||
if (AsmPrinterCtor)
|
||||
PM.add(AsmPrinterCtor(Out, *this, Fast));
|
||||
PM.add(AsmPrinterCtor(Out, *this, Fast, Verbose));
|
||||
|
||||
return false;
|
||||
}
|
||||
@ -176,7 +176,7 @@ bool PPCTargetMachine::addCodeEmitter(PassManagerBase &PM, bool Fast,
|
||||
if (DumpAsm) {
|
||||
assert(AsmPrinterCtor && "AsmPrinter was not linked in");
|
||||
if (AsmPrinterCtor)
|
||||
PM.add(AsmPrinterCtor(errs(), *this, Fast));
|
||||
PM.add(AsmPrinterCtor(errs(), *this, Fast, true));
|
||||
}
|
||||
|
||||
return false;
|
||||
@ -189,7 +189,7 @@ bool PPCTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM, bool Fast,
|
||||
if (DumpAsm) {
|
||||
assert(AsmPrinterCtor && "AsmPrinter was not linked in");
|
||||
if (AsmPrinterCtor)
|
||||
PM.add(AsmPrinterCtor(errs(), *this, Fast));
|
||||
PM.add(AsmPrinterCtor(errs(), *this, Fast, true));
|
||||
}
|
||||
|
||||
return false;
|
||||
|
@ -46,7 +46,7 @@ protected:
|
||||
// set this functions to ctor pointer at startup time if they are linked in.
|
||||
typedef FunctionPass *(*AsmPrinterCtorFn)(raw_ostream &o,
|
||||
PPCTargetMachine &tm,
|
||||
bool fast);
|
||||
bool fast, bool verbose);
|
||||
static AsmPrinterCtorFn AsmPrinterCtor;
|
||||
|
||||
public:
|
||||
@ -79,7 +79,7 @@ public:
|
||||
virtual bool addInstSelector(PassManagerBase &PM, bool Fast);
|
||||
virtual bool addPreEmitPass(PassManagerBase &PM, bool Fast);
|
||||
virtual bool addAssemblyEmitter(PassManagerBase &PM, bool Fast,
|
||||
raw_ostream &Out);
|
||||
bool Verbose, raw_ostream &Out);
|
||||
virtual bool addCodeEmitter(PassManagerBase &PM, bool Fast,
|
||||
bool DumpAsm, MachineCodeEmitter &MCE);
|
||||
virtual bool addSimpleCodeEmitter(PassManagerBase &PM, bool Fast,
|
||||
|
@ -49,8 +49,8 @@ namespace {
|
||||
ValueMapTy NumberForBB;
|
||||
public:
|
||||
SparcAsmPrinter(raw_ostream &O, TargetMachine &TM,
|
||||
const TargetAsmInfo *T, bool F)
|
||||
: AsmPrinter(O, TM, T, F) {}
|
||||
const TargetAsmInfo *T, bool F, bool V)
|
||||
: AsmPrinter(O, TM, T, F, V) {}
|
||||
|
||||
virtual const char *getPassName() const {
|
||||
return "Sparc Assembly Printer";
|
||||
@ -82,8 +82,8 @@ namespace {
|
||||
///
|
||||
FunctionPass *llvm::createSparcCodePrinterPass(raw_ostream &o,
|
||||
TargetMachine &tm,
|
||||
bool fast) {
|
||||
return new SparcAsmPrinter(o, tm, tm.getTargetAsmInfo(), fast);
|
||||
bool fast, bool verbose) {
|
||||
return new SparcAsmPrinter(o, tm, tm.getTargetAsmInfo(), fast, verbose);
|
||||
}
|
||||
|
||||
/// runOnMachineFunction - This uses the printInstruction()
|
||||
|
@ -24,8 +24,8 @@ namespace llvm {
|
||||
class raw_ostream;
|
||||
|
||||
FunctionPass *createSparcISelDag(SparcTargetMachine &TM);
|
||||
FunctionPass *createSparcCodePrinterPass(raw_ostream &OS,
|
||||
TargetMachine &TM, bool Fast);
|
||||
FunctionPass *createSparcCodePrinterPass(raw_ostream &OS, TargetMachine &TM,
|
||||
bool Fast, bool Verbose);
|
||||
FunctionPass *createSparcDelaySlotFillerPass(TargetMachine &TM);
|
||||
FunctionPass *createSparcFPMoverPass(TargetMachine &TM);
|
||||
} // end namespace llvm;
|
||||
|
@ -83,8 +83,8 @@ bool SparcTargetMachine::addPreEmitPass(PassManagerBase &PM, bool Fast) {
|
||||
}
|
||||
|
||||
bool SparcTargetMachine::addAssemblyEmitter(PassManagerBase &PM, bool Fast,
|
||||
raw_ostream &Out) {
|
||||
bool Verbose, raw_ostream &Out) {
|
||||
// Output assembly language.
|
||||
PM.add(createSparcCodePrinterPass(Out, *this, Fast));
|
||||
PM.add(createSparcCodePrinterPass(Out, *this, Fast, Verbose));
|
||||
return false;
|
||||
}
|
||||
|
@ -54,7 +54,7 @@ public:
|
||||
virtual bool addInstSelector(PassManagerBase &PM, bool Fast);
|
||||
virtual bool addPreEmitPass(PassManagerBase &PM, bool Fast);
|
||||
virtual bool addAssemblyEmitter(PassManagerBase &PM, bool Fast,
|
||||
raw_ostream &Out);
|
||||
bool Verbose, raw_ostream &Out);
|
||||
};
|
||||
|
||||
} // end namespace llvm
|
||||
|
@ -39,10 +39,10 @@ namespace llvm {
|
||||
bool PerformTailCallOpt;
|
||||
unsigned StackAlignment;
|
||||
bool RealignStack;
|
||||
bool VerboseAsm;
|
||||
bool DisableJumpTables;
|
||||
bool StrongPHIElim;
|
||||
bool DisableRedZone;
|
||||
bool AsmVerbosityDefault(false);
|
||||
}
|
||||
|
||||
static cl::opt<bool, true>
|
||||
@ -154,10 +154,6 @@ EnableRealignStack("realign-stack",
|
||||
cl::location(RealignStack),
|
||||
cl::init(true));
|
||||
static cl::opt<bool, true>
|
||||
AsmVerbose("asm-verbose", cl::desc("Add comments to directives."),
|
||||
cl::location(VerboseAsm),
|
||||
cl::init(false));
|
||||
static cl::opt<bool, true>
|
||||
DisableSwitchTables(cl::Hidden, "disable-jump-tables",
|
||||
cl::desc("Do not generate jump tables."),
|
||||
cl::location(DisableJumpTables),
|
||||
@ -203,6 +199,14 @@ void TargetMachine::setCodeModel(CodeModel::Model Model) {
|
||||
CMModel = Model;
|
||||
}
|
||||
|
||||
bool TargetMachine::getAsmVerbosityDefault() {
|
||||
return AsmVerbosityDefault;
|
||||
}
|
||||
|
||||
void TargetMachine::setAsmVerbosityDefault(bool V) {
|
||||
AsmVerbosityDefault = V;
|
||||
}
|
||||
|
||||
namespace llvm {
|
||||
/// LessPreciseFPMAD - This flag return true when -enable-fp-mad option
|
||||
/// is specified on the command line. When this flag is off(default), the
|
||||
|
@ -34,8 +34,8 @@ class VISIBILITY_HIDDEN X86ATTAsmPrinter : public AsmPrinter {
|
||||
const X86Subtarget *Subtarget;
|
||||
public:
|
||||
X86ATTAsmPrinter(raw_ostream &O, X86TargetMachine &TM,
|
||||
const TargetAsmInfo *T, bool F)
|
||||
: AsmPrinter(O, TM, T, F), DW(0), MMI(0) {
|
||||
const TargetAsmInfo *T, bool F, bool V)
|
||||
: AsmPrinter(O, TM, T, F, V), DW(0), MMI(0) {
|
||||
Subtarget = &TM.getSubtarget<X86Subtarget>();
|
||||
}
|
||||
|
||||
|
@ -25,13 +25,13 @@ using namespace llvm;
|
||||
///
|
||||
FunctionPass *llvm::createX86CodePrinterPass(raw_ostream &o,
|
||||
X86TargetMachine &tm,
|
||||
bool fast) {
|
||||
bool fast, bool verbose) {
|
||||
const X86Subtarget *Subtarget = &tm.getSubtarget<X86Subtarget>();
|
||||
|
||||
if (Subtarget->isFlavorIntel()) {
|
||||
return new X86IntelAsmPrinter(o, tm, tm.getTargetAsmInfo(), fast);
|
||||
return new X86IntelAsmPrinter(o, tm, tm.getTargetAsmInfo(), fast, verbose);
|
||||
} else {
|
||||
return new X86ATTAsmPrinter(o, tm, tm.getTargetAsmInfo(), fast);
|
||||
return new X86ATTAsmPrinter(o, tm, tm.getTargetAsmInfo(), fast, verbose);
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -26,8 +26,8 @@ namespace llvm {
|
||||
|
||||
struct VISIBILITY_HIDDEN X86IntelAsmPrinter : public AsmPrinter {
|
||||
X86IntelAsmPrinter(raw_ostream &O, X86TargetMachine &TM,
|
||||
const TargetAsmInfo *T, bool F)
|
||||
: AsmPrinter(O, TM, T, F) {}
|
||||
const TargetAsmInfo *T, bool F, bool V)
|
||||
: AsmPrinter(O, TM, T, F, V) {}
|
||||
|
||||
virtual const char *getPassName() const {
|
||||
return "X86 Intel-Style Assembly Printer";
|
||||
|
@ -44,7 +44,7 @@ FunctionPass *createX87FPRegKillInserterPass();
|
||||
///
|
||||
FunctionPass *createX86CodePrinterPass(raw_ostream &o,
|
||||
X86TargetMachine &tm,
|
||||
bool fast);
|
||||
bool fast, bool Verbose);
|
||||
|
||||
/// createX86CodeEmitterPass - Return a pass that emits the collected X86 code
|
||||
/// to the specified MCE object.
|
||||
|
@ -207,10 +207,10 @@ bool X86TargetMachine::addPostRegAlloc(PassManagerBase &PM, bool Fast) {
|
||||
}
|
||||
|
||||
bool X86TargetMachine::addAssemblyEmitter(PassManagerBase &PM, bool Fast,
|
||||
raw_ostream &Out) {
|
||||
bool Verbose, raw_ostream &Out) {
|
||||
assert(AsmPrinterCtor && "AsmPrinter was not linked in");
|
||||
if (AsmPrinterCtor)
|
||||
PM.add(AsmPrinterCtor(Out, *this, Fast));
|
||||
PM.add(AsmPrinterCtor(Out, *this, Fast, Verbose));
|
||||
return false;
|
||||
}
|
||||
|
||||
@ -236,7 +236,7 @@ bool X86TargetMachine::addCodeEmitter(PassManagerBase &PM, bool Fast,
|
||||
if (DumpAsm) {
|
||||
assert(AsmPrinterCtor && "AsmPrinter was not linked in");
|
||||
if (AsmPrinterCtor)
|
||||
PM.add(AsmPrinterCtor(errs(), *this, Fast));
|
||||
PM.add(AsmPrinterCtor(errs(), *this, Fast, true));
|
||||
}
|
||||
|
||||
return false;
|
||||
@ -248,7 +248,7 @@ bool X86TargetMachine::addSimpleCodeEmitter(PassManagerBase &PM, bool Fast,
|
||||
if (DumpAsm) {
|
||||
assert(AsmPrinterCtor && "AsmPrinter was not linked in");
|
||||
if (AsmPrinterCtor)
|
||||
PM.add(AsmPrinterCtor(errs(), *this, Fast));
|
||||
PM.add(AsmPrinterCtor(errs(), *this, Fast, true));
|
||||
}
|
||||
|
||||
return false;
|
||||
|
@ -45,7 +45,7 @@ protected:
|
||||
// set this functions to ctor pointer at startup time if they are linked in.
|
||||
typedef FunctionPass *(*AsmPrinterCtorFn)(raw_ostream &o,
|
||||
X86TargetMachine &tm,
|
||||
bool fast);
|
||||
bool fast, bool verbose);
|
||||
static AsmPrinterCtorFn AsmPrinterCtor;
|
||||
|
||||
public:
|
||||
@ -78,7 +78,7 @@ public:
|
||||
virtual bool addPreRegAlloc(PassManagerBase &PM, bool Fast);
|
||||
virtual bool addPostRegAlloc(PassManagerBase &PM, bool Fast);
|
||||
virtual bool addAssemblyEmitter(PassManagerBase &PM, bool Fast,
|
||||
raw_ostream &Out);
|
||||
bool Verbose, raw_ostream &Out);
|
||||
virtual bool addCodeEmitter(PassManagerBase &PM, bool Fast,
|
||||
bool DumpAsm, MachineCodeEmitter &MCE);
|
||||
virtual bool addSimpleCodeEmitter(PassManagerBase &PM, bool Fast,
|
||||
|
@ -24,7 +24,7 @@ namespace llvm {
|
||||
FunctionPass *createXCoreISelDag(XCoreTargetMachine &TM);
|
||||
FunctionPass *createXCoreCodePrinterPass(raw_ostream &OS,
|
||||
XCoreTargetMachine &TM,
|
||||
bool Fast);
|
||||
bool Fast, bool Verbose);
|
||||
} // end namespace llvm;
|
||||
|
||||
// Defines symbolic names for XCore registers. This defines a mapping from
|
||||
|
@ -58,8 +58,8 @@ namespace {
|
||||
const XCoreSubtarget &Subtarget;
|
||||
public:
|
||||
XCoreAsmPrinter(raw_ostream &O, XCoreTargetMachine &TM,
|
||||
const TargetAsmInfo *T, bool F)
|
||||
: AsmPrinter(O, TM, T, F), DW(0),
|
||||
const TargetAsmInfo *T, bool F, bool V)
|
||||
: AsmPrinter(O, TM, T, F, V), DW(0),
|
||||
Subtarget(*TM.getSubtargetImpl()) {}
|
||||
|
||||
virtual const char *getPassName() const {
|
||||
@ -105,8 +105,8 @@ namespace {
|
||||
///
|
||||
FunctionPass *llvm::createXCoreCodePrinterPass(raw_ostream &o,
|
||||
XCoreTargetMachine &tm,
|
||||
bool fast) {
|
||||
return new XCoreAsmPrinter(o, tm, tm.getTargetAsmInfo(), fast);
|
||||
bool fast, bool verbose) {
|
||||
return new XCoreAsmPrinter(o, tm, tm.getTargetAsmInfo(), fast, verbose);
|
||||
}
|
||||
|
||||
// PrintEscapedString - Print each character of the specified string, escaping
|
||||
|
@ -61,8 +61,8 @@ bool XCoreTargetMachine::addInstSelector(PassManagerBase &PM, bool Fast) {
|
||||
}
|
||||
|
||||
bool XCoreTargetMachine::addAssemblyEmitter(PassManagerBase &PM, bool Fast,
|
||||
raw_ostream &Out) {
|
||||
bool Verbose, raw_ostream &Out) {
|
||||
// Output assembly language.
|
||||
PM.add(createXCoreCodePrinterPass(Out, *this, Fast));
|
||||
PM.add(createXCoreCodePrinterPass(Out, *this, Fast, Verbose));
|
||||
return false;
|
||||
}
|
||||
|
@ -54,7 +54,7 @@ public:
|
||||
// Pass Pipeline Configuration
|
||||
virtual bool addInstSelector(PassManagerBase &PM, bool Fast);
|
||||
virtual bool addAssemblyEmitter(PassManagerBase &PM, bool Fast,
|
||||
raw_ostream &Out);
|
||||
bool Verbose, raw_ostream &Out);
|
||||
};
|
||||
|
||||
} // end namespace llvm
|
||||
|
@ -1,4 +1,4 @@
|
||||
; RUN: llvm-as < %s | llc -enable-eh -asm-verbose | grep invcont131
|
||||
; RUN: llvm-as < %s | llc -enable-eh | grep invcont131
|
||||
; PR 1496: tail merge was incorrectly removing this block
|
||||
|
||||
; ModuleID = 'report.1.bc'
|
||||
|
@ -1,4 +1,4 @@
|
||||
; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin -asm-verbose | grep {#} | not grep -v {##}
|
||||
; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin | grep {#} | not grep -v {##}
|
||||
|
||||
%struct.AGenericCall = type { %struct.AGenericManager*, %struct.ComponentParameters*, i32* }
|
||||
%struct.AGenericManager = type <{ i8 }>
|
||||
|
@ -1,4 +1,4 @@
|
||||
; RUN: llvm-as < %s | llc -march=x86 -asm-verbose | grep -A 1 lpad | grep Llabel
|
||||
; RUN: llvm-as < %s | llc -march=x86 | grep -A 1 lpad | grep Llabel
|
||||
; Check that register copies in the landing pad come after the EH_LABEL
|
||||
|
||||
declare i32 @f()
|
||||
|
@ -1,5 +1,5 @@
|
||||
; RUN: llvm-as < %s | \
|
||||
; RUN: llc -mtriple=i686-pc-linux-gnu -o %t -f
|
||||
; RUN: llc -mtriple=i686-pc-linux-gnu -asm-verbose=false -o %t -f
|
||||
; RUN: grep set %t | count 7
|
||||
; RUN: grep globl %t | count 6
|
||||
; RUN: grep weak %t | count 1
|
||||
|
@ -1,6 +1,6 @@
|
||||
; RUN: llvm-as < %s | llc -relocation-model=pic -mtriple=i386-linux-gnu | not grep -F .text
|
||||
; RUN: llvm-as < %s | llc -relocation-model=pic -mtriple=i686-apple-darwin | not grep lea
|
||||
; RUN: llvm-as < %s | llc -relocation-model=pic -mtriple=i686-apple-darwin | grep add | count 2
|
||||
; RUN: llvm-as < %s | llc -relocation-model=pic -mtriple=i386-linux-gnu -asm-verbose=false | not grep -F .text
|
||||
; RUN: llvm-as < %s | llc -relocation-model=pic -mtriple=i686-apple-darwin -asm-verbose=false | not grep lea
|
||||
; RUN: llvm-as < %s | llc -relocation-model=pic -mtriple=i686-apple-darwin -asm-verbose=false | grep add | count 2
|
||||
|
||||
declare void @_Z3bari(i32)
|
||||
|
||||
|
Loading…
Reference in New Issue
Block a user