RPCS3/llvm
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm.git synced 2024-11-29 22:50:55 +00:00
Code Issues Actions Packages Projects Releases Wiki Activity

CodeGen still defaults to non-verbose asm, but llc now overrides it and default to verbose.

Browse Source 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67668 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng 2009-03-25 01:47:28 +00:00
parent 7db860d4de
commit 42bf74be14
55 changed files with 166 additions and 134 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

10
include/llvm/CodeGen/AsmPrinter.h
View File

@ -105,13 +105,21 @@ namespace llvm {
/// text section.
bool IsInTextSection;
/// VerboseAsm - Emit comments in assembly output if this is true.
///
bool VerboseAsm;
protected:
AsmPrinter(raw_ostream &o, TargetMachine &TM,
const TargetAsmInfo *T, bool F);
const TargetAsmInfo *T, bool F, bool V);
public:
virtual ~AsmPrinter();
/// isVerbose - Return true if assembly output should contain comments.
///
bool isVerbose() const { return VerboseAsm; }
/// SwitchToTextSection - Switch to the specified section of the executable
/// if we are not already in it! If GV is non-null and if the global has an
/// explicitly requested section, we switch to the section indicated for the

12
include/llvm/Target/TargetMachine.h
View File

@ -174,6 +174,7 @@ public:
static Reloc::Model getRelocationModel();
/// setRelocationModel - Sets the code generation relocation model.
///
static void setRelocationModel(Reloc::Model Model);
/// getCodeModel - Returns the code model. The choices are small, kernel,
@ -181,8 +182,17 @@ public:
static CodeModel::Model getCodeModel();
/// setCodeModel - Sets the code model.
///
static void setCodeModel(CodeModel::Model Model);
/// getAsmVerbosityDefault - Returns the default value of asm verbosity.
///
static bool getAsmVerbosityDefault();
/// setAsmVerbosityDefault - Set the default value of asm verbosity. Default
/// is false.
static void setAsmVerbosityDefault(bool);
/// CodeGenFileType - These enums are meant to be passed into
/// addPassesToEmitFile to indicate what type of file to emit.
enum CodeGenFileType {
@ -320,7 +330,7 @@ public:
/// the asmprinter, if asm emission is supported. If this is not supported,
/// 'true' should be returned.
virtual bool addAssemblyEmitter(PassManagerBase &, bool /*Fast*/,
raw_ostream &) {
bool /* VerboseAsmDefault */, raw_ostream &) {
return true;
}

4
include/llvm/Target/TargetOptions.h
View File

@ -104,10 +104,6 @@ namespace llvm {
/// realigned, if needed.
extern bool RealignStack;
/// VerboseAsm - When this flag is set, the asm printer prints additional
/// comments to asm directives.
extern bool VerboseAsm;
/// DisableJumpTables - This flag indicates jump tables should not be
/// generated.
extern bool DisableJumpTables;

15
lib/CodeGen/AsmPrinter/AsmPrinter.cpp
View File

@ -21,6 +21,7 @@
#include "llvm/CodeGen/MachineJumpTableInfo.h"
#include "llvm/CodeGen/MachineModuleInfo.h"
#include "llvm/CodeGen/DwarfWriter.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/Mangler.h"
#include "llvm/Support/raw_ostream.h"
#include "llvm/Target/TargetAsmInfo.h"
@ -35,13 +36,23 @@
#include <cerrno>
using namespace llvm;
static cl::opt<cl::boolOrDefault>
AsmVerbose("asm-verbose", cl::desc("Add comments to directives."),
cl::init(cl::BOU_UNSET));
char AsmPrinter::ID = 0;
AsmPrinter::AsmPrinter(raw_ostream &o, TargetMachine &tm,
const TargetAsmInfo *T, bool F)
const TargetAsmInfo *T, bool F, bool VDef)
: MachineFunctionPass(&ID), FunctionNumber(0), Fast(F), O(o),
TM(tm), TAI(T), TRI(tm.getRegisterInfo()),
IsInTextSection(false)
{}
{
switch (AsmVerbose) {
case cl::BOU_UNSET: VerboseAsm = VDef; break;
case cl::BOU_TRUE: VerboseAsm = true; break;
case cl::BOU_FALSE: VerboseAsm = false; break;
}
}
AsmPrinter::~AsmPrinter() {
for (gcp_iterator I = GCMetadataPrinters.begin(),

8
lib/CodeGen/AsmPrinter/DwarfWriter.cpp
View File

@ -1072,7 +1072,7 @@ public:
Asm->EOL("Offset");
} else if (Reg < 64) {
Asm->EmitInt8(DW_CFA_offset + Reg);
if (VerboseAsm)
if (Asm->isVerbose())
Asm->EOL("DW_CFA_offset + Reg (" + utostr(Reg) + ")");
else
Asm->EOL();
@ -2197,7 +2197,7 @@ private:
// Emit the code (index) for the abbreviation.
Asm->EmitULEB128Bytes(AbbrevNumber);
if (VerboseAsm)
if (Asm->isVerbose())
Asm->EOL(std::string("Abbrev [" +
utostr(AbbrevNumber) +
"] 0x" + utohexstr(Die->getOffset()) +
@ -2487,7 +2487,7 @@ private:
// Isolate current sections line info.
const std::vector<SrcLineInfo> &LineInfos = SectionSourceLines[j];
if (VerboseAsm) {
if (Asm->isVerbose()) {
const Section* S = SectionMap[j + 1];
O << '\t' << TAI->getCommentString() << " Section"
<< S->getName() << '\n';
@ -2504,7 +2504,7 @@ private:
unsigned LabelID = MMI->MappedLabel(LineInfo.getLabelID());
if (!LabelID) continue;
if (!VerboseAsm)
if (!Asm->isVerbose())
Asm->EOL();
else {
std::pair<unsigned, unsigned> SourceID =

2
lib/CodeGen/LLVMTargetMachine.cpp
View File

@ -76,7 +76,7 @@ LLVMTargetMachine::addPassesToEmitFile(PassManagerBase &PM,
default:
break;
case TargetMachine::AssemblyFile:
if (addAssemblyEmitter(PM, Fast, Out))
if (addAssemblyEmitter(PM, Fast, getAsmVerbosityDefault(), Out))
return FileModel::Error;
return FileModel::AsmFile;
case TargetMachine::ObjectFile:

2
lib/Target/ARM/ARM.h
View File

@ -91,7 +91,7 @@ inline static const char *ARMCondCodeToString(ARMCC::CondCodes CC) {
FunctionPass *createARMISelDag(ARMTargetMachine &TM);
FunctionPass *createARMCodePrinterPass(raw_ostream &O,
ARMTargetMachine &TM,
bool Fast);
bool Fast, bool Verbose);
FunctionPass *createARMCodeEmitterPass(ARMTargetMachine &TM,
MachineCodeEmitter &MCE);
FunctionPass *createARMLoadStoreOptimizationPass();

8
lib/Target/ARM/ARMTargetMachine.cpp
View File

@ -156,11 +156,11 @@ bool ARMTargetMachine::addPreEmitPass(PassManagerBase &PM, bool Fast) {
}
bool ARMTargetMachine::addAssemblyEmitter(PassManagerBase &PM, bool Fast,
raw_ostream &Out) {
bool Verbose, raw_ostream &Out) {
// Output assembly language.
assert(AsmPrinterCtor && "AsmPrinter was not linked in");
if (AsmPrinterCtor)
PM.add(AsmPrinterCtor(Out, *this, Fast));
PM.add(AsmPrinterCtor(Out, *this, Fast, Verbose));
return false;
}
@ -177,7 +177,7 @@ bool ARMTargetMachine::addCodeEmitter(PassManagerBase &PM, bool Fast,
if (DumpAsm) {
assert(AsmPrinterCtor && "AsmPrinter was not linked in");
if (AsmPrinterCtor)
PM.add(AsmPrinterCtor(errs(), *this, Fast));
PM.add(AsmPrinterCtor(errs(), *this, Fast, true));
}
return false;
@ -190,7 +190,7 @@ bool ARMTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM, bool Fast,
if (DumpAsm) {
assert(AsmPrinterCtor && "AsmPrinter was not linked in");
if (AsmPrinterCtor)
PM.add(AsmPrinterCtor(errs(), *this, Fast));
PM.add(AsmPrinterCtor(errs(), *this, Fast, true));
}
return false;

4
lib/Target/ARM/ARMTargetMachine.h
View File

@ -41,7 +41,7 @@ protected:
// set this functions to ctor pointer at startup time if they are linked in.
typedef FunctionPass *(*AsmPrinterCtorFn)(raw_ostream &o,
ARMTargetMachine &tm,
bool fast);
bool fast, bool verbose);
static AsmPrinterCtorFn AsmPrinterCtor;
public:
@ -72,7 +72,7 @@ public:
virtual bool addInstSelector(PassManagerBase &PM, bool Fast);
virtual bool addPreEmitPass(PassManagerBase &PM, bool Fast);
virtual bool addAssemblyEmitter(PassManagerBase &PM, bool Fast,
raw_ostream &Out);
bool Verbose, raw_ostream &Out);
virtual bool addCodeEmitter(PassManagerBase &PM, bool Fast,
bool DumpAsm, MachineCodeEmitter &MCE);
virtual bool addSimpleCodeEmitter(PassManagerBase &PM, bool Fast,

17
lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp
View File

@ -81,8 +81,8 @@ namespace {
bool InCPMode;
public:
ARMAsmPrinter(raw_ostream &O, TargetMachine &TM,
const TargetAsmInfo *T, bool F)
: AsmPrinter(O, TM, T, F), DW(0), MMI(NULL), AFI(NULL), MCP(NULL),
const TargetAsmInfo *T, bool F, bool V)
: AsmPrinter(O, TM, T, F, V), DW(0), MMI(NULL), AFI(NULL), MCP(NULL),
InCPMode(false) {
Subtarget = &TM.getSubtarget<ARMSubtarget>();
}
@ -346,7 +346,8 @@ void ARMAsmPrinter::printOperand(const MachineInstr *MI, int opNum,
}
}
static void printSOImm(raw_ostream &O, int64_t V, const TargetAsmInfo *TAI) {
static void printSOImm(raw_ostream &O, int64_t V, bool VerboseAsm,
const TargetAsmInfo *TAI) {
assert(V < (1 << 12) && "Not a valid so_imm value!");
unsigned Imm = ARM_AM::getSOImmValImm(V);
unsigned Rot = ARM_AM::getSOImmValRot(V);
@ -369,7 +370,7 @@ static void printSOImm(raw_ostream &O, int64_t V, const TargetAsmInfo *TAI) {
void ARMAsmPrinter::printSOImmOperand(const MachineInstr *MI, int OpNum) {
const MachineOperand &MO = MI->getOperand(OpNum);
assert(MO.isImm() && "Not a valid so_imm value!");
printSOImm(O, MO.getImm(), TAI);
printSOImm(O, MO.getImm(), VerboseAsm, TAI);
}
/// printSOImm2PartOperand - SOImm is broken into two pieces using a 'mov'
@ -379,7 +380,7 @@ void ARMAsmPrinter::printSOImm2PartOperand(const MachineInstr *MI, int OpNum) {
assert(MO.isImm() && "Not a valid so_imm value!");
unsigned V1 = ARM_AM::getSOImmTwoPartFirst(MO.getImm());
unsigned V2 = ARM_AM::getSOImmTwoPartSecond(MO.getImm());
printSOImm(O, ARM_AM::getSOImmVal(V1), TAI);
printSOImm(O, ARM_AM::getSOImmVal(V1), VerboseAsm, TAI);
O << "\n\torr";
printPredicateOperand(MI, 2);
O << " ";
@ -387,7 +388,7 @@ void ARMAsmPrinter::printSOImm2PartOperand(const MachineInstr *MI, int OpNum) {
O << ", ";
printOperand(MI, 0);
O << ", ";
printSOImm(O, ARM_AM::getSOImmVal(V2), TAI);
printSOImm(O, ARM_AM::getSOImmVal(V2), VerboseAsm, TAI);
}
// so_reg is a 4-operand unit corresponding to register forms of the A5.1
@ -1057,8 +1058,8 @@ bool ARMAsmPrinter::doFinalization(Module &M) {
///
FunctionPass *llvm::createARMCodePrinterPass(raw_ostream &o,
ARMTargetMachine &tm,
bool fast) {
return new ARMAsmPrinter(o, tm, tm.getTargetAsmInfo(), fast);
bool fast, bool verbose) {
return new ARMAsmPrinter(o, tm, tm.getTargetAsmInfo(), fast, verbose);
}
namespace {

2
lib/Target/Alpha/Alpha.h
View File

@ -26,7 +26,7 @@ namespace llvm {
FunctionPass *createAlphaISelDag(AlphaTargetMachine &TM);
FunctionPass *createAlphaCodePrinterPass(raw_ostream &OS,
TargetMachine &TM,
bool Fast);
bool Fast, bool Verbose);
FunctionPass *createAlphaPatternInstructionSelector(TargetMachine &TM);
FunctionPass *createAlphaCodeEmitterPass(AlphaTargetMachine &TM,
MachineCodeEmitter &MCE);

5
lib/Target/Alpha/AlphaTargetMachine.cpp
View File

@ -86,16 +86,17 @@ bool AlphaTargetMachine::addPreEmitPass(PassManagerBase &PM, bool Fast) {
return false;
}
bool AlphaTargetMachine::addAssemblyEmitter(PassManagerBase &PM, bool Fast,
bool Verbose,
raw_ostream &Out) {
PM.add(createAlphaLLRPPass(*this));
PM.add(createAlphaCodePrinterPass(Out, *this, Fast));
PM.add(createAlphaCodePrinterPass(Out, *this, Fast, Verbose));
return false;
}
bool AlphaTargetMachine::addCodeEmitter(PassManagerBase &PM, bool Fast,
bool DumpAsm, MachineCodeEmitter &MCE) {
PM.add(createAlphaCodeEmitterPass(*this, MCE));
if (DumpAsm)
PM.add(createAlphaCodePrinterPass(errs(), *this, Fast));
PM.add(createAlphaCodePrinterPass(errs(), *this, Fast, true));
return false;
}
bool AlphaTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,

2
lib/Target/Alpha/AlphaTargetMachine.h
View File

@ -61,7 +61,7 @@ public:
virtual bool addInstSelector(PassManagerBase &PM, bool Fast);
virtual bool addPreEmitPass(PassManagerBase &PM, bool Fast);
virtual bool addAssemblyEmitter(PassManagerBase &PM, bool Fast,
raw_ostream &Out);
bool Verbose, raw_ostream &Out);
virtual bool addCodeEmitter(PassManagerBase &PM, bool Fast,
bool DumpAsm, MachineCodeEmitter &MCE);
virtual bool addSimpleCodeEmitter(PassManagerBase &PM, bool Fast,

8
lib/Target/Alpha/AsmPrinter/AlphaAsmPrinter.cpp
View File

@ -37,8 +37,8 @@ namespace {
///
AlphaAsmPrinter(raw_ostream &o, TargetMachine &tm,
const TargetAsmInfo *T, bool F)
: AsmPrinter(o, tm, T, F) {}
const TargetAsmInfo *T, bool F, bool V)
: AsmPrinter(o, tm, T, F, V) {}
virtual const char *getPassName() const {
return "Alpha Assembly Printer";
@ -68,8 +68,8 @@ namespace {
///
FunctionPass *llvm::createAlphaCodePrinterPass(raw_ostream &o,
TargetMachine &tm,
bool fast) {
return new AlphaAsmPrinter(o, tm, tm.getTargetAsmInfo(), fast);
bool fast, bool verbose) {
return new AlphaAsmPrinter(o, tm, tm.getTargetAsmInfo(), fast, verbose);
}
#include "AlphaGenAsmWriter.inc"

12
lib/Target/CellSPU/AsmPrinter/SPUAsmPrinter.cpp
View File

@ -49,8 +49,8 @@ namespace {
std::set<std::string> FnStubs, GVStubs;
public:
SPUAsmPrinter(raw_ostream &O, TargetMachine &TM,
const TargetAsmInfo *T, bool F) :
AsmPrinter(O, TM, T, F) {}
const TargetAsmInfo *T, bool F, bool V) :
AsmPrinter(O, TM, T, F, V) {}
virtual const char *getPassName() const {
return "STI CBEA SPU Assembly Printer";
@ -289,8 +289,8 @@ namespace {
MachineModuleInfo *MMI;
public:
LinuxAsmPrinter(raw_ostream &O, SPUTargetMachine &TM,
const TargetAsmInfo *T, bool F)
: SPUAsmPrinter(O, TM, T, F), DW(0), MMI(0) {}
const TargetAsmInfo *T, bool F, bool V)
: SPUAsmPrinter(O, TM, T, F, V), DW(0), MMI(0) {}
virtual const char *getPassName() const {
return "STI CBEA SPU Assembly Printer";
@ -615,6 +615,6 @@ bool LinuxAsmPrinter::doFinalization(Module &M) {
///
FunctionPass *llvm::createSPUAsmPrinterPass(raw_ostream &o,
SPUTargetMachine &tm,
bool fast) {
return new LinuxAsmPrinter(o, tm, tm.getTargetAsmInfo(), fast);
bool fast, bool verbose) {
return new LinuxAsmPrinter(o, tm, tm.getTargetAsmInfo(), fast, verbose);
}

2
lib/Target/CellSPU/SPU.h
View File

@ -25,7 +25,7 @@ namespace llvm {
FunctionPass *createSPUISelDag(SPUTargetMachine &TM);
FunctionPass *createSPUAsmPrinterPass(raw_ostream &o,
SPUTargetMachine &tm,
bool fast);
bool fast, bool verbose);
/*--== Utility functions/predicates/etc used all over the place: --==*/
//! Predicate test for a signed 10-bit value

4
lib/Target/CellSPU/SPUTargetMachine.cpp
View File

@ -89,7 +89,7 @@ SPUTargetMachine::addInstSelector(PassManagerBase &PM, bool Fast)
}
bool SPUTargetMachine::addAssemblyEmitter(PassManagerBase &PM, bool Fast,
raw_ostream &Out) {
PM.add(createSPUAsmPrinterPass(Out, *this, Fast));
bool Verbose, raw_ostream &Out) {
PM.add(createSPUAsmPrinterPass(Out, *this, Fast, Verbose));
return false;
}

2
lib/Target/CellSPU/SPUTargetMachine.h
View File

@ -85,7 +85,7 @@ public:
// Pass Pipeline Configuration
virtual bool addInstSelector(PassManagerBase &PM, bool /*Fast*/);
virtual bool addAssemblyEmitter(PassManagerBase &PM, bool /*Fast*/,
raw_ostream &Out);
bool /*Verbose*/, raw_ostream &Out);
};
} // end namespace llvm

2
lib/Target/IA64/IA64.h
View File

@ -37,7 +37,7 @@ FunctionPass *createIA64BundlingPass(IA64TargetMachine &TM);
///
FunctionPass *createIA64CodePrinterPass(raw_ostream &o,
IA64TargetMachine &tm,
bool fast);
bool fast, bool verbose);
} // End llvm namespace

8
lib/Target/IA64/IA64AsmPrinter.cpp
View File

@ -38,8 +38,8 @@ namespace {
std::set<std::string> ExternalFunctionNames, ExternalObjectNames;
public:
IA64AsmPrinter(raw_ostream &O, TargetMachine &TM,
const TargetAsmInfo *T, bool F)
: AsmPrinter(O, TM, T, F) {}
const TargetAsmInfo *T, bool F, bool V)
: AsmPrinter(O, TM, T, F, V) {}
virtual const char *getPassName() const {
return "IA64 Assembly Printer";
@ -370,6 +370,6 @@ bool IA64AsmPrinter::doFinalization(Module &M) {
///
FunctionPass *llvm::createIA64CodePrinterPass(raw_ostream &o,
IA64TargetMachine &tm,
bool fast) {
return new IA64AsmPrinter(o, tm, tm.getTargetAsmInfo(), fast);
bool fast, bool verbose) {
return new IA64AsmPrinter(o, tm, tm.getTargetAsmInfo(), fast, verbose);
}

4
lib/Target/IA64/IA64TargetMachine.cpp
View File

@ -83,8 +83,8 @@ bool IA64TargetMachine::addPreEmitPass(PassManagerBase &PM, bool Fast) {
return true;
}
bool IA64TargetMachine::addAssemblyEmitter(PassManagerBase &PM, bool Fast,
raw_ostream &Out) {
PM.add(createIA64CodePrinterPass(Out, *this, Fast));
bool Verbose, raw_ostream &Out) {
PM.add(createIA64CodePrinterPass(Out, *this, Fast, Verbose));
return false;
}

2
lib/Target/IA64/IA64TargetMachine.h
View File

@ -54,7 +54,7 @@ public:
virtual bool addInstSelector(PassManagerBase &PM, bool Fast);
virtual bool addPreEmitPass(PassManagerBase &PM, bool Fast);
virtual bool addAssemblyEmitter(PassManagerBase &PM, bool Fast,
raw_ostream &Out);
bool Verbose, raw_ostream &Out);
};
} // End llvm namespace

2
lib/Target/Mips/Mips.h
View File

@ -25,7 +25,7 @@ namespace llvm {
FunctionPass *createMipsDelaySlotFillerPass(MipsTargetMachine &TM);
FunctionPass *createMipsCodePrinterPass(raw_ostream &OS,
MipsTargetMachine &TM,
bool Fast);
bool Fast, bool Verbose);
} // end namespace llvm;
// Defines symbolic names for Mips registers. This defines a mapping from

8
lib/Target/Mips/MipsAsmPrinter.cpp
View File

@ -50,8 +50,8 @@ namespace {
const MipsSubtarget *Subtarget;
public:
MipsAsmPrinter(raw_ostream &O, MipsTargetMachine &TM,
const TargetAsmInfo *T, bool F)
: AsmPrinter(O, TM, T, F) {
const TargetAsmInfo *T, bool F, bool V)
: AsmPrinter(O, TM, T, F, V) {
Subtarget = &TM.getSubtarget<MipsSubtarget>();
}
@ -91,8 +91,8 @@ namespace {
/// regardless of whether the function is in SSA form.
FunctionPass *llvm::createMipsCodePrinterPass(raw_ostream &o,
MipsTargetMachine &tm,
bool fast) {
return new MipsAsmPrinter(o, tm, tm.getTargetAsmInfo(), fast);
bool fast, bool verbose) {
return new MipsAsmPrinter(o, tm, tm.getTargetAsmInfo(), fast, verbose);
}
//===----------------------------------------------------------------------===//

4
lib/Target/Mips/MipsTargetMachine.cpp
View File

@ -125,9 +125,9 @@ addPreEmitPass(PassManagerBase &PM, bool Fast)
// true if AssemblyEmitter is supported
bool MipsTargetMachine::
addAssemblyEmitter(PassManagerBase &PM, bool Fast,
raw_ostream &Out)
bool Verbose, raw_ostream &Out)
{
// Output assembly language.
PM.add(createMipsCodePrinterPass(Out, *this, Fast));
PM.add(createMipsCodePrinterPass(Out, *this, Fast, Verbose));
return false;
}

2
lib/Target/Mips/MipsTargetMachine.h
View File

@ -60,7 +60,7 @@ namespace llvm {
virtual bool addInstSelector(PassManagerBase &PM, bool Fast);
virtual bool addPreEmitPass(PassManagerBase &PM, bool Fast);
virtual bool addAssemblyEmitter(PassManagerBase &PM, bool Fast,
raw_ostream &Out);
bool Verbose, raw_ostream &Out);
};
/// MipselTargetMachine - Mipsel target machine.

2
lib/Target/PIC16/PIC16.h
View File

@ -75,7 +75,7 @@ namespace PIC16CC {
FunctionPass *createPIC16ISelDag(PIC16TargetMachine &TM);
FunctionPass *createPIC16CodePrinterPass(raw_ostream &OS,
PIC16TargetMachine &TM,
bool Fast);
bool Fast, bool Verbose);
} // end namespace llvm;
// Defines symbolic names for PIC16 registers. This defines a mapping from

4
lib/Target/PIC16/PIC16AsmPrinter.cpp
View File

@ -139,8 +139,8 @@ bool PIC16AsmPrinter::runOnMachineFunction(MachineFunction &MF) {
///
FunctionPass *llvm::createPIC16CodePrinterPass(raw_ostream &o,
PIC16TargetMachine &tm,
bool fast) {
return new PIC16AsmPrinter(o, tm, tm.getTargetAsmInfo(), fast);
bool fast, bool verbose) {
return new PIC16AsmPrinter(o, tm, tm.getTargetAsmInfo(), fast, verbose);
}
void PIC16AsmPrinter::printOperand(const MachineInstr *MI, int opNum) {

6
lib/Target/PIC16/PIC16AsmPrinter.h
View File

@ -24,9 +24,9 @@
namespace llvm {
struct VISIBILITY_HIDDEN PIC16AsmPrinter : public AsmPrinter {
PIC16AsmPrinter(raw_ostream &O, TargetMachine &TM,
const TargetAsmInfo *T, bool F)
: AsmPrinter(O, TM, T, F) {
PIC16AsmPrinter(raw_ostream &O, TargetMachine &TM,
const TargetAsmInfo *T, bool F, bool V)
: AsmPrinter(O, TM, T, F, V) {
CurBank = "";
IsRomData = false;
}

5
lib/Target/PIC16/PIC16TargetMachine.cpp
View File

@ -62,9 +62,10 @@ bool PIC16TargetMachine::addInstSelector(PassManagerBase &PM, bool Fast) {
}
bool PIC16TargetMachine::
addAssemblyEmitter(PassManagerBase &PM, bool Fast, raw_ostream &Out) {
addAssemblyEmitter(PassManagerBase &PM, bool Fast, bool Verbose,
raw_ostream &Out) {
// Output assembly language.
PM.add(createPIC16CodePrinterPass(Out, *this, Fast));
PM.add(createPIC16CodePrinterPass(Out, *this, Fast, Verbose));
return false;
}

2
lib/Target/PIC16/PIC16TargetMachine.h
View File

@ -59,7 +59,7 @@ public:
virtual bool addInstSelector(PassManagerBase &PM, bool Fast);
virtual bool addAssemblyEmitter(PassManagerBase &PM, bool Fast,
raw_ostream &Out);
bool Verbose, raw_ostream &Out);
}; // PIC16TargetMachine.
/// CooperTargetMachine

18
lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp
View File

@ -55,8 +55,8 @@ namespace {
const PPCSubtarget &Subtarget;
public:
PPCAsmPrinter(raw_ostream &O, TargetMachine &TM,
const TargetAsmInfo *T, bool F)
: AsmPrinter(O, TM, T, F),
const TargetAsmInfo *T, bool F, bool V)
: AsmPrinter(O, TM, T, F, V),
Subtarget(TM.getSubtarget<PPCSubtarget>()) {}
virtual const char *getPassName() const {
@ -298,8 +298,8 @@ namespace {
MachineModuleInfo *MMI;
public:
PPCLinuxAsmPrinter(raw_ostream &O, PPCTargetMachine &TM,
const TargetAsmInfo *T, bool F)
: PPCAsmPrinter(O, TM, T, F), DW(0), MMI(0) {}
const TargetAsmInfo *T, bool F, bool V)
: PPCAsmPrinter(O, TM, T, F, V), DW(0), MMI(0) {}
virtual const char *getPassName() const {
return "Linux PPC Assembly Printer";
@ -327,8 +327,8 @@ namespace {
raw_ostream &OS;
public:
PPCDarwinAsmPrinter(raw_ostream &O, PPCTargetMachine &TM,
const TargetAsmInfo *T, bool F)
: PPCAsmPrinter(O, TM, T, F), DW(0), MMI(0), OS(O) {}
const TargetAsmInfo *T, bool F, bool V)
: PPCAsmPrinter(O, TM, T, F, V), DW(0), MMI(0), OS(O) {}
virtual const char *getPassName() const {
return "Darwin PPC Assembly Printer";
@ -1175,13 +1175,13 @@ bool PPCDarwinAsmPrinter::doFinalization(Module &M) {
///
FunctionPass *llvm::createPPCAsmPrinterPass(raw_ostream &o,
PPCTargetMachine &tm,
bool fast) {
bool fast, bool verbose) {
const PPCSubtarget *Subtarget = &tm.getSubtarget<PPCSubtarget>();
if (Subtarget->isDarwin()) {
return new PPCDarwinAsmPrinter(o, tm, tm.getTargetAsmInfo(), fast);
return new PPCDarwinAsmPrinter(o, tm, tm.getTargetAsmInfo(), fast, verbose);
} else {
return new PPCLinuxAsmPrinter(o, tm, tm.getTargetAsmInfo(), fast);
return new PPCLinuxAsmPrinter(o, tm, tm.getTargetAsmInfo(), fast, verbose);
}
}

2
lib/Target/PowerPC/PPC.h
View File

@ -28,7 +28,7 @@ FunctionPass *createPPCBranchSelectionPass();
FunctionPass *createPPCISelDag(PPCTargetMachine &TM);
FunctionPass *createPPCAsmPrinterPass(raw_ostream &OS,
PPCTargetMachine &TM,
bool Fast);
bool Fast, bool Verbose);
FunctionPass *createPPCCodeEmitterPass(PPCTargetMachine &TM,
MachineCodeEmitter &MCE);
} // end namespace llvm;

8
lib/Target/PowerPC/PPCTargetMachine.cpp
View File

@ -143,10 +143,10 @@ bool PPCTargetMachine::addPreEmitPass(PassManagerBase &PM, bool Fast) {
}
bool PPCTargetMachine::addAssemblyEmitter(PassManagerBase &PM, bool Fast,
raw_ostream &Out) {
bool Verbose, raw_ostream &Out) {
assert(AsmPrinterCtor && "AsmPrinter was not linked in");
if (AsmPrinterCtor)
PM.add(AsmPrinterCtor(Out, *this, Fast));
PM.add(AsmPrinterCtor(Out, *this, Fast, Verbose));
return false;
}
@ -176,7 +176,7 @@ bool PPCTargetMachine::addCodeEmitter(PassManagerBase &PM, bool Fast,
if (DumpAsm) {
assert(AsmPrinterCtor && "AsmPrinter was not linked in");
if (AsmPrinterCtor)
PM.add(AsmPrinterCtor(errs(), *this, Fast));
PM.add(AsmPrinterCtor(errs(), *this, Fast, true));
}
return false;
@ -189,7 +189,7 @@ bool PPCTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM, bool Fast,
if (DumpAsm) {
assert(AsmPrinterCtor && "AsmPrinter was not linked in");
if (AsmPrinterCtor)
PM.add(AsmPrinterCtor(errs(), *this, Fast));
PM.add(AsmPrinterCtor(errs(), *this, Fast, true));
}
return false;

4
lib/Target/PowerPC/PPCTargetMachine.h
View File

@ -46,7 +46,7 @@ protected:
// set this functions to ctor pointer at startup time if they are linked in.
typedef FunctionPass *(*AsmPrinterCtorFn)(raw_ostream &o,
PPCTargetMachine &tm,
bool fast);
bool fast, bool verbose);
static AsmPrinterCtorFn AsmPrinterCtor;
public:
@ -79,7 +79,7 @@ public:
virtual bool addInstSelector(PassManagerBase &PM, bool Fast);
virtual bool addPreEmitPass(PassManagerBase &PM, bool Fast);
virtual bool addAssemblyEmitter(PassManagerBase &PM, bool Fast,
raw_ostream &Out);
bool Verbose, raw_ostream &Out);
virtual bool addCodeEmitter(PassManagerBase &PM, bool Fast,
bool DumpAsm, MachineCodeEmitter &MCE);
virtual bool addSimpleCodeEmitter(PassManagerBase &PM, bool Fast,

8
lib/Target/Sparc/AsmPrinter/SparcAsmPrinter.cpp
View File

@ -49,8 +49,8 @@ namespace {
ValueMapTy NumberForBB;
public:
SparcAsmPrinter(raw_ostream &O, TargetMachine &TM,
const TargetAsmInfo *T, bool F)
: AsmPrinter(O, TM, T, F) {}
const TargetAsmInfo *T, bool F, bool V)
: AsmPrinter(O, TM, T, F, V) {}
virtual const char *getPassName() const {
return "Sparc Assembly Printer";
@ -82,8 +82,8 @@ namespace {
///
FunctionPass *llvm::createSparcCodePrinterPass(raw_ostream &o,
TargetMachine &tm,
bool fast) {
return new SparcAsmPrinter(o, tm, tm.getTargetAsmInfo(), fast);
bool fast, bool verbose) {
return new SparcAsmPrinter(o, tm, tm.getTargetAsmInfo(), fast, verbose);
}
/// runOnMachineFunction - This uses the printInstruction()

4
lib/Target/Sparc/Sparc.h
View File

@ -24,8 +24,8 @@ namespace llvm {
class raw_ostream;
FunctionPass *createSparcISelDag(SparcTargetMachine &TM);
FunctionPass *createSparcCodePrinterPass(raw_ostream &OS,
TargetMachine &TM, bool Fast);
FunctionPass *createSparcCodePrinterPass(raw_ostream &OS, TargetMachine &TM,
bool Fast, bool Verbose);
FunctionPass *createSparcDelaySlotFillerPass(TargetMachine &TM);
FunctionPass *createSparcFPMoverPass(TargetMachine &TM);
} // end namespace llvm;

4
lib/Target/Sparc/SparcTargetMachine.cpp
View File

@ -83,8 +83,8 @@ bool SparcTargetMachine::addPreEmitPass(PassManagerBase &PM, bool Fast) {
}
bool SparcTargetMachine::addAssemblyEmitter(PassManagerBase &PM, bool Fast,
raw_ostream &Out) {
bool Verbose, raw_ostream &Out) {
// Output assembly language.
PM.add(createSparcCodePrinterPass(Out, *this, Fast));
PM.add(createSparcCodePrinterPass(Out, *this, Fast, Verbose));
return false;
}

2
lib/Target/Sparc/SparcTargetMachine.h
View File

@ -54,7 +54,7 @@ public:
virtual bool addInstSelector(PassManagerBase &PM, bool Fast);
virtual bool addPreEmitPass(PassManagerBase &PM, bool Fast);
virtual bool addAssemblyEmitter(PassManagerBase &PM, bool Fast,
raw_ostream &Out);
bool Verbose, raw_ostream &Out);
};
} // end namespace llvm

14
lib/Target/TargetMachine.cpp
View File

@ -39,10 +39,10 @@ namespace llvm {
bool PerformTailCallOpt;
unsigned StackAlignment;
bool RealignStack;
bool VerboseAsm;
bool DisableJumpTables;
bool StrongPHIElim;
bool DisableRedZone;
bool AsmVerbosityDefault(false);
}
static cl::opt<bool, true>
@ -154,10 +154,6 @@ EnableRealignStack("realign-stack",
cl::location(RealignStack),
cl::init(true));
static cl::opt<bool, true>
AsmVerbose("asm-verbose", cl::desc("Add comments to directives."),
cl::location(VerboseAsm),
cl::init(false));
static cl::opt<bool, true>
DisableSwitchTables(cl::Hidden, "disable-jump-tables",
cl::desc("Do not generate jump tables."),
cl::location(DisableJumpTables),
@ -203,6 +199,14 @@ void TargetMachine::setCodeModel(CodeModel::Model Model) {
CMModel = Model;
}
bool TargetMachine::getAsmVerbosityDefault() {
return AsmVerbosityDefault;
}
void TargetMachine::setAsmVerbosityDefault(bool V) {
AsmVerbosityDefault = V;
}
namespace llvm {
/// LessPreciseFPMAD - This flag return true when -enable-fp-mad option
/// is specified on the command line. When this flag is off(default), the

4
lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.h
View File

@ -34,8 +34,8 @@ class VISIBILITY_HIDDEN X86ATTAsmPrinter : public AsmPrinter {
const X86Subtarget *Subtarget;
public:
X86ATTAsmPrinter(raw_ostream &O, X86TargetMachine &TM,
const TargetAsmInfo *T, bool F)
: AsmPrinter(O, TM, T, F), DW(0), MMI(0) {
const TargetAsmInfo *T, bool F, bool V)
: AsmPrinter(O, TM, T, F, V), DW(0), MMI(0) {
Subtarget = &TM.getSubtarget<X86Subtarget>();
}

6
lib/Target/X86/AsmPrinter/X86AsmPrinter.cpp
View File

@ -25,13 +25,13 @@ using namespace llvm;
///
FunctionPass *llvm::createX86CodePrinterPass(raw_ostream &o,
X86TargetMachine &tm,
bool fast) {
bool fast, bool verbose) {
const X86Subtarget *Subtarget = &tm.getSubtarget<X86Subtarget>();
if (Subtarget->isFlavorIntel()) {
return new X86IntelAsmPrinter(o, tm, tm.getTargetAsmInfo(), fast);
return new X86IntelAsmPrinter(o, tm, tm.getTargetAsmInfo(), fast, verbose);
} else {
return new X86ATTAsmPrinter(o, tm, tm.getTargetAsmInfo(), fast);
return new X86ATTAsmPrinter(o, tm, tm.getTargetAsmInfo(), fast, verbose);
}
}

4
lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.h
View File

@ -26,8 +26,8 @@ namespace llvm {
struct VISIBILITY_HIDDEN X86IntelAsmPrinter : public AsmPrinter {
X86IntelAsmPrinter(raw_ostream &O, X86TargetMachine &TM,
const TargetAsmInfo *T, bool F)
: AsmPrinter(O, TM, T, F) {}
const TargetAsmInfo *T, bool F, bool V)
: AsmPrinter(O, TM, T, F, V) {}
virtual const char *getPassName() const {
return "X86 Intel-Style Assembly Printer";

2
lib/Target/X86/X86.h
View File

@ -44,7 +44,7 @@ FunctionPass *createX87FPRegKillInserterPass();
///
FunctionPass *createX86CodePrinterPass(raw_ostream &o,
X86TargetMachine &tm,
bool fast);
bool fast, bool Verbose);
/// createX86CodeEmitterPass - Return a pass that emits the collected X86 code
/// to the specified MCE object.

8
lib/Target/X86/X86TargetMachine.cpp
View File

@ -207,10 +207,10 @@ bool X86TargetMachine::addPostRegAlloc(PassManagerBase &PM, bool Fast) {
}
bool X86TargetMachine::addAssemblyEmitter(PassManagerBase &PM, bool Fast,
raw_ostream &Out) {
bool Verbose, raw_ostream &Out) {
assert(AsmPrinterCtor && "AsmPrinter was not linked in");
if (AsmPrinterCtor)
PM.add(AsmPrinterCtor(Out, *this, Fast));
PM.add(AsmPrinterCtor(Out, *this, Fast, Verbose));
return false;
}
@ -236,7 +236,7 @@ bool X86TargetMachine::addCodeEmitter(PassManagerBase &PM, bool Fast,
if (DumpAsm) {
assert(AsmPrinterCtor && "AsmPrinter was not linked in");
if (AsmPrinterCtor)
PM.add(AsmPrinterCtor(errs(), *this, Fast));
PM.add(AsmPrinterCtor(errs(), *this, Fast, true));
}
return false;
@ -248,7 +248,7 @@ bool X86TargetMachine::addSimpleCodeEmitter(PassManagerBase &PM, bool Fast,
if (DumpAsm) {
assert(AsmPrinterCtor && "AsmPrinter was not linked in");
if (AsmPrinterCtor)
PM.add(AsmPrinterCtor(errs(), *this, Fast));
PM.add(AsmPrinterCtor(errs(), *this, Fast, true));
}
return false;

4
lib/Target/X86/X86TargetMachine.h
View File

@ -45,7 +45,7 @@ protected:
// set this functions to ctor pointer at startup time if they are linked in.
typedef FunctionPass *(*AsmPrinterCtorFn)(raw_ostream &o,
X86TargetMachine &tm,
bool fast);
bool fast, bool verbose);
static AsmPrinterCtorFn AsmPrinterCtor;
public:
@ -78,7 +78,7 @@ public:
virtual bool addPreRegAlloc(PassManagerBase &PM, bool Fast);
virtual bool addPostRegAlloc(PassManagerBase &PM, bool Fast);
virtual bool addAssemblyEmitter(PassManagerBase &PM, bool Fast,
raw_ostream &Out);
bool Verbose, raw_ostream &Out);
virtual bool addCodeEmitter(PassManagerBase &PM, bool Fast,
bool DumpAsm, MachineCodeEmitter &MCE);
virtual bool addSimpleCodeEmitter(PassManagerBase &PM, bool Fast,

2
lib/Target/XCore/XCore.h
View File

@ -24,7 +24,7 @@ namespace llvm {
FunctionPass *createXCoreISelDag(XCoreTargetMachine &TM);
FunctionPass *createXCoreCodePrinterPass(raw_ostream &OS,
XCoreTargetMachine &TM,
bool Fast);
bool Fast, bool Verbose);
} // end namespace llvm;
// Defines symbolic names for XCore registers. This defines a mapping from

8
lib/Target/XCore/XCoreAsmPrinter.cpp
View File

@ -58,8 +58,8 @@ namespace {
const XCoreSubtarget &Subtarget;
public:
XCoreAsmPrinter(raw_ostream &O, XCoreTargetMachine &TM,
const TargetAsmInfo *T, bool F)
: AsmPrinter(O, TM, T, F), DW(0),
const TargetAsmInfo *T, bool F, bool V)
: AsmPrinter(O, TM, T, F, V), DW(0),
Subtarget(*TM.getSubtargetImpl()) {}
virtual const char *getPassName() const {
@ -105,8 +105,8 @@ namespace {
///
FunctionPass *llvm::createXCoreCodePrinterPass(raw_ostream &o,
XCoreTargetMachine &tm,
bool fast) {
return new XCoreAsmPrinter(o, tm, tm.getTargetAsmInfo(), fast);
bool fast, bool verbose) {
return new XCoreAsmPrinter(o, tm, tm.getTargetAsmInfo(), fast, verbose);
}
// PrintEscapedString - Print each character of the specified string, escaping

4
lib/Target/XCore/XCoreTargetMachine.cpp
View File

@ -61,8 +61,8 @@ bool XCoreTargetMachine::addInstSelector(PassManagerBase &PM, bool Fast) {
}
bool XCoreTargetMachine::addAssemblyEmitter(PassManagerBase &PM, bool Fast,
raw_ostream &Out) {
bool Verbose, raw_ostream &Out) {
// Output assembly language.
PM.add(createXCoreCodePrinterPass(Out, *this, Fast));
PM.add(createXCoreCodePrinterPass(Out, *this, Fast, Verbose));
return false;
}

2
lib/Target/XCore/XCoreTargetMachine.h
View File

@ -54,7 +54,7 @@ public:
// Pass Pipeline Configuration
virtual bool addInstSelector(PassManagerBase &PM, bool Fast);
virtual bool addAssemblyEmitter(PassManagerBase &PM, bool Fast,
raw_ostream &Out);
bool Verbose, raw_ostream &Out);
};
} // end namespace llvm

2
test/CodeGen/X86/2007-06-04-tailmerge4.ll
View File

@ -1,4 +1,4 @@
; RUN: llvm-as < %s | llc -enable-eh -asm-verbose | grep invcont131
; RUN: llvm-as < %s | llc -enable-eh | grep invcont131
; PR 1496: tail merge was incorrectly removing this block
; ModuleID = 'report.1.bc'

2
test/CodeGen/X86/2008-03-23-DarwinAsmComments.ll
View File

@ -1,4 +1,4 @@
; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin -asm-verbose | grep {#} | not grep -v {##}
; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin | grep {#} | not grep -v {##}
%struct.AGenericCall = type { %struct.AGenericManager*, %struct.ComponentParameters*, i32* }
%struct.AGenericManager = type <{ i8 }>

2
test/CodeGen/X86/2009-03-16-PHIElimInLPad.ll
View File

@ -1,4 +1,4 @@
; RUN: llvm-as < %s | llc -march=x86 -asm-verbose | grep -A 1 lpad | grep Llabel
; RUN: llvm-as < %s | llc -march=x86 | grep -A 1 lpad | grep Llabel
; Check that register copies in the landing pad come after the EH_LABEL
declare i32 @f()

2
test/CodeGen/X86/aliases.ll
View File

@ -1,5 +1,5 @@
; RUN: llvm-as < %s | \
; RUN: llc -mtriple=i686-pc-linux-gnu -o %t -f
; RUN: llc -mtriple=i686-pc-linux-gnu -asm-verbose=false -o %t -f
; RUN: grep set %t | count 7
; RUN: grep globl %t | count 6
; RUN: grep weak %t | count 1

6
test/CodeGen/X86/pic_jumptable.ll
View File

@ -1,6 +1,6 @@
; RUN: llvm-as < %s | llc -relocation-model=pic -mtriple=i386-linux-gnu | not grep -F .text
; RUN: llvm-as < %s | llc -relocation-model=pic -mtriple=i686-apple-darwin | not grep lea
; RUN: llvm-as < %s | llc -relocation-model=pic -mtriple=i686-apple-darwin | grep add | count 2
; RUN: llvm-as < %s | llc -relocation-model=pic -mtriple=i386-linux-gnu -asm-verbose=false | not grep -F .text
; RUN: llvm-as < %s | llc -relocation-model=pic -mtriple=i686-apple-darwin -asm-verbose=false | not grep lea
; RUN: llvm-as < %s | llc -relocation-model=pic -mtriple=i686-apple-darwin -asm-verbose=false | grep add | count 2
declare void @_Z3bari(i32)