RPCS3/llvm
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm.git synced 2024-12-28 15:33:16 +00:00
Code Issues Actions Packages Projects Releases Wiki Activity

Fix thinko on store instructions. Fixes test_indvars failure.

Browse Source 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115342 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Eric Christopher 2010-10-01 20:46:04 +00:00
parent 00d4f48168
commit 45547b844d
1 changed files with 6 additions and 6 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

12
lib/Target/ARM/ARMFastISel.cpp
View File

@ -718,17 +718,17 @@ bool ARMFastISel::ARMEmitStore(EVT VT, unsigned SrcReg,
// mode, the floating point one only has two operands.
if (isFloat)
AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL,
TII.get(StrOpc), SrcReg)
.addReg(DstReg).addImm(Offset));
TII.get(StrOpc))
.addReg(SrcReg).addReg(DstReg).addImm(Offset));
else if (isThumb)
AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL,
TII.get(StrOpc), SrcReg)
.addReg(DstReg).addImm(Offset).addReg(0));
TII.get(StrOpc))
.addReg(SrcReg).addReg(DstReg).addImm(Offset).addReg(0));
else
AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL,
TII.get(StrOpc), SrcReg)
.addReg(DstReg).addReg(0).addImm(Offset));
TII.get(StrOpc))
.addReg(SrcReg).addReg(DstReg).addReg(0).addImm(Offset));
return true;
}