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Added truncate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24760 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -391,6 +391,34 @@ SDOperand X86DAGToDAGISel::Select(SDOperand N) {
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}
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break;
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case ISD::TRUNCATE: {
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unsigned Reg;
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MVT::ValueType VT;
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switch (Node->getOperand(0).getValueType()) {
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default: assert(0 && "Unknown truncate!");
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case MVT::i16: Reg = X86::AX; Opc = X86::MOV16rr; VT = MVT::i16; break;
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case MVT::i32: Reg = X86::EAX; Opc = X86::MOV32rr; VT = MVT::i32; break;
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}
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SDOperand Tmp0 = Select(Node->getOperand(0));
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SDOperand Tmp1 = CurDAG->getTargetNode(Opc, VT, Tmp0);
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SDOperand InFlag = SDOperand(0,0);
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SDOperand Result = CurDAG->getCopyToReg(CurDAG->getEntryNode(),
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Reg, Tmp1, InFlag).getValue(1);
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SDOperand Chain = Result.getValue(0);
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InFlag = Result.getValue(1);
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switch (NVT) {
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default: assert(0 && "Unknown truncate!");
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case MVT::i8: Reg = X86::AL; Opc = X86::MOV8rr; VT = MVT::i8; break;
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case MVT::i16: Reg = X86::AX; Opc = X86::MOV16rr; VT = MVT::i16; break;
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}
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Result = CurDAG->getCopyFromReg(Chain,
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Reg, VT, InFlag);
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return CodeGenMap[N] = CurDAG->getTargetNode(Opc, VT, Result);
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break;
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}
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case ISD::RET: {
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SDOperand Chain = Node->getOperand(0); // Token chain.
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unsigned NumOps = Node->getNumOperands();
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