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[mips] Join some adjacent let DecoderNamespace
blocks. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@356059 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -694,6 +694,10 @@ def BREAK16_MM : BrkSdbbp16MM<"break16", II_BREAK>, BRKSDBBP16_FM_MM<0x28>,
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def SDBBP16_MM : BrkSdbbp16MM<"sdbbp16", II_SDBBP>, BRKSDBBP16_FM_MM<0x2C>,
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ISA_MICROMIPS32_NOT_MIPS32R6;
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class WaitMM<string opstr> :
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InstSE<(outs), (ins uimm10:$code_), !strconcat(opstr, "\t$code_"), [],
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II_WAIT, FrmOther, opstr>;
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let DecoderNamespace = "MicroMips" in {
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/// Load and Store Instructions - multiple
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def SWM16_MM : StoreMultMM16<"swm16", II_SWM>, LWM_FM_MM16<0x5>,
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@ -706,13 +710,7 @@ let DecoderNamespace = "MicroMips" in {
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def CTC2_MM : InstSE<(outs COP2Opnd:$impl), (ins GPR32Opnd:$rt),
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"ctc2\t$rt, $impl", [], II_CTC2, FrmFR, "ctc2">,
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POOL32A_CFTC2_FM_MM<0b1101110100>, ISA_MICROMIPS;
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}
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class WaitMM<string opstr> :
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InstSE<(outs), (ins uimm10:$code_), !strconcat(opstr, "\t$code_"), [],
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II_WAIT, FrmOther, opstr>;
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let DecoderNamespace = "MicroMips" in {
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/// Compact Branch Instructions
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def BEQZC_MM : CompactBranchMM<"beqzc", brtarget_mm, seteq, GPR32Opnd>,
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COMPACT_BRANCH_FM_MM<0x7>, ISA_MICROMIPS32_NOT_MIPS32R6;
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@ -822,8 +820,7 @@ let DecoderNamespace = "MicroMips" in {
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def SW_MM : Store<"sw", GPR32Opnd, null_frag, II_SW>, MMRel,
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LW_FM_MM<0x3e>, ISA_MICROMIPS;
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}
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}
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let DecoderNamespace = "MicroMips" in {
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let DecoderMethod = "DecodeMemMMImm9" in {
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def LBE_MM : MMRel, Load<"lbe", GPR32Opnd, null_frag, II_LBE>,
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POOL32C_LHUE_FM_MM<0x18, 0x6, 0x4>, ISA_MICROMIPS, ASE_EVA;
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@ -881,8 +878,7 @@ let DecoderNamespace = "MicroMips" in {
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def SWR_MM : MMRel, StoreLeftRightMM<"swr", MipsSWR, GPR32Opnd, mem_mm_12,
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II_SWR>, LWL_FM_MM<0x9>,
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ISA_MICROMIPS32_NOT_MIPS32R6;
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}
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let DecoderNamespace = "MicroMips" in {
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/// Load and Store Instructions - multiple
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def SWM32_MM : StoreMultMM<"swm32", II_SWM>, LWM_FM_MM<0xd>, ISA_MICROMIPS;
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def LWM32_MM : LoadMultMM<"lwm32", II_LWM>, LWM_FM_MM<0x5>, ISA_MICROMIPS;
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@ -1139,9 +1135,7 @@ let DecoderNamespace = "MicroMips" in {
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def LWU_MM : MMRel, LoadMM<"lwu", GPR32Opnd, zextloadi32, II_LWU,
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mem_simm12>, LL_FM_MM<0xe>,
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ISA_MICROMIPS32_NOT_MIPS32R6;
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}
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let DecoderNamespace = "MicroMips" in {
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def MFGC0_MM : MMRel, MfCop0MM<"mfgc0", GPR32Opnd, COP0Opnd, II_MFGC0>,
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POOL32A_MFTC0_FM_MM<0b10011, 0b111100>,
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ISA_MICROMIPS32R5, ASE_VIRT;
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@ -1204,7 +1198,7 @@ def : MipsPat<(atomic_load_32 addr:$a), (LW_MM addr:$a)>, ISA_MICROMIPS;
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def : MipsPat<(i32 immLi16:$imm),
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(LI16_MM immLi16:$imm)>, ISA_MICROMIPS;
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defm : MaterializeImms<i32, ZERO, ADDiu_MM, LUi_MM, ORi_MM>, ISA_MICROMIPS;
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defm : MaterializeImms<i32, ZERO, ADDiu_MM, LUi_MM, ORi_MM>, ISA_MICROMIPS;
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def : MipsPat<(not GPRMM16:$in),
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(NOT16_MM GPRMM16:$in)>, ISA_MICROMIPS;
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