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[X86][SSE] Use PSLLDQ/PSRLDQ to mask out zeroable ends of a shuffle
As suggested on PR40318, this patch uses PSLLDQ/PSRLDQ to lower shuffles to zero out the ends of a vector, leaving a sequential inner section. For pre-SSSE3 we do this for shuffles with zeros at either end (requiring up to 3 shifts), but once PSHUFB is available I've limited this to shuffles with a single zeroable end (2 shifts). Differential Revision: https://reviews.llvm.org/D56784 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352883 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Simon Pilgrim
@@ -10935,6 +10935,69 @@ static SDValue lowerShuffleAsRotate(const SDLoc &DL, MVT VT, SDValue V1,
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DAG.getConstant(Rotation, DL, MVT::i8));
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}
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/// Try to lower a vector shuffle as a byte shift sequence.
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static SDValue lowerVectorShuffleAsByteShiftMask(
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const SDLoc &DL, MVT VT, SDValue V1, SDValue V2, ArrayRef<int> Mask,
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const APInt &Zeroable, const X86Subtarget &Subtarget, SelectionDAG &DAG) {
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assert(!isNoopShuffleMask(Mask) && "We shouldn't lower no-op shuffles!");
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assert(VT.is128BitVector() && "Only 128-bit vectors supported");
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// We need a shuffle that has zeros at one/both ends and a sequential
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// shuffle from one source within.
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unsigned ZeroLo = Zeroable.countTrailingOnes();
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unsigned ZeroHi = Zeroable.countLeadingOnes();
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if (!ZeroLo && !ZeroHi)
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return SDValue();
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unsigned NumElts = Mask.size();
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unsigned Len = NumElts - (ZeroLo + ZeroHi);
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if (!isSequentialOrUndefInRange(Mask, ZeroLo, Len, Mask[ZeroLo]))
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return SDValue();
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unsigned Scale = VT.getScalarSizeInBits() / 8;
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ArrayRef<int> StubMask = Mask.slice(ZeroLo, Len);
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if (!isUndefOrInRange(StubMask, 0, NumElts) &&
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!isUndefOrInRange(StubMask, NumElts, 2 * NumElts))
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return SDValue();
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SDValue Res = Mask[ZeroLo] < (int)NumElts ? V1 : V2;
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Res = DAG.getBitcast(MVT::v16i8, Res);
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// Use VSHLDQ/VSRLDQ ops to zero the ends of a vector and leave an
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// inner sequential set of elements, possibly offset:
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// 01234567 --> zzzzzz01 --> 1zzzzzzz
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// 01234567 --> 4567zzzz --> zzzzz456
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// 01234567 --> z0123456 --> 3456zzzz --> zz3456zz
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if (ZeroLo == 0) {
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unsigned Shift = (NumElts - 1) - (Mask[ZeroLo + Len - 1] % NumElts);
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Res = DAG.getNode(X86ISD::VSHLDQ, DL, MVT::v16i8, Res,
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DAG.getConstant(Scale * Shift, DL, MVT::i8));
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Res = DAG.getNode(X86ISD::VSRLDQ, DL, MVT::v16i8, Res,
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DAG.getConstant(Scale * ZeroHi, DL, MVT::i8));
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} else if (ZeroHi == 0) {
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unsigned Shift = Mask[ZeroLo] % NumElts;
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Res = DAG.getNode(X86ISD::VSRLDQ, DL, MVT::v16i8, Res,
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DAG.getConstant(Scale * Shift, DL, MVT::i8));
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Res = DAG.getNode(X86ISD::VSHLDQ, DL, MVT::v16i8, Res,
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DAG.getConstant(Scale * ZeroLo, DL, MVT::i8));
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} else if (!Subtarget.hasSSSE3()) {
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// If we don't have PSHUFB then its worth avoiding an AND constant mask
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// by performing 3 byte shifts. Shuffle combining can kick in above that.
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// TODO: There may be some cases where VSH{LR}DQ+PAND is still better.
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unsigned Shift = (NumElts - 1) - (Mask[ZeroLo + Len - 1] % NumElts);
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Res = DAG.getNode(X86ISD::VSHLDQ, DL, MVT::v16i8, Res,
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DAG.getConstant(Scale * Shift, DL, MVT::i8));
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Shift += Mask[ZeroLo] % NumElts;
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Res = DAG.getNode(X86ISD::VSRLDQ, DL, MVT::v16i8, Res,
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DAG.getConstant(Scale * Shift, DL, MVT::i8));
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Res = DAG.getNode(X86ISD::VSHLDQ, DL, MVT::v16i8, Res,
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DAG.getConstant(Scale * ZeroLo, DL, MVT::i8));
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} else
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return SDValue();
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return DAG.getBitcast(VT, Res);
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}
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/// Try to lower a vector shuffle as a bit shift (shifts in zeros).
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///
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/// Attempts to match a shuffle mask against the PSLL(W/D/Q/DQ) and
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@@ -13339,6 +13402,11 @@ static SDValue lowerV8I16Shuffle(const SDLoc &DL, ArrayRef<int> Mask,
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lowerShuffleAsBitBlend(DL, MVT::v8i16, V1, V2, Mask, DAG))
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return BitBlend;
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// Try to use byte shift instructions to mask.
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if (SDValue V = lowerVectorShuffleAsByteShiftMask(
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DL, MVT::v8i16, V1, V2, Mask, Zeroable, Subtarget, DAG))
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return V;
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// Try to lower by permuting the inputs into an unpack instruction.
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if (SDValue Unpack = lowerShuffleAsPermuteAndUnpack(DL, MVT::v8i16, V1, V2,
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Mask, Subtarget, DAG))
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@@ -13588,6 +13656,11 @@ static SDValue lowerV16I8Shuffle(const SDLoc &DL, ArrayRef<int> Mask,
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if (SDValue V = lowerShuffleWithUNPCK(DL, MVT::v16i8, Mask, V1, V2, DAG))
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return V;
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// Try to use byte shift instructions to mask.
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if (SDValue V = lowerVectorShuffleAsByteShiftMask(
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DL, MVT::v16i8, V1, V2, Mask, Zeroable, Subtarget, DAG))
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return V;
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// Check for SSSE3 which lets us lower all v16i8 shuffles much more directly
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// with PSHUFB. It is important to do this before we attempt to generate any
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// blends but after all of the single-input lowerings. If the single input
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@@ -402,24 +402,16 @@ define <2 x i64> @extract0_i16_zext_insert0_i64_zero(<8 x i16> %x) {
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}
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define <2 x i64> @extract1_i16_zext_insert0_i64_undef(<8 x i16> %x) {
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; SSE2-LABEL: extract1_i16_zext_insert0_i64_undef:
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; SSE2: # %bb.0:
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; SSE2-NEXT: psrld $16, %xmm0
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; SSE2-NEXT: pxor %xmm1, %xmm1
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; SSE2-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3]
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; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
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; SSE2-NEXT: retq
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;
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; SSE41-LABEL: extract1_i16_zext_insert0_i64_undef:
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; SSE41: # %bb.0:
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; SSE41-NEXT: psrld $16, %xmm0
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; SSE41-NEXT: pmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
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; SSE41-NEXT: retq
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; SSE-LABEL: extract1_i16_zext_insert0_i64_undef:
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; SSE: # %bb.0:
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; SSE-NEXT: pslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3]
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; SSE-NEXT: psrldq {{.*#+}} xmm0 = xmm0[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
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; SSE-NEXT: retq
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;
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; AVX-LABEL: extract1_i16_zext_insert0_i64_undef:
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; AVX: # %bb.0:
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; AVX-NEXT: vpsrld $16, %xmm0, %xmm0
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; AVX-NEXT: vpmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
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; AVX-NEXT: vpslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3]
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; AVX-NEXT: vpsrldq {{.*#+}} xmm0 = xmm0[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
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; AVX-NEXT: retq
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%e = extractelement <8 x i16> %x, i32 1
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%z = zext i16 %e to i64
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@@ -446,24 +438,16 @@ define <2 x i64> @extract1_i16_zext_insert0_i64_zero(<8 x i16> %x) {
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}
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define <2 x i64> @extract2_i16_zext_insert0_i64_undef(<8 x i16> %x) {
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; SSE2-LABEL: extract2_i16_zext_insert0_i64_undef:
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; SSE2: # %bb.0:
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; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,2,3]
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; SSE2-NEXT: pxor %xmm1, %xmm1
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; SSE2-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3]
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; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
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; SSE2-NEXT: retq
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;
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; SSE41-LABEL: extract2_i16_zext_insert0_i64_undef:
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; SSE41: # %bb.0:
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; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,2,3]
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; SSE41-NEXT: pmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
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; SSE41-NEXT: retq
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; SSE-LABEL: extract2_i16_zext_insert0_i64_undef:
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; SSE: # %bb.0:
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; SSE-NEXT: pslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3,4,5]
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; SSE-NEXT: psrldq {{.*#+}} xmm0 = xmm0[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
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; SSE-NEXT: retq
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;
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; AVX-LABEL: extract2_i16_zext_insert0_i64_undef:
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; AVX: # %bb.0:
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; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[1,1,2,3]
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; AVX-NEXT: vpmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
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; AVX-NEXT: vpslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3,4,5]
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; AVX-NEXT: vpsrldq {{.*#+}} xmm0 = xmm0[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
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; AVX-NEXT: retq
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%e = extractelement <8 x i16> %x, i32 2
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%z = zext i16 %e to i64
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@@ -526,8 +510,9 @@ define <2 x i64> @extract3_i16_zext_insert0_i64_zero(<8 x i16> %x) {
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define <2 x i64> @extract0_i16_zext_insert1_i64_undef(<8 x i16> %x) {
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; SSE2-LABEL: extract0_i16_zext_insert1_i64_undef:
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; SSE2: # %bb.0:
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; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,1,0,1]
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; SSE2-NEXT: pand {{.*}}(%rip), %xmm0
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; SSE2-NEXT: pslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1]
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; SSE2-NEXT: psrldq {{.*#+}} xmm0 = xmm0[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
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; SSE2-NEXT: pslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3,4,5,6,7]
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; SSE2-NEXT: retq
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;
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; SSE41-LABEL: extract0_i16_zext_insert1_i64_undef:
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@@ -615,8 +600,9 @@ define <2 x i64> @extract1_i16_zext_insert1_i64_zero(<8 x i16> %x) {
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define <2 x i64> @extract2_i16_zext_insert1_i64_undef(<8 x i16> %x) {
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; SSE2-LABEL: extract2_i16_zext_insert1_i64_undef:
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; SSE2: # %bb.0:
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; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,1,1,3]
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; SSE2-NEXT: pand {{.*}}(%rip), %xmm0
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; SSE2-NEXT: pslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3,4,5]
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; SSE2-NEXT: psrldq {{.*#+}} xmm0 = xmm0[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
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; SSE2-NEXT: pslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3,4,5,6,7]
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; SSE2-NEXT: retq
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;
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; SSE41-LABEL: extract2_i16_zext_insert1_i64_undef:
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@@ -661,8 +647,9 @@ define <2 x i64> @extract2_i16_zext_insert1_i64_zero(<8 x i16> %x) {
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define <2 x i64> @extract3_i16_zext_insert1_i64_undef(<8 x i16> %x) {
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; SSE2-LABEL: extract3_i16_zext_insert1_i64_undef:
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; SSE2: # %bb.0:
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; SSE2-NEXT: pslldq {{.*#+}} xmm0 = zero,zero,xmm0[0,1,2,3,4,5,6,7,8,9,10,11,12,13]
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; SSE2-NEXT: pand {{.*}}(%rip), %xmm0
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; SSE2-NEXT: pslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3,4,5,6,7]
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; SSE2-NEXT: psrldq {{.*#+}} xmm0 = xmm0[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
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; SSE2-NEXT: pslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3,4,5,6,7]
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; SSE2-NEXT: retq
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;
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; SSE41-LABEL: extract3_i16_zext_insert1_i64_undef:
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@@ -1535,19 +1535,9 @@ define <16 x i8> @shuffle_v16i8_07_zz_zz_zz_zz_zz_uu_uu_15_uu_uu_uu_uu_uu_zz_zz(
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define <16 x i8> @shuffle_v16i8_zz_zz_zz_zz_01_02_03_04_05_06_zz_zz_zz_zz_zz_zz(<16 x i8> %a) {
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; SSE2-LABEL: shuffle_v16i8_zz_zz_zz_zz_01_02_03_04_05_06_zz_zz_zz_zz_zz_zz:
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; SSE2: # %bb.0:
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; SSE2-NEXT: pand {{.*}}(%rip), %xmm0
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; SSE2-NEXT: pxor %xmm1, %xmm1
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; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3],xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7]
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; SSE2-NEXT: pshufhw {{.*#+}} xmm1 = xmm0[0,1,2,3,6,5,6,7]
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; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,0,3]
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; SSE2-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[3,2,0,0,4,5,6,7]
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; SSE2-NEXT: pshufhw {{.*#+}} xmm1 = xmm1[0,1,2,3,4,4,4,4]
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; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[3,1,2,0]
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; SSE2-NEXT: pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,7,6,7]
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; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,3,2,1]
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; SSE2-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[2,2,2,2,4,5,6,7]
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; SSE2-NEXT: pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,5,6,7,4]
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; SSE2-NEXT: packuswb %xmm1, %xmm0
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; SSE2-NEXT: pslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3,4,5,6]
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; SSE2-NEXT: psrldq {{.*#+}} xmm0 = xmm0[10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
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; SSE2-NEXT: pslldq {{.*#+}} xmm0 = zero,zero,zero,zero,xmm0[0,1,2,3,4,5,6,7,8,9,10,11]
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; SSE2-NEXT: retq
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;
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; SSSE3-LABEL: shuffle_v16i8_zz_zz_zz_zz_01_02_03_04_05_06_zz_zz_zz_zz_zz_zz:
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@@ -1569,70 +1559,65 @@ define <16 x i8> @shuffle_v16i8_zz_zz_zz_zz_01_02_03_04_05_06_zz_zz_zz_zz_zz_zz(
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}
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define <16 x i8> @shuffle_v16i8_01_02_03_04_05_06_zz_zz_zz_zz_zz_zz_zz_zz_zz_zz(<16 x i8> %a) {
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; SSE2-LABEL: shuffle_v16i8_01_02_03_04_05_06_zz_zz_zz_zz_zz_zz_zz_zz_zz_zz:
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; SSE2: # %bb.0:
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; SSE2-NEXT: pand {{.*}}(%rip), %xmm0
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; SSE2-NEXT: pxor %xmm1, %xmm1
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; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3],xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7]
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; SSE2-NEXT: pshuflw {{.*#+}} xmm1 = xmm0[0,0,2,3,4,5,6,7]
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; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,0,0,0]
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; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[3,1,2,0]
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; SSE2-NEXT: pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,6,5,4,7]
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; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[3,1,2,0]
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; SSE2-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[1,2,3,0,4,5,6,7]
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; SSE2-NEXT: pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,5,6,4,4]
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; SSE2-NEXT: packuswb %xmm1, %xmm0
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; SSE2-NEXT: retq
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; SSE-LABEL: shuffle_v16i8_01_02_03_04_05_06_zz_zz_zz_zz_zz_zz_zz_zz_zz_zz:
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; SSE: # %bb.0:
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; SSE-NEXT: pslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3,4,5,6]
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; SSE-NEXT: psrldq {{.*#+}} xmm0 = xmm0[10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
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; SSE-NEXT: retq
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;
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; SSSE3-LABEL: shuffle_v16i8_01_02_03_04_05_06_zz_zz_zz_zz_zz_zz_zz_zz_zz_zz:
|
||||
; SSSE3: # %bb.0:
|
||||
; SSSE3-NEXT: pshufb {{.*#+}} xmm0 = xmm0[1,2,3,4,5,6],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
|
||||
; SSSE3-NEXT: retq
|
||||
; AVX1-LABEL: shuffle_v16i8_01_02_03_04_05_06_zz_zz_zz_zz_zz_zz_zz_zz_zz_zz:
|
||||
; AVX1: # %bb.0:
|
||||
; AVX1-NEXT: vpslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3,4,5,6]
|
||||
; AVX1-NEXT: vpsrldq {{.*#+}} xmm0 = xmm0[10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
|
||||
; AVX1-NEXT: retq
|
||||
;
|
||||
; SSE41-LABEL: shuffle_v16i8_01_02_03_04_05_06_zz_zz_zz_zz_zz_zz_zz_zz_zz_zz:
|
||||
; SSE41: # %bb.0:
|
||||
; SSE41-NEXT: pshufb {{.*#+}} xmm0 = xmm0[1,2,3,4,5,6],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
|
||||
; SSE41-NEXT: retq
|
||||
; AVX2-SLOW-LABEL: shuffle_v16i8_01_02_03_04_05_06_zz_zz_zz_zz_zz_zz_zz_zz_zz_zz:
|
||||
; AVX2-SLOW: # %bb.0:
|
||||
; AVX2-SLOW-NEXT: vpslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3,4,5,6]
|
||||
; AVX2-SLOW-NEXT: vpsrldq {{.*#+}} xmm0 = xmm0[10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
|
||||
; AVX2-SLOW-NEXT: retq
|
||||
;
|
||||
; AVX-LABEL: shuffle_v16i8_01_02_03_04_05_06_zz_zz_zz_zz_zz_zz_zz_zz_zz_zz:
|
||||
; AVX: # %bb.0:
|
||||
; AVX-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[1,2,3,4,5,6],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
|
||||
; AVX-NEXT: retq
|
||||
; AVX2-FAST-LABEL: shuffle_v16i8_01_02_03_04_05_06_zz_zz_zz_zz_zz_zz_zz_zz_zz_zz:
|
||||
; AVX2-FAST: # %bb.0:
|
||||
; AVX2-FAST-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[1,2,3,4,5,6],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
|
||||
; AVX2-FAST-NEXT: retq
|
||||
;
|
||||
; AVX512VL-LABEL: shuffle_v16i8_01_02_03_04_05_06_zz_zz_zz_zz_zz_zz_zz_zz_zz_zz:
|
||||
; AVX512VL: # %bb.0:
|
||||
; AVX512VL-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[1,2,3,4,5,6],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
|
||||
; AVX512VL-NEXT: retq
|
||||
%shuffle = shufflevector <16 x i8> %a, <16 x i8> <i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef>, <16 x i32> <i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16>
|
||||
ret <16 x i8> %shuffle
|
||||
}
|
||||
|
||||
define <16 x i8> @shuffle_v16i8_zz_zz_zz_zz_zz_zz_zz_zz_zz_zz_01_02_03_04_05_06(<16 x i8> %a) {
|
||||
; SSE2-LABEL: shuffle_v16i8_zz_zz_zz_zz_zz_zz_zz_zz_zz_zz_01_02_03_04_05_06:
|
||||
; SSE2: # %bb.0:
|
||||
; SSE2-NEXT: pand {{.*}}(%rip), %xmm0
|
||||
; SSE2-NEXT: pxor %xmm1, %xmm1
|
||||
; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3],xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7]
|
||||
; SSE2-NEXT: pshuflw {{.*#+}} xmm1 = xmm0[0,0,2,3,4,5,6,7]
|
||||
; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,0,0,0]
|
||||
; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[3,1,2,0]
|
||||
; SSE2-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,3,2,3,4,5,6,7]
|
||||
; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[3,1,2,0]
|
||||
; SSE2-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,0,1,2,4,5,6,7]
|
||||
; SSE2-NEXT: pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,7,4,5,6]
|
||||
; SSE2-NEXT: packuswb %xmm0, %xmm1
|
||||
; SSE2-NEXT: movdqa %xmm1, %xmm0
|
||||
; SSE2-NEXT: retq
|
||||
; SSE-LABEL: shuffle_v16i8_zz_zz_zz_zz_zz_zz_zz_zz_zz_zz_01_02_03_04_05_06:
|
||||
; SSE: # %bb.0:
|
||||
; SSE-NEXT: psrldq {{.*#+}} xmm0 = xmm0[1,2,3,4,5,6,7,8,9,10,11,12,13,14,15],zero
|
||||
; SSE-NEXT: pslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3,4,5]
|
||||
; SSE-NEXT: retq
|
||||
;
|
||||
; SSSE3-LABEL: shuffle_v16i8_zz_zz_zz_zz_zz_zz_zz_zz_zz_zz_01_02_03_04_05_06:
|
||||
; SSSE3: # %bb.0:
|
||||
; SSSE3-NEXT: pshufb {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm0[1,2,3,4,5,6]
|
||||
; SSSE3-NEXT: retq
|
||||
; AVX1-LABEL: shuffle_v16i8_zz_zz_zz_zz_zz_zz_zz_zz_zz_zz_01_02_03_04_05_06:
|
||||
; AVX1: # %bb.0:
|
||||
; AVX1-NEXT: vpsrldq {{.*#+}} xmm0 = xmm0[1,2,3,4,5,6,7,8,9,10,11,12,13,14,15],zero
|
||||
; AVX1-NEXT: vpslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3,4,5]
|
||||
; AVX1-NEXT: retq
|
||||
;
|
||||
; SSE41-LABEL: shuffle_v16i8_zz_zz_zz_zz_zz_zz_zz_zz_zz_zz_01_02_03_04_05_06:
|
||||
; SSE41: # %bb.0:
|
||||
; SSE41-NEXT: pshufb {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm0[1,2,3,4,5,6]
|
||||
; SSE41-NEXT: retq
|
||||
; AVX2-SLOW-LABEL: shuffle_v16i8_zz_zz_zz_zz_zz_zz_zz_zz_zz_zz_01_02_03_04_05_06:
|
||||
; AVX2-SLOW: # %bb.0:
|
||||
; AVX2-SLOW-NEXT: vpsrldq {{.*#+}} xmm0 = xmm0[1,2,3,4,5,6,7,8,9,10,11,12,13,14,15],zero
|
||||
; AVX2-SLOW-NEXT: vpslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3,4,5]
|
||||
; AVX2-SLOW-NEXT: retq
|
||||
;
|
||||
; AVX-LABEL: shuffle_v16i8_zz_zz_zz_zz_zz_zz_zz_zz_zz_zz_01_02_03_04_05_06:
|
||||
; AVX: # %bb.0:
|
||||
; AVX-NEXT: vpshufb {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm0[1,2,3,4,5,6]
|
||||
; AVX-NEXT: retq
|
||||
; AVX2-FAST-LABEL: shuffle_v16i8_zz_zz_zz_zz_zz_zz_zz_zz_zz_zz_01_02_03_04_05_06:
|
||||
; AVX2-FAST: # %bb.0:
|
||||
; AVX2-FAST-NEXT: vpshufb {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm0[1,2,3,4,5,6]
|
||||
; AVX2-FAST-NEXT: retq
|
||||
;
|
||||
; AVX512VL-LABEL: shuffle_v16i8_zz_zz_zz_zz_zz_zz_zz_zz_zz_zz_01_02_03_04_05_06:
|
||||
; AVX512VL: # %bb.0:
|
||||
; AVX512VL-NEXT: vpshufb {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm0[1,2,3,4,5,6]
|
||||
; AVX512VL-NEXT: retq
|
||||
%shuffle = shufflevector <16 x i8> %a, <16 x i8> <i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef>, <16 x i32> <i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6>
|
||||
ret <16 x i8> %shuffle
|
||||
}
|
||||
|
||||
@@ -2477,92 +2477,99 @@ define <8 x i16> @shuffle_v8i16_8012345u(<8 x i16> %a) {
|
||||
|
||||
; PR40306
|
||||
define <8 x i16> @shuffle_v8i16_9zzzuuuu(<8 x i16> %x) {
|
||||
; SSE2-LABEL: shuffle_v8i16_9zzzuuuu:
|
||||
; SSE2: # %bb.0:
|
||||
; SSE2-NEXT: psrld $16, %xmm0
|
||||
; SSE2-NEXT: pxor %xmm1, %xmm1
|
||||
; SSE2-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3]
|
||||
; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
|
||||
; SSE2-NEXT: retq
|
||||
; SSE-LABEL: shuffle_v8i16_9zzzuuuu:
|
||||
; SSE: # %bb.0:
|
||||
; SSE-NEXT: pslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3]
|
||||
; SSE-NEXT: psrldq {{.*#+}} xmm0 = xmm0[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
|
||||
; SSE-NEXT: retq
|
||||
;
|
||||
; SSSE3-LABEL: shuffle_v8i16_9zzzuuuu:
|
||||
; SSSE3: # %bb.0:
|
||||
; SSSE3-NEXT: pshufb {{.*#+}} xmm0 = xmm0[2,3],zero,zero,zero,zero,zero,zero,xmm0[u,u,u,u,u,u,u,u]
|
||||
; SSSE3-NEXT: retq
|
||||
; AVX1-LABEL: shuffle_v8i16_9zzzuuuu:
|
||||
; AVX1: # %bb.0:
|
||||
; AVX1-NEXT: vpslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3]
|
||||
; AVX1-NEXT: vpsrldq {{.*#+}} xmm0 = xmm0[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
|
||||
; AVX1-NEXT: retq
|
||||
;
|
||||
; SSE41-LABEL: shuffle_v8i16_9zzzuuuu:
|
||||
; SSE41: # %bb.0:
|
||||
; SSE41-NEXT: psrld $16, %xmm0
|
||||
; SSE41-NEXT: pmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
|
||||
; SSE41-NEXT: retq
|
||||
; AVX2-SLOW-LABEL: shuffle_v8i16_9zzzuuuu:
|
||||
; AVX2-SLOW: # %bb.0:
|
||||
; AVX2-SLOW-NEXT: vpslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3]
|
||||
; AVX2-SLOW-NEXT: vpsrldq {{.*#+}} xmm0 = xmm0[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
|
||||
; AVX2-SLOW-NEXT: retq
|
||||
;
|
||||
; AVX-LABEL: shuffle_v8i16_9zzzuuuu:
|
||||
; AVX: # %bb.0:
|
||||
; AVX-NEXT: vpsrld $16, %xmm0, %xmm0
|
||||
; AVX-NEXT: vpmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
|
||||
; AVX-NEXT: retq
|
||||
; AVX2-FAST-LABEL: shuffle_v8i16_9zzzuuuu:
|
||||
; AVX2-FAST: # %bb.0:
|
||||
; AVX2-FAST-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[2,3],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
|
||||
; AVX2-FAST-NEXT: retq
|
||||
;
|
||||
; AVX512VL-SLOW-LABEL: shuffle_v8i16_9zzzuuuu:
|
||||
; AVX512VL-SLOW: # %bb.0:
|
||||
; AVX512VL-SLOW-NEXT: vpslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3]
|
||||
; AVX512VL-SLOW-NEXT: vpsrldq {{.*#+}} xmm0 = xmm0[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
|
||||
; AVX512VL-SLOW-NEXT: retq
|
||||
;
|
||||
; AVX512VL-FAST-LABEL: shuffle_v8i16_9zzzuuuu:
|
||||
; AVX512VL-FAST: # %bb.0:
|
||||
; AVX512VL-FAST-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[2,3],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
|
||||
; AVX512VL-FAST-NEXT: retq
|
||||
%r = shufflevector <8 x i16> zeroinitializer, <8 x i16> %x, <8 x i32> <i32 9, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef>
|
||||
ret <8 x i16> %r
|
||||
}
|
||||
|
||||
; PR40318
|
||||
define <8 x i16> @shuffle_v8i16_2zzzuuuu(<8 x i16> %x) {
|
||||
; SSE2-LABEL: shuffle_v8i16_2zzzuuuu:
|
||||
; SSE2: # %bb.0:
|
||||
; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,2,3]
|
||||
; SSE2-NEXT: pxor %xmm1, %xmm1
|
||||
; SSE2-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3]
|
||||
; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
|
||||
; SSE2-NEXT: retq
|
||||
; SSE-LABEL: shuffle_v8i16_2zzzuuuu:
|
||||
; SSE: # %bb.0:
|
||||
; SSE-NEXT: pslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3,4,5]
|
||||
; SSE-NEXT: psrldq {{.*#+}} xmm0 = xmm0[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
|
||||
; SSE-NEXT: retq
|
||||
;
|
||||
; SSSE3-LABEL: shuffle_v8i16_2zzzuuuu:
|
||||
; SSSE3: # %bb.0:
|
||||
; SSSE3-NEXT: pshufb {{.*#+}} xmm0 = xmm0[4,5],zero,zero,zero,zero,zero,zero,xmm0[u,u,u,u,u,u,u,u]
|
||||
; SSSE3-NEXT: retq
|
||||
; AVX1-LABEL: shuffle_v8i16_2zzzuuuu:
|
||||
; AVX1: # %bb.0:
|
||||
; AVX1-NEXT: vpslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3,4,5]
|
||||
; AVX1-NEXT: vpsrldq {{.*#+}} xmm0 = xmm0[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
|
||||
; AVX1-NEXT: retq
|
||||
;
|
||||
; SSE41-LABEL: shuffle_v8i16_2zzzuuuu:
|
||||
; SSE41: # %bb.0:
|
||||
; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,2,3]
|
||||
; SSE41-NEXT: pmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
|
||||
; SSE41-NEXT: retq
|
||||
; AVX2-SLOW-LABEL: shuffle_v8i16_2zzzuuuu:
|
||||
; AVX2-SLOW: # %bb.0:
|
||||
; AVX2-SLOW-NEXT: vpslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3,4,5]
|
||||
; AVX2-SLOW-NEXT: vpsrldq {{.*#+}} xmm0 = xmm0[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
|
||||
; AVX2-SLOW-NEXT: retq
|
||||
;
|
||||
; AVX-LABEL: shuffle_v8i16_2zzzuuuu:
|
||||
; AVX: # %bb.0:
|
||||
; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[1,1,2,3]
|
||||
; AVX-NEXT: vpmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
|
||||
; AVX-NEXT: retq
|
||||
; AVX2-FAST-LABEL: shuffle_v8i16_2zzzuuuu:
|
||||
; AVX2-FAST: # %bb.0:
|
||||
; AVX2-FAST-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[4,5],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
|
||||
; AVX2-FAST-NEXT: retq
|
||||
;
|
||||
; AVX512VL-SLOW-LABEL: shuffle_v8i16_2zzzuuuu:
|
||||
; AVX512VL-SLOW: # %bb.0:
|
||||
; AVX512VL-SLOW-NEXT: vpslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3,4,5]
|
||||
; AVX512VL-SLOW-NEXT: vpsrldq {{.*#+}} xmm0 = xmm0[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
|
||||
; AVX512VL-SLOW-NEXT: retq
|
||||
;
|
||||
; AVX512VL-FAST-LABEL: shuffle_v8i16_2zzzuuuu:
|
||||
; AVX512VL-FAST: # %bb.0:
|
||||
; AVX512VL-FAST-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[4,5],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
|
||||
; AVX512VL-FAST-NEXT: retq
|
||||
%r = shufflevector <8 x i16> %x, <8 x i16> zeroinitializer, <8 x i32> <i32 2, i32 9, i32 10, i32 11, i32 undef, i32 undef, i32 undef, i32 undef>
|
||||
ret <8 x i16> %r
|
||||
}
|
||||
|
||||
define <8 x i16> @shuffle_v8i16_3uu6zzzz(<8 x i16> %x) {
|
||||
; SSE2-LABEL: shuffle_v8i16_3uu6zzzz:
|
||||
; SSE2: # %bb.0:
|
||||
; SSE2-NEXT: psrldq {{.*#+}} xmm0 = xmm0[6,7,8,9,10,11,12,13,14,15],zero,zero,zero,zero,zero,zero
|
||||
; SSE2-NEXT: movq {{.*#+}} xmm0 = xmm0[0],zero
|
||||
; SSE2-NEXT: retq
|
||||
;
|
||||
; SSSE3-LABEL: shuffle_v8i16_3uu6zzzz:
|
||||
; SSSE3: # %bb.0:
|
||||
; SSSE3-NEXT: pshufb {{.*#+}} xmm0 = xmm0[6,7,u,u,u,u,12,13],zero,zero,zero,zero,zero,zero,zero,zero
|
||||
; SSSE3-NEXT: retq
|
||||
;
|
||||
; SSE41-LABEL: shuffle_v8i16_3uu6zzzz:
|
||||
; SSE41: # %bb.0:
|
||||
; SSE41-NEXT: psrldq {{.*#+}} xmm0 = xmm0[6,7,8,9,10,11,12,13,14,15],zero,zero,zero,zero,zero,zero
|
||||
; SSE41-NEXT: movq {{.*#+}} xmm0 = xmm0[0],zero
|
||||
; SSE41-NEXT: retq
|
||||
; SSE-LABEL: shuffle_v8i16_3uu6zzzz:
|
||||
; SSE: # %bb.0:
|
||||
; SSE-NEXT: pslldq {{.*#+}} xmm0 = zero,zero,xmm0[0,1,2,3,4,5,6,7,8,9,10,11,12,13]
|
||||
; SSE-NEXT: psrldq {{.*#+}} xmm0 = xmm0[8,9,10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero
|
||||
; SSE-NEXT: retq
|
||||
;
|
||||
; AVX1-LABEL: shuffle_v8i16_3uu6zzzz:
|
||||
; AVX1: # %bb.0:
|
||||
; AVX1-NEXT: vpsrldq {{.*#+}} xmm0 = xmm0[6,7,8,9,10,11,12,13,14,15],zero,zero,zero,zero,zero,zero
|
||||
; AVX1-NEXT: vmovq {{.*#+}} xmm0 = xmm0[0],zero
|
||||
; AVX1-NEXT: vpslldq {{.*#+}} xmm0 = zero,zero,xmm0[0,1,2,3,4,5,6,7,8,9,10,11,12,13]
|
||||
; AVX1-NEXT: vpsrldq {{.*#+}} xmm0 = xmm0[8,9,10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero
|
||||
; AVX1-NEXT: retq
|
||||
;
|
||||
; AVX2-SLOW-LABEL: shuffle_v8i16_3uu6zzzz:
|
||||
; AVX2-SLOW: # %bb.0:
|
||||
; AVX2-SLOW-NEXT: vpsrldq {{.*#+}} xmm0 = xmm0[6,7,8,9,10,11,12,13,14,15],zero,zero,zero,zero,zero,zero
|
||||
; AVX2-SLOW-NEXT: vmovq {{.*#+}} xmm0 = xmm0[0],zero
|
||||
; AVX2-SLOW-NEXT: vpslldq {{.*#+}} xmm0 = zero,zero,xmm0[0,1,2,3,4,5,6,7,8,9,10,11,12,13]
|
||||
; AVX2-SLOW-NEXT: vpsrldq {{.*#+}} xmm0 = xmm0[8,9,10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero
|
||||
; AVX2-SLOW-NEXT: retq
|
||||
;
|
||||
; AVX2-FAST-LABEL: shuffle_v8i16_3uu6zzzz:
|
||||
@@ -2572,8 +2579,8 @@ define <8 x i16> @shuffle_v8i16_3uu6zzzz(<8 x i16> %x) {
|
||||
;
|
||||
; AVX512VL-SLOW-LABEL: shuffle_v8i16_3uu6zzzz:
|
||||
; AVX512VL-SLOW: # %bb.0:
|
||||
; AVX512VL-SLOW-NEXT: vpsrldq {{.*#+}} xmm0 = xmm0[6,7,8,9,10,11,12,13,14,15],zero,zero,zero,zero,zero,zero
|
||||
; AVX512VL-SLOW-NEXT: vmovq {{.*#+}} xmm0 = xmm0[0],zero
|
||||
; AVX512VL-SLOW-NEXT: vpslldq {{.*#+}} xmm0 = zero,zero,xmm0[0,1,2,3,4,5,6,7,8,9,10,11,12,13]
|
||||
; AVX512VL-SLOW-NEXT: vpsrldq {{.*#+}} xmm0 = xmm0[8,9,10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero
|
||||
; AVX512VL-SLOW-NEXT: retq
|
||||
;
|
||||
; AVX512VL-FAST-LABEL: shuffle_v8i16_3uu6zzzz:
|
||||
|
||||
@@ -410,8 +410,9 @@ define <16 x i8> @shuffle_uu_0_5_uu_uu_uu_uu_uu_uu_uu_uu_uu_uu_uu_uu_uu(<16 x i8
|
||||
define <16 x i8> @shuffle_uu_16_4_16_uu_uu_uu_uu_uu_uu_uu_uu_uu_uu_uu_uu(<16 x i8> %v) {
|
||||
; AMD10H-LABEL: shuffle_uu_16_4_16_uu_uu_uu_uu_uu_uu_uu_uu_uu_uu_uu_uu:
|
||||
; AMD10H: # %bb.0:
|
||||
; AMD10H-NEXT: psrlq $16, %xmm0
|
||||
; AMD10H-NEXT: pand {{.*}}(%rip), %xmm0
|
||||
; AMD10H-NEXT: pslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3,4]
|
||||
; AMD10H-NEXT: psrldq {{.*#+}} xmm0 = xmm0[15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
|
||||
; AMD10H-NEXT: pslldq {{.*#+}} xmm0 = zero,zero,xmm0[0,1,2,3,4,5,6,7,8,9,10,11,12,13]
|
||||
; AMD10H-NEXT: retq
|
||||
;
|
||||
; BTVER1-LABEL: shuffle_uu_16_4_16_uu_uu_uu_uu_uu_uu_uu_uu_uu_uu_uu_uu:
|
||||
|
||||
Reference in New Issue
Block a user