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Add MachineFrameInfo::getPristineRegisters(MBB) method.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78911 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -14,6 +14,7 @@
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#ifndef LLVM_CODEGEN_MACHINEFRAMEINFO_H
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#define LLVM_CODEGEN_MACHINEFRAMEINFO_H
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#include "llvm/ADT/BitVector.h"
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#include "llvm/Support/DataTypes.h"
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#include <cassert>
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#include <iosfwd>
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@ -25,6 +26,7 @@ class TargetRegisterClass;
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class Type;
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class MachineModuleInfo;
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class MachineFunction;
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class MachineBasicBlock;
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class TargetFrameInfo;
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/// The CalleeSavedInfo class tracks the information need to locate where a
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@ -166,7 +168,10 @@ class MachineFrameInfo {
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/// epilog code inserter, this data used for debug info and exception
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/// handling.
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std::vector<CalleeSavedInfo> CSInfo;
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/// CSIValid - Has CSInfo been set yet?
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bool CSIValid;
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/// MMI - This field is set (via setMachineModuleInfo) by a module info
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/// consumer (ex. DwarfWriter) to indicate that frame layout information
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/// should be acquired. Typically, it's the responsibility of the target's
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@ -185,6 +190,7 @@ public:
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HasCalls = false;
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StackProtectorIdx = -1;
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MaxCallFrameSize = 0;
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CSIValid = false;
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MMI = 0;
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}
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@ -389,6 +395,22 @@ public:
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CSInfo = CSI;
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}
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/// isCalleeSavedInfoValid - Has the callee saved info been calculated yet?
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bool isCalleeSavedInfoValid() const { return CSIValid; }
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void setCalleeSavedInfoValid(bool v) { CSIValid = v; }
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/// getPristineRegs - Return a set of physical registers that are pristine on
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/// entry to the MBB.
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///
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/// Pristine registers hold a value that is useless to the current function,
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/// but that must be preserved - they are callee saved registers that have not
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/// been saved yet.
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///
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/// Before the PrologueEpilogueInserter has placed the CSR spill code, this
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/// method always returns an empty set.
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BitVector getPristineRegs(const MachineBasicBlock *MBB) const;
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/// getMachineModuleInfo - Used by a prologue/epilogue
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/// emitter (TargetRegisterInfo) to provide frame layout information.
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MachineModuleInfo *getMachineModuleInfo() const { return MMI; }
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@ -380,6 +380,37 @@ int MachineFrameInfo::CreateFixedObject(uint64_t Size, int64_t SPOffset,
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}
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BitVector
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MachineFrameInfo::getPristineRegs(const MachineBasicBlock *MBB) const {
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assert(MBB && "MBB must be valid");
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const MachineFunction *MF = MBB->getParent();
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assert(MF && "MBB must be part of a MachineFunction");
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const TargetMachine &TM = MF->getTarget();
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const TargetRegisterInfo *TRI = TM.getRegisterInfo();
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BitVector BV(TRI->getNumRegs());
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// Before CSI is calculated, no registers are considered pristine. They can be
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// freely used and PEI will make sure they are saved.
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if (!isCalleeSavedInfoValid())
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return BV;
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for (const unsigned *CSR = TRI->getCalleeSavedRegs(MF); CSR && *CSR; ++CSR)
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BV.set(*CSR);
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// The entry MBB always has all CSRs pristine.
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if (MBB == &MF->front())
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return BV;
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// On other MBBs the saved CSRs are not pristine.
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const std::vector<CalleeSavedInfo> &CSI = getCalleeSavedInfo();
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for (std::vector<CalleeSavedInfo>::const_iterator I = CSI.begin(),
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E = CSI.end(); I != E; ++I)
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BV.reset(I->getReg());
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return BV;
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}
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void MachineFrameInfo::print(const MachineFunction &MF, std::ostream &OS) const{
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const TargetFrameInfo *FI = MF.getTarget().getFrameInfo();
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int ValOffset = (FI ? FI->getOffsetOfLocalArea() : 0);
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@ -420,7 +451,6 @@ void MachineFrameInfo::dump(const MachineFunction &MF) const {
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print(MF, *cerr.stream());
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}
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//===----------------------------------------------------------------------===//
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// MachineJumpTableInfo implementation
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//===----------------------------------------------------------------------===//
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@ -214,6 +214,8 @@ void PEI::calculateCalleeSavedRegisters(MachineFunction &Fn) {
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}
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}
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FFI->setCalleeSavedInfoValid(true);
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if (CSI.empty())
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return; // Early exit if no callee saved registers are modified!
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