Add MachineFrameInfo::getPristineRegisters(MBB) method.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78911 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jakob Stoklund Olesen 2009-08-13 16:19:33 +00:00
parent 710461688b
commit 4a0f08c5fc
3 changed files with 56 additions and 2 deletions

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@ -14,6 +14,7 @@
#ifndef LLVM_CODEGEN_MACHINEFRAMEINFO_H
#define LLVM_CODEGEN_MACHINEFRAMEINFO_H
#include "llvm/ADT/BitVector.h"
#include "llvm/Support/DataTypes.h"
#include <cassert>
#include <iosfwd>
@ -25,6 +26,7 @@ class TargetRegisterClass;
class Type;
class MachineModuleInfo;
class MachineFunction;
class MachineBasicBlock;
class TargetFrameInfo;
/// The CalleeSavedInfo class tracks the information need to locate where a
@ -166,7 +168,10 @@ class MachineFrameInfo {
/// epilog code inserter, this data used for debug info and exception
/// handling.
std::vector<CalleeSavedInfo> CSInfo;
/// CSIValid - Has CSInfo been set yet?
bool CSIValid;
/// MMI - This field is set (via setMachineModuleInfo) by a module info
/// consumer (ex. DwarfWriter) to indicate that frame layout information
/// should be acquired. Typically, it's the responsibility of the target's
@ -185,6 +190,7 @@ public:
HasCalls = false;
StackProtectorIdx = -1;
MaxCallFrameSize = 0;
CSIValid = false;
MMI = 0;
}
@ -389,6 +395,22 @@ public:
CSInfo = CSI;
}
/// isCalleeSavedInfoValid - Has the callee saved info been calculated yet?
bool isCalleeSavedInfoValid() const { return CSIValid; }
void setCalleeSavedInfoValid(bool v) { CSIValid = v; }
/// getPristineRegs - Return a set of physical registers that are pristine on
/// entry to the MBB.
///
/// Pristine registers hold a value that is useless to the current function,
/// but that must be preserved - they are callee saved registers that have not
/// been saved yet.
///
/// Before the PrologueEpilogueInserter has placed the CSR spill code, this
/// method always returns an empty set.
BitVector getPristineRegs(const MachineBasicBlock *MBB) const;
/// getMachineModuleInfo - Used by a prologue/epilogue
/// emitter (TargetRegisterInfo) to provide frame layout information.
MachineModuleInfo *getMachineModuleInfo() const { return MMI; }

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@ -380,6 +380,37 @@ int MachineFrameInfo::CreateFixedObject(uint64_t Size, int64_t SPOffset,
}
BitVector
MachineFrameInfo::getPristineRegs(const MachineBasicBlock *MBB) const {
assert(MBB && "MBB must be valid");
const MachineFunction *MF = MBB->getParent();
assert(MF && "MBB must be part of a MachineFunction");
const TargetMachine &TM = MF->getTarget();
const TargetRegisterInfo *TRI = TM.getRegisterInfo();
BitVector BV(TRI->getNumRegs());
// Before CSI is calculated, no registers are considered pristine. They can be
// freely used and PEI will make sure they are saved.
if (!isCalleeSavedInfoValid())
return BV;
for (const unsigned *CSR = TRI->getCalleeSavedRegs(MF); CSR && *CSR; ++CSR)
BV.set(*CSR);
// The entry MBB always has all CSRs pristine.
if (MBB == &MF->front())
return BV;
// On other MBBs the saved CSRs are not pristine.
const std::vector<CalleeSavedInfo> &CSI = getCalleeSavedInfo();
for (std::vector<CalleeSavedInfo>::const_iterator I = CSI.begin(),
E = CSI.end(); I != E; ++I)
BV.reset(I->getReg());
return BV;
}
void MachineFrameInfo::print(const MachineFunction &MF, std::ostream &OS) const{
const TargetFrameInfo *FI = MF.getTarget().getFrameInfo();
int ValOffset = (FI ? FI->getOffsetOfLocalArea() : 0);
@ -420,7 +451,6 @@ void MachineFrameInfo::dump(const MachineFunction &MF) const {
print(MF, *cerr.stream());
}
//===----------------------------------------------------------------------===//
// MachineJumpTableInfo implementation
//===----------------------------------------------------------------------===//

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@ -214,6 +214,8 @@ void PEI::calculateCalleeSavedRegisters(MachineFunction &Fn) {
}
}
FFI->setCalleeSavedInfoValid(true);
if (CSI.empty())
return; // Early exit if no callee saved registers are modified!